Search NASA⌕ Search

SEARCH · Search NASA

Results for “Microprocessor”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 451 records · Page 25
All sourcesNASA NTRSDOE OSTI
NASA NTRS1979

LED instrument approach instruction display

A display employing light emitting diodes (LED's) was developed to demonstrate the feasibility of such displays for presenting landing and navigation information to reduce the workload of general aviation pilots during IFR flight. The display consists of a paper tape reader, digital memory, control electronics, digital latches, and LED alphanumeric displays. A presentable digital countdown clock-timer is included as part of the system to provide a convenient means of monitoring time intervals for precise flight navigation. The system is a limited capability prototype assembled to test pilot reaction to such a device under simulated IFR operation. Pilot opinion indicates that the display is helpful in reducing the IFR pilots workload when used with a runway approach plate. However, the development of a compact, low power second generation display was recommended which could present several instructions simultaneously and provide information update capability. A microprocessor-based display could fulfill these requirements.

Meredith, B. D.↗
NASA NTRS1978

A Special Purpose Architecture for Finite Element Analysis

The analysis of aerospace structures by the finite element method consumes considerable computer time. The cost of this resource and the designer's desire to have rapid feedback concerning such questions as the effect of a change in loading of the structure or in a parameter of some structural material led to the design of a special purpose parallel computing system for finite element analysis. As a special purpose computer, the architecture of this finite element computer is closely tied to computational aspects of the particular problem. Various aspects of an MIMD array of microprocessors are related to the requirements of the class of finite element analysis problems which it is intended to solve.

Jordan, H. F.↗
NASA NTRS1979

High-voltage dc power processing thermal control and packaging techniques

The power processor operates in several modes, delivering up to 100 amperes of regulated electrical power, operating at input voltages to 375 volts with outputs controlled by an integral microprocessor. Several alternative packaging concepts are discussed and evaluated. High-voltage design applications, power stage interconnection and EMI considerations are also discussed. Preliminary thermal analyses were performed and the results presented for each conceptual approach with parametric study results given for the selected concept.

Chapter, J. J.↗
NASA NTRS1979

The digital implementation of control compensators: The coefficient wordlength issue

There exists a number of mathematical procedures for designing discrete-time compensators. However, the digital implementation of these designs, with a microprocessor for example, has not received nearly as thorough an investigation. The finite-precision nature of the digital hardware makes it necessary to choose an algorithm (computational structure) that will perform 'well-enough' with regard to the initial objectives of the design. This paper describes a procedure for estimating the required fixed-point coefficient wordlength for any given computational structure for the implementation of a single-input single-output LOG design. The results are compared to the actual number of bits necessary to achieve a specified performance index.

Moroney, P.↗
NASA NTRS1979

Preliminary design and development of a reflectance spectrometer instrument

An improved design for the reflectance spectrometer is described to be used on various terrestrial body missions. These improvements were made on the original Lunar Polar Orbiter design. These include a larger entrance mirror, rectangular aperture, multiple optical beams, spatial resolution, and a bandwidth extension to 5 microns. In addition, detailed electronic designs were produced for a charge amplifier and an amplifier/demodulator/integrator. Design of a microprocessor driven test system was begun. Laboratory tests were performed on a tuning fork chopper.

Mccord, T. B.↗
NASA NTRS1977

Effects of periodic discharges

Periodic capacity checks are assessed as well as the effects of periodic discharges on the cycle life and the performance of cells during the cycle life. Topics discussed include the effect of the amount of electrolyte on cell capacity at 35 C; battery design for spacecraft; electrolyte starvation theory; battery separator degradation; negative electrode stability; voltage regulation; operating temperatures; and integration of reconditioning systems using microprocessors.

Ford, F. E.↗
NASA NTRS1979

Fuel spray data with LDV

Droplet size and two component velocities in the severe environment of an operating gas turbine combustor system can be measured simultaneously using the solar laser morphokinetomer (SLM) which incorporates the following capabilities: (1) measurement of a true two-dimensional velocity vector with a range of + or - (0.01-200 m/sec); (2) measurement of particle size (range 5 to 300 micron m) simultaneously with the measurement of velocity; (3) specification of probe volume position coordinates with a high degree of accuracy (+ or - 0.5 mm); (4) immediate on-line data checks; and (5) rapid computer storage of acquired data. The optical system of the SLM incorporates an ultrasonic beam splitter to allow the measurement of a two-dimensional velocity vector simultaneously with particle size. A microprocessor with a limited storage capability permits immediate analysis of test data in the test cell.

Rohy, D. A.↗
NASA NTRS1979

A long-range and long-life telemetry data-acquisition system for heart rate and multiple body temperatures from free-ranging animals

The system includes an implantable transmitter, external receiver-retransmitter collar, and a microprocessor-controlled demodulator. The size of the implant is suitable for animals with body weights of a few kilograms or more; further size reduction of the implant is possible. The ECG is sensed by electrodes designed for internal telemetry and to reduce movement artifacts. The R-wave characteristics are then specifically selected to trigger a short radio frequency pulse. Temperatures are sensed at desired locations by thermistors and then, based on a heartbeat counter, transmitted intermittently via pulse interval modulation. This modulation scheme includes first and last calibration intervals for a reference by ratios with the temperature intervals to achieve good accuracy even over long periods. Pulse duration and pulse sequencing are used to discriminate between heart rate and temperature pulses as well as RF interference.

Lund, G. F.↗
NASA NTRS1979

Automated Plasma Spray (APS) process feasibility study: Plasma spray process development and evaluation

An automated plasma spray (APS) process was developed to apply two layer (NiCrAlY and ZrO2-12Y2O3) thermal-barrier coatings to aircraft gas turbine engine blade airfoils. The APS process hardware consists of four subsystems: a mechanical blade positioner incorporating two interlaced six-degree-of-freedom assemblies; a noncoherent optical metrology subsystem; a microprocessor-based adaptive system controller; and commercial plasma spray equipment. Over fifty JT9D first stage turbine blades specimens were coated with the APS process in preliminary checkout and evaluation studies. The best of the preliminary specimens achieved an overall coating thickness uniformity of + or - 53 micrometers, much better than is achievable manually. Factors limiting this performance were identified and process modifications were initiated accordingly. Comparative evaluations of coating thickness uniformity for manually sprayed and APS coated specimens were initiated. One of the preliminary evaluation specimens was subjected to a torch test and metallographic evaluation.

Fetheroff, C. W.↗
NASA NTRS1979

LSA Large Area Silicon Sheet Task Enhanced I.D. Slicing Technology for Silicon Ingots

Development of inside diameter slicing technology to significantly increase the number of useable slices per inch of crystal over industry practice is discussed. The required reduction of both blade and slice thickness is to be accomplished by a combination of three key elements of slicing technology: (1) ingot rotation with minimum exposed blade area; (2) dynamic cutting edge control; and (3) the use of prefabricated insert blades. Design modifications on a slicing saw with microprocessor controls and hardware fabrication to complete this conversion were initiated. Several runs were conducted on the engineering saw incorporating the method of ingot rotation. Ingots with diameters up to six inches were sliced successfully on a production saw.

Walters, D.↗
NASA NTRS1978

Reconfigurable modular computer networks for spacecraft on-board processing

The core electronics subsystems on unmanned spacecraft, which have been sent over the last 20 years to investigate the moon, Mars, Venus, and Mercury, have progressed through an evolution from simple fixed controllers and analog computers in the 1960's to general-purpose digital computers in current designs. This evolution is now moving in the direction of distributed computer networks. Current Voyager spacecraft already use three on-board computers. One is used to store commands and provide overall spacecraft management. Another is used for instrument control and telemetry collection, and the third computer is used for attitude control and scientific instrument pointing. An examination of the control logic in the instruments shows that, for many, it is cost-effective to replace the sequencing logic with a microcomputer. The Unified Data System architecture considered consists of a set of standard microcomputers connected by several redundant buses. A typical self-checking computer module will contain 23 RAMs, two microprocessors, one memory interface, three bus interfaces, and one core building block.

Rennels, D. A.↗
NASA NTRS1978

On-board data processing for the IRAS telescope system

Onboard data processing has been developed for the Infrared Astronomical Satellite (IRAS) telescope system to effectively utilize the RF bandwidth and minimize the ground-data processing costs. Use of filtering techniques, data deglitching circuits, and data encoding algorithms are combined with a microprocessor-controlled telescope system to achieve a system dynamic range of 100,000 with a noise equivalent flux density of no less than 10 to the minus 19th W/sq cm. Extraneous data, e.g., noise due to radiation hits, will be removed prior to transmission, thereby optimizing ground-data processing for the highest sensitivity and reliability. Simulation results are presented which demonstrate the advantages gained through the use of onboard data processing and illustrate the possible merging of these techniques with an array for the future evolution of 'smart' sensors.

Lum, H.↗
NASA NTRS1978

Integrated detector array preprocessing for infrared astronomical applications

On-board preprocessing of astronomical data from integrated infrared detector arrays and discrete detectors will allow increases in sensitivity and reductions in costs for observations from cryogenic space telescopes. A variety of preprocessing functions for this application, which could be implemented either through analog on-chip devices or through external microprocessors, is identified. Software simulations and laboratory evaluations are underway to determine the effectiveness of these preprocessing schemes.

Mccreight, C. R.↗
NASA NTRS1978

A study of standard building blocks for the design of fault-tolerant distributed computer systems

This paper presents the results of a study that has established a standard set of four semiconductor VLSI building-block circuits. These circuits can be assembled with off-the-shelf microprocessors and semiconductor memory modules into fault-tolerant distributed computer configurations. The resulting multi-computer architecture uses self-checking computer modules backed up by a limited number of spares. A redundant bus system is employed for communication between computer modules.

Rennels, D. A.↗
NASA NTRS1978

Fault tolerance using self-checking building-block computers

The paper attempts to define and characterize a set of VLSI (very large scale integration) building-block circuits which can be used to combine existing microprocessors and memories into a wide variety of fault-tolerant computing systems. Such VLSI circuits would transform fault-tolerant computing into an off-the-shelf technology and enable its routine use for new applications. The self-checking computer module (SCCM) is the basic component out of which fault-tolerant computer systems are constructed. Several fault-tolerant configurations of SCCM are discussed, including the standby redundant uniprocessor, the voted/hybrid uniprocessor, and the distributed computer network.

Rennels, D. A.↗
NASA NTRS1978

The digital control of an experiment to size particles using a laser

Efforts to automate an experiment for sizing particles using a laser is described. The objective of the experiment was to rotate a photomultiplier detector at various angles and to record data associated with how light interacted with a particle. The light source was a laser which was fixed in space. The design consisted of a step motor with a fabricated electromechanical system to rotate the photomultiplier. The use of an 8080 microprocessor based microcomputer to control the step motor and to log data is described.

Cross, J. E.↗
NASA NTRS1978

Real time mass flow computer for Arc Jet Wind Tunnel

Experiments at the Arc Jet Tunnel at Ames Research Center have typical run times of 5-10 sec during which the test model is subjected to an environment simulating reentry into Jupiter. Previous real-time determination of mass flow required off-line manual computations from taped or strip chart data. The present paper describes a computer which provides personnel with real-time computations of mass flow. Using an 8-bit microprocessor and standard TTL interface circuitry, the unit interrogates temperature and pressure instruments with other parameters to compute mass flow.

Vidal, J.↗