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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 451 records · Page 25

Is bigger always better? An economic study of U.S. ETO vehicle architectures

This analysis, performed as part of NASA's Space Transportation Infrastructure Study, compares the cost efficiency of two candidate launch vehicle families, used in conjunction with existing expendable launch vehicles and the Shuttle, to accomplish the nation's future space missions through 2030. Missions analyzed include those identified in NASA's Civil Needs Data Base (CNDB) and Space Exploration Initiative (SEI) Option E program, as well as estimates of commercial and U.S. Department of Defense flights. A family of Shuttle-derived In-line vehicles is compared against a family designed around a vehicle optimized for large (250t) payloads. The analysis is performed within the context of an entire space transportation architecture. The goal is to determine which architecture best captures the required missions most cost-effectively. Results indicate that, for the particular mission model analyzed, neither option is clearly superior across the entire payload range. The Shuttle-derived family displays a better evolutionary path for supporting the total mission model (CNDB plus SEI missions). It also reduces earth-to-orbit (ETO) peak funding by 20 percent. The architecture incorporating the Heavy Lift ETO family minimizes SEI program cost and on-orbit operations but is subject to greater schedule risk because of the need for concurrent ETO core and engine development.

Eimers, Dan R.↗

Architecture assessment of HLLV candidates

Results of an architecture study of four Heavy Lift Launch Vehicles (HLLV) families are summarized, with attention given to civil, commercial, military and Space Exploration Initiative (SEI) applications. The Mars Exploration architecture is used as the SEI model baseline, and the architecture of each vehicle family is analyzed with respect to ground processing, launch operations, on-orbit operations, mission performance, and cost. For lunar missions, a 70-t earth-to-orbit (ETO) vehicle is shown to have definite cost advantages, with only small operational disadvantages, if the lunar program is small or medium in size. For Mars, a comparison of 150-t and 250-t ETO vehicles shows that little operational advantage is gained by going to the 250-t size.

Thompson, Walter E.↗

A low maintenance and highly reliable fly-by-light architecture

This paper proposes a highly reliable distributed architecture for use in a commercial transport. Fly-By-Light characteristics of the architecture are a serial fiber optic backplane and redundant fiber optic data bus. The fiber optic bus is fault tolerant and Byzantine resilient. A distributed architecture (both physically and logically) can be realized by utilizing several processing clusters on the data bus. A processing cluster is composed of one or more processing units. The processing units consist of several modules. The modules of the processing unit are connected via a serial fiber optic backplane. Fault tolerance is implemented at the backplane to increase reliability and availability.

Dan Palumbo↗

Intelligent pipelined control architecture for remote robotic applications

A new pipelined architecture for autonomous and semiautonomous space robotics systems is described. The architecture uses new concepts which significantly facilitate the overall system performance and leads to an effective functional partitioning between base and remote parts of the system. The base system which is based on a set of parameterized primitives, provides detailed planning and the remote site provides final command binding and resource management. The primitives are then directed to the intelligent manipulation controllers that perform the required manipulation. A proof-of-principle implementation at the JPL Telerobotic laboratory demonstrated the practical efficiency of the pipelined architecture in the context of supervised autonomous robotics operations.

Lokshin, A.↗

Electro-optic architecture for servicing sensors and actuators in advanced aircraft propulsion systems

A detailed design of a fiber optic propulsion control system, integrating favored sensors and electro-optics architecture is presented. Layouts, schematics, and sensor lists describe an advanced fighter engine system model. Components and attributes of candidate fiber optic sensors are identified, and evaluation criteria are used in a trade study resulting in favored sensors for each measurand. System architectural ground rules were applied to accomplish an electro-optics architecture for the favored sensors. A key result was a considerable reduction in signal conductors. Drawings, schematics, specifications, and printed circuit board layouts describe the detailed system design, including application of a planar optical waveguide interface.

Poppel, G. L.↗

High-speed architecture for the decoding of trellis-coded modulation

Since 1971, when the Viterbi Algorithm was introduced as the optimal method of decoding convolutional codes, improvements in circuit technology, especially VLSI, have steadily increased its speed and practicality. Trellis-Coded Modulation (TCM) combines convolutional coding with higher level modulation (non-binary source alphabet) to provide forward error correction and spectral efficiency. For binary codes, the current stare-of-the-art is a 64-state Viterbi decoder on a single CMOS chip, operating at a data rate of 25 Mbps. Recently, there has been an interest in increasing the speed of the Viterbi Algorithm by improving the decoder architecture, or by reducing the algorithm itself. Designs employing new architectural techniques are now in existence, however these techniques are currently applied to simpler binary codes, not to TCM. The purpose of this report is to discuss TCM architectural considerations in general, and to present the design, at the logic gate level, or a specific TCM decoder which applies these considerations to achieve high-speed decoding.

Osborne, William P.↗

Electro-optic architecture (EOA) for sensors and actuators in aircraft propulsion systems

Results of a study to design an optimal architecture for electro-optical sensing and control in advanced aircraft and space systems are described. The propulsion full authority digital Electronic Engine Control (EEC) was the focus for the study. The recommended architecture is an on-engine EEC which contains electro-optic interface circuits for fiber-optic sensors on the engine. Size and weight are reduced by multiplexing arrays of functionally similar sensors on a pair of optical fibers to common electro-optical interfaces. The architecture contains common, multiplex interfaces to seven sensor groups: (1) self luminous sensors; (2) high temperatures; (3) low temperatures; (4) speeds and flows; (5) vibration; (6) pressures; and (7) mechanical positions. Nine distinct fiber-optic sensor types were found to provide these sensing functions: (1) continuous wave (CW) intensity modulators; (2) time division multiplexing (TDM) digital optic codeplates; (3) time division multiplexing (TDM) analog self-referenced sensors; (4) wavelength division multiplexing (WDM) digital optic code plates; (5) wavelength division multiplexing (WDM) analog self-referenced intensity modulators; (6) analog optical spectral shifters; (7) self-luminous bodies; (8) coherent optical interferometers; and (9) remote electrical sensors. The report includes the results of a trade study including engine sensor requirements, environment, the basic sensor types, and relevant evaluation criteria. These figures of merit for the candidate interface types were calculated from the data supplied by leading manufacturers of fiber-optic sensors.

Glomb, W. L., Jr.↗

Domain specific software architectures: Command and control

GTE is the Command and Control contractor for the Domain Specific Software Architectures program. The objective of this program is to develop and demonstrate an architecture-driven, component-based capability for the automated generation of command and control (C2) applications. Such a capability will significantly reduce the cost of C2 applications development and will lead to improved system quality and reliability through the use of proven architectures and components. A major focus of GTE's approach is the automated generation of application components in particular subdomains. Our initial work in this area has concentrated in the message handling subdomain; we have defined and prototyped an approach that can automate one of the most software-intensive parts of C2 systems development. This paper provides an overview of the GTE team's DSSA approach and then presents our work on automated support for message processing.

Braun, Christine↗

Rutger's CAM2000 chip architecture

This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.

Smith, Donald E.↗

Options for a lunar base surface architecture

The Planet Surface Systems Office at the NASA Johnson Space Center has participated in an analysis of the Space Exploration Initiative architectures described in the Synthesis Group report. This effort involves a Systems Engineering and Integration effort to define point designs for evolving lunar and Mars bases that support substantial science, exploration, and resource production objectives. The analysis addresses systems-level designs; element requirements and conceptual designs; assessments of precursor and technology needs; and overall programmatics and schedules. This paper focuses on the results of the study of the Space Resource Utilization Architecture. This architecture develops the capability to extract useful materials from the indigenous resources of the Moon and Mars. On the Moon, a substantial infrastructure is emplaced which can support a crew of up to twelve. Two major process lines are developed: one produces oxygen, ceramics, and metals; the other produces hydrogen, helium, and other volatiles. The Moon is also used for a simulation of a Mars mission. Significant science capabilities are established in conjunction with resource development. Exploration includes remote global surveys and piloted sorties of local and regional areas. Science accommodations include planetary science, astronomy, and biomedical research. Greenhouses are established to provide a substantial amount of food needs.

Roberts, Barney B.↗

Special purpose parallel computer architecture for real-time control and simulation in robotic applications

This is a real-time robotic controller and simulator which is a MIMD-SIMD parallel architecture for interfacing with an external host computer and providing a high degree of parallelism in computations for robotic control and simulation. It includes a host processor for receiving instructions from the external host computer and for transmitting answers to the external host computer. There are a plurality of SIMD microprocessors, each SIMD processor being a SIMD parallel processor capable of exploiting fine grain parallelism and further being able to operate asynchronously to form a MIMD architecture. Each SIMD processor comprises a SIMD architecture capable of performing two matrix-vector operations in parallel while fully exploiting parallelism in each operation. There is a system bus connecting the host processor to the plurality of SIMD microprocessors and a common clock providing a continuous sequence of clock pulses. There is also a ring structure interconnecting the plurality of SIMD microprocessors and connected to the clock for providing the clock pulses to the SIMD microprocessors and for providing a path for the flow of data and instructions between the SIMD microprocessors. The host processor includes logic for controlling the RRCS by interpreting instructions sent by the external host computer, decomposing the instructions into a series of computations to be performed by the SIMD microprocessors, using the system bus to distribute associated data among the SIMD microprocessors, and initiating activity of the SIMD microprocessors to perform the computations on the data by procedure call.

Fijany, Amir↗

Advanced Launch System Multi-Path Redundant Avionics Architecture Analysis and Characterization

The objective of the Multi-Path Redundant Avionics Suite (MPRAS) program is the development of a set of avionic architectural modules which will be applicable to the family of launch vehicles required to support the Advanced Launch System (ALS). To enable ALS cost/performance requirements to be met, the MPRAS must support autonomy, maintenance, and testability capabilities which exceed those present in conventional launch vehicles. The multi-path redundant or fault tolerance characteristics of the MPRAS are necessary to offset a reduction in avionics reliability due to the increased complexity needed to support these new cost reduction and performance capabilities and to meet avionics reliability requirements which will provide cost-effective reductions in overall ALS recurring costs. A complex, real-time distributed computing system is needed to meet the ALS avionics system requirements. General Dynamics, Boeing Aerospace, and C.S. Draper Laboratory have proposed system architectures as candidates for the ALS MPRAS. The purpose of this document is to report the results of independent performance and reliability characterization and assessment analyses of each proposed candidate architecture and qualitative assessments of testability, maintainability, and fault tolerance mechanisms. These independent analyses were conducted as part of the MPRAS Part 2 program and were carried under NASA Langley Research Contract NAS1-17964, Task Assignment 28.

Baker, Robert L.↗

Architectural development of an advanced EVA Electronic System

An advanced electronic system for future EVA missions (including zero gravity, the lunar surface, and the surface of Mars) is under research and development within the Advanced Life Support Division at NASA Ames Research Center. As a first step in the development, an optimum system architecture has been derived from an analysis of the projected requirements for these missions. The open, modular architecture centers around a distributed multiprocessing concept where the major subsystems independently process their own I/O functions and communicate over a common bus. Supervision and coordination of the subsystems is handled by an embedded real-time operating system kernel employing multitasking software techniques. A discussion of how the architecture most efficiently meets the electronic system functional requirements, maximizes flexibility for future development and mission applications, and enhances the reliability and serviceability of the system in these remote, hostile environments is included.

Lavelle, Joseph↗

Architectures for mission control at the Jet Propulsion Laboratory

JPL is currently converting to an innovative control center data system which is a distributed, open architecture for telemetry delivery and which is enabling advancement towards improved automation and operability, as well as new technology, in mission operations at JPL. The scope of mission control within mission operations is examined. The concepts of a mission control center and how operability can affect the design of a control center data system are discussed. Examples of JPL's mission control architecture, data system development, and prototype efforts at the JPL Operations Engineering Laboratory are provided. Strategies for the future of mission control architectures are outlined.

Davidson, Reger A.↗

Plant architecture, growth and radiative transfer for terrestrial and space environments

The overall objective of this research was to develop a hardware implemented model that would incorporate realistic and dynamic descriptions of canopy architecture in physiologically based models of plant growth and functioning, with an emphasis on radiative transfer while accommodating other environmental constraints. The general approach has five parts: a realistic mathematical treatment of canopy architecture, a methodology for combining this general canopy architectural description with a general radiative transfer model, the inclusion of physiological and environmental aspects of plant growth, inclusion of plant phenology, and integration.

Norman, John M.↗

On-board packet switch architectures for communication satellites

NASA Lewis Research Center is developing an on-board information switching processor for a multichannel communications signal processing satellite. The information switching processor is a flexible, high-throughput, fault tolerant, on-board baseband packet switch used to route user data among user ground terminals. Through industry study contracts and in-house investigations, several packet switching architectures were examined for possible implementation. Three contention-free switching architectures were studied in detail, namely the shared memory approach, the shared bus approach, and the shared memory per beam approach. These three switching architectures are discussed and the advantages and disadvantages of each approach are examined.

Shalkhauser, Mary JO↗

IRAF and STSDAS under the new ALPHA architecture

Digital's next generation RISC architecture, known as ALPHA, presents many IRAF system portability questions and challenges to both site managers and end users. DEC promises to support the ULTRIX, VMS, and OSF/1 operating systems, which should allow IRAF to be ported to the new architecture at either the program executable level (using VEST), or at the source level, where IRAF can be tuned for greater performance. These notes highlight some of the details of porting IRAF to OpenVMS on the ALPHA architecture.

Zarate, N. R.↗

Fault tolerant onboard packet switch architecture for communication satellites: Shared memory per beam approach

The NASA Lewis Research Center is developing a multichannel communication signal processing satellite (MCSPS) system which will provide low data rate, direct to user, commercial communications services. The focus of current space segment developments is a flexible, high-throughput, fault tolerant onboard information switching processor. This information switching processor (ISP) is a destination-directed packet switch which performs both space and time switching to route user information among numerous user ground terminals. Through both industry study contracts and in-house investigations, several packet switching architectures were examined. A contention-free approach, the shared memory per beam architecture, was selected for implementation. The shared memory per beam architecture, fault tolerance insertion, implementation, and demonstration plans are described.

Shalkhauser, Mary JO↗