Modular spaceborne processors
Design, development, and characteristics of modular spaceborne data processors for space shuttle applications
Wadden, W. R.↗
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The versatile information processor - A unique concept for an adaptable satellite telemetry system
Nimbus 4 satellite telemetry information processor with data sampling and formatting flexibility
Feinberg, P.↗
On erroneous prediction of the performance of sequential processors with linear methods
Sequential processor performance prediction error with linear method from Monte Carlo cycle analysis of Apollo 14 early rendezvous profile
Bond, A. C.↗
A stored program channel processor for CAMAC
A PDP-15 interface was developed for the CAMAC instrumentation standard which implements the features of both the addressable I/0 bus and the single cycle data channel. The data channel section forms an independent I/0 processor which executes programs stored in core. Programs consist of CAMAC commands plus special control characters and commands.
Bercaw, R. W.↗
Support software for the advanced on-board processor
The support software package is described which exists for the advanced on-board processor (AOP) being developed as a general purpose stored program digital computer, with an 18-bit word.
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An On Board Processor (OBP) for OAO C
A stored program computer and its application on OAO is considered. The parallel computer has a memory capacity of 16,384 words of 18 bits each, one central processor unit, two 4096 word memory units, and one input/output unit. The I/O has no direct data connection with the CPU so that all data flow between these two units must pass through memory by way of the memory data bus. The primary functions of the onboard computer are auxiliary command storage, spacecraft monitoring and malfunction reporting, data compression and status summary, and possible performance of emergency corrective action.
Hartenstein, R. G.↗
Development of a multikilowatt ion thruster power processor
A feasibility study was made of the application of silicon-controlled, rectifier series, resonant inverter, power conditioning technology to electric propulsion power processing operating from a 200 to 400 Vdc solar array bus. A power system block diagram was generated to meet the electrical requirements of a 20 CM hollow cathode, mercury bombardment, ion engine. The SCR series resonant inverter was developed as a primary means of power switching and conversion, and the analog signal-to-discrete-time-interval converter control system was applied to achieve good regulation. A complete breadboard was designed, fabricated, and tested with a resistive load bank, and critical power processor areas relating to efficiency, weight, and part count were identified.
Schoenfeld, A. D.↗
Universal voice processor development
The development of a universal voice processor is discussed. The device is based on several circuit configurations using hybrid techniques to satisfy the electrical specifications. The steps taken during the design process are described. Circuit diagrams of the final design are presented. Mathematical models are included to support the theoretical aspects.
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A scan processor as an aid to program documentation
Program documentation was separated into two catagories: documentation for program use and documentation for program analysis, modification, or extension. The symbol scanner, flow chart production subsystem, decision table subsystem, and scan processor are also described.
Oliver, P.↗
The onboard processor on OAO-3
The onboard data processor for OAO 3 flight applications executes instructions at the rate of 2 1/2 billion per day. The computer commands, processes data, and controls telemetry subsystem programs onboard the spacecraft.
Taylor, T. D.↗
Study of a hybrid multispectral processor
A hybrid processor is described offering enough handling capacity and speed to process efficiently the large quantities of multispectral data that can be gathered by scanner systems such as MSDS, SKYLAB, ERTS, and ERIM M-7. Combinations of general-purpose and special-purpose hybrid computers were examined to include both analog and digital types as well as all-digital configurations. The current trend toward lower costs for medium-scale digital circuitry suggests that the all-digital approach may offer the better solution within the time frame of the next few years. The study recommends and defines such a hybrid digital computing system in which both special-purpose and general-purpose digital computers would be employed. The tasks of recognizing surface objects would be performed in a parallel, pipeline digital system while the tasks of control and monitoring would be handled by a medium-scale minicomputer system. A program to design and construct a small, prototype, all-digital system has been started.
Marshall, R. E.↗
A slope reversal video processor having amplitude and pulse width discrimination.
A timing discriminator whose output is relatively insensitive to input pulse width and amplitude is described. The video-handling technique is known as slope reversal processing and is based on tapped delay line estimation methods. The concept, design, breadboard construction, and preliminary laboratory test results are reviewed. The processor system features (1) a peak input voltage dynamic range of 80x starting at 100 microvolts; (2) a four stage preamplifier/line-driver having a voltage gain of 2400x; (3) a tapped delay-line estimator implemented for slope reversal triggering by differential comparison; (4) a nominal plus or minus 2.5 nsec shift of the output trigger leading edge over the entire input voltage range, (5) up to 7 dB discrimination against pulse widths less than 35 nsec; and (6) up to one order of magnitude reduction in the false alarm rate compared to a constant fraction system.
Hoge, F. E.↗
Organization of brain tissue - Is the brain a noisy processor.
This paper presents some thoughts on functional organization in cerebral tissue. 'Spontaneous' wave and unit firing are considered as essential phenomena in the handling of information. Various models are discussed which have been suggested to describe the pseudorandom behavior of brain cells, leading to a view of the brain as an information processor and its role in learning, memory, remembering and forgetting.
Adey, W. R.↗
Restoration of degraded images by composite gratings in a coherent optical processor.
A study has been made on restoration of degraded images utilizing spatial filtering techniques in a coherent optical processor. This study differs from other coherent approaches in that the spatial filters employed contain only composite gratings that are quite simple to produce. A general method of synthesizing the appropriate composite gratings for linearly smeared as well as multiply exposed and out-of-focus images will be presented in some detail with experimental results. The extension of the method of synthesis to other types of degradation is briefly discussed.
Jablonowski, D. P.↗
Data processor with conditionally supplied clock signals
Parallel data processor clock pulses are conditionally supplied to processing unit in response to relative values of binary bit of control source and binary bit derived on single lead. Use of single lead simplifies fabrication of large-scale integrated networks.
Lesniewski, R. J.↗
Liquid sample processor
Processor is automatic and includes series of extraction tubes packed with fibrous absorbent material of large surface area. When introduced into these tubes, liquid test samples become completely absorbed by packing material as thin film.
Jahnsen, V. J.↗
Advanced On-Board Processor (AOP)
Advanced On-board Processor the (AOP) uses large scale integration throughout and is the most advanced space qualified computer of its class in existence today. It was designed to satisfy most spacecraft requirements which are anticipated over the next several years. The AOP design utilizes custom metallized multigate arrays (CMMA) which have been designed specifically for this computer. This approach provides the most efficient use of circuits, reduces volume, weight, assembly costs and provides for a significant increase in reliability by the significant reduction in conventional circuit interconnections. The required 69 CMMA packages are assembled on a single multilayer printed circuit board which together with associated connectors constitutes the complete AOP. This approach also reduces conventional interconnections thus further reducing weight, volume and assembly costs.
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Feasibility of converting hi-speed processor for processing Kodak film types 7381/7271 (16mm) and 5381/5271 (35mm) using Kodak ECP chemistry
Testing conducted to determine the feasibility of converting the 16/35/70 hi-speed processor to process Kodak film types 7381/7271 (16mm) and 5381/5271 (35mm) color negative films using Kodak ECP chemistry is described.
Weinstein, M. S.↗