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At least 469 records · Page 26

Simulation results for the Viterbi decoding algorithm

Concepts involved in determining the performance of coded digital communications systems are introduced. The basic concepts of convolutional encoding and decoding are summarized, and hardware implementations of sequential and maximum likelihood decoders are described briefly. Results of parametric studies of the Viterbi decoding algorithm are summarized. Bit error probability is chosen as the measure of performance and is calculated, by using digital computer simulations, for various encoder and decoder parameters. Results are presented for code rates of one-half and one-third, for constraint lengths of 4 to 8, for both hard-decision and soft-decision bit detectors, and for several important systematic and nonsystematic codes. The effect of decoder block length on bit error rate also is considered, so that a more complete estimate of the relationship between performance and decoder complexity can be made.

Batson, B. H.↗

Design, processing, and testing of lsi arrays for space station

The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

Lile, W. R.↗

Optical modulator system

The fabrication, test, and delivery of an optical modulator system which will operate with a mode-locked Nd:YAG laser indicating at either 1.06 or 0.53 micrometers is discussed. The delivered hardware operates at data rates up to 400 Mbps and includes a 0.53 micrometer electrooptic modulator, a 1.06 micrometer electrooptic modulator with power supply and signal processing electronics with power supply. The modulators contain solid state drivers which accept digital signals with MECL logic levels, temperature controllers to maintain a stable thermal environment for the modulator crystals, and automatic electronic compensation to maximize the extinction ratio. The modulators use two lithium tantalate crystals cascaded in a double pass configuration. The signal processing electronics include encoding electronics which are capable of digitizing analog signals between the limit of + or - 0.75 volts at a maximum rate of 80 megasamples per second with 5 bit resolution. The digital samples are serialized and made available as a 400 Mbps serial NRZ data source for the modulators. A pseudorandom (PN) generator is also included in the signal processing electronics. This data source generates PN sequences with lengths between 31 bits and 32,767 bits in a serial NRZ format at rates up to 400 Mbps.

Brand, J.↗

Counting digital filters

Several embodiments of a counting digital filter of the non-recursive type are disclosed. In each embodiment two registers, at least one of which is a shift register, are included. The shift register received j sub x-bit data input words bit by bit. The kth data word is represented by the integer.

Zohar, S.↗

A magnetic bubble domain flight recorder

A feasibility model of an all-electronic bubble memory system has been constructed. It uses a small 60k bit bubble recorder consisting of 6 chips of 10k bits each mounted in three separate packages operating as a FIFO at a 150 KHz bubble data rate. In addition to serving as a direct tape recorder replacement, the bubble recorder can be programmed for random access to each individual chip for ranom block access operation or for self-checking or by-passing any malfunctioning memory chip. Read and write operations can be performed asynchronously from very low frequency up to basic recording field frequency. A large 50M bit prototype is planned.

Chen, T. T.↗

Omega flight-test data reduction sequence

Computer programs for Omega data conversion, summary, and preparation for distribution are presented. Program logic and sample data formats are included, along with operational instructions for each program. Flight data (or data collected in flight format in the laboratory) is provided by the Ohio University Omega receiver base in the form of 6-bit binary words representing the phase of an Omega station with respect to the receiver's local clock. All eight Omega stations are measured in each 10-second Omega time frame. In addition, an event-marker bit and a time-slot D synchronizing bit are recorded. Program FDCON is used to remove data from the flight recorder tape and place it on data-processing cards for later use. Program FDSUM provides for computer plotting of selected LOP's, for single-station phase plots, and for printout of basic signal statistics for each Omega channel. Mean phase and standard deviation are printed, along with data from which a phase distribution can be plotted for each Omega station. Program DACOP simply copies the Omega data deck a controlled number of times, for distribution to users.

Lilley, R. W.↗

Airoscope telemetry system

The AIROscope (Ames Infrared Observatory telescope) telemetry system is described from signal conditioning on the gondola to display and storage at the ground station. All analog and digital data from the systems and experiments on the gondola go to a PCM encoder which formats the data into 10-bit words. Therefore, 0.1-percent resolution is inherently available for experimental data. The coded bit stream directly modulates the carrier of the FM transmitter. To insure reliable transmission over a 650-km range an 11-watt FM transmitter operating at 1483.5 MHz is used on the gondola. Modulation is narrow band FM with a maximum deviation of plus or minus 500 kHz. The maximum modulation frequency is determined by the data bit rate which could be as high as 500 kbps. Presently, a rate of 20.48 kbps is used. The ground station receiving system includes a steerable antenna (19-db gain), preamplifier (21-db gain) and receiver. All data are recorded on a tape recorder. The recorded signal then can be played back through the PCM decommutator unit at a later time for detailed data analysis by the experimenter.

Pitts, K. J.↗

Main memory unit

The development of a main memory unit (MMU) for the space ultrareliable module computer (SUMC) model HTC is discussed. The design, fabrication, and test of basic memory modules (BMM) which were to be used in the design and construction of the MMU are described. The BMM was designed from state-of-the-art technologies which included large scale integration devices mounted and interconnected on a substrate to form a functional module to be utilized in the MMU development. A SUMC memory system design study is discussed which addressed itself to the BMM design and analysis to be conducted to determine the most efficient organization of the BMM in order to establish such modularity features as: word length expandability without redesign, high reliability, and fault tolerance. One MMU was designed, fabricated, tested, and delivered which will be electrical and mechanically compatible with the hybrid technology computer (HTC) model of the SUMC family of computers. The MMU will contain a storage capacity of 8196 36 bit words which includes a parity bit for each 8 bit byte of data.

Source record↗

The Viking Mars lander camera

The 7.3 kg cameras for the 1976 Viking Mars expedition feature an array of 12 silicon photodiodes, including six spectral bands for color and near-infrared imaging with an angular resolution of 0.12 deg and four focus steps for broadband imaging, with an improved angular resolution of 0.04 deg. The field of view in elevation ranges from 40 deg above to 60 deg below the horizon, and in azimuth ranges to 342.5 deg. The cameras are mounted 0.8 m apart to provide a stereo view of the area accessible to a surface sampler for biological and chemical investigations. The scanning rates are synchronized to the lander data transmission rates of 16000 bits per sec to the Viking orbiters as relay stations and 250 bits per sec directly to earth. However, image data can also be stored on a lander tape recorder. About 10 million bits of image data will be transmitted during most days of the 60-day-long mission planned for each lander.

Huck, F. O.↗

Development of InSb charge-coupled infrared imaging devices: Linear imager

The following results were accomplished in the development of charge coupled infrared imaging devices: (1) a four-phase overlapping gate with 9 transfers (2-bits) and 1.0-mil gate lengths was successfully operated, (2) the measured transfer efficiency of 0.975 for this device is in excellent agreement with predictions for the reduced gate length device, (3) mask revisions of the channel stop metal on the 8582 mask have been carried out with the result being a large increase in the dc yield of the tested devices, (4) partial optical sensitivity to chopped blackbody radiation was observed for an 8582 9-bit imager, (5) analytical consideration of the modulation transfer function degradation caused by transfer inefficiency in the CCD registers was presented, and (6) for larger array lengths or for the insertion of isolated bits between sensors, improvements in InSb fabrication technology with corresponding decrease in the interface state density are required.

Phillips, J. D.↗

DSN telemetry system performance with convolutionally coded data: Maximum likelihood decoding

DSN telemetry system performance is analyzed based on convolutionally coded data for the short constraint length 7:1/2 codes at low bit rates, 8 to 2,048 bits per second, obtained from CTA 21 for the S-band configuration. The results indicate that a loss of one or more decibels in the system performance may be expected due to system degradation. Also, burst error lengths up to 100 bits may not be unusual in actual operational situations.

Benjauthrit, B.↗

Simulation and modeling of the deep space receiver interaction with channel decoding performance

Computer models were developed in an attempt to reproduce the sequential decoder computation curve of Deep Space Network (DSN) ground station receivers, by simulation of the binary data output of the Gaussian channel with the carrier phaselock loop and the subcarrier demodulator assembly. Simulations were run at bit rates equal to the powers of 2 from 8 to 2,048, and agreement with DSN data was generally good above 32 bits per second. Simulation results at data rates of 8, 16, and 32 bits per second did not closely match experimental data. This simulation provides a more accurate prediction of DSN computation lengths than either current mathematical models or simulations without both the subcarrier demodulator and carrier loop.

Jones, H. W., Jr.↗

Long frame sync words for binary PSK telemetry

Correlation criteria have previously been established for identifying whether a given binary sequence would be a good frame sync word for phase-shift keyed telemetry. In the past, the search for a good K-bit sync word has involved the application of these criteria to the entire set of 2 exponent K binary K-tuples. It is shown that restricting this search to a much smaller subset consisting of K-bit prefixes of pseudonoise sequences results in sync words of comparable quality, with greatly reduced computer search times for larger values of K. As an example, this procedure is used to find good sync words of length 16-63; from a storage viewpoint, each of these sequences can be generated by a 5- or 6-bit linear feedback shift register.

Levitt, B. K.↗

Coding for a multiple-access channel

In a simple multiple-access communication system, two geographically separated users attempt to communicate binary data to two data sinks over a common channel called a multiple access channel. User one sends codewords from a block code C sub one, while user two sends codewords from a block code C sub two. The two users occupy the same frequency slot, transmit at the same time, and use the same type of modulation. Block codes which are uniquely decodable and capable of correcting errors are constructed for two multiple-access channel models. The first model is referred to as a noiseless multiple-access binary erasure channel. If the two transmitted bits from the two users are zeros, a zero is transmitted over the channel to the receiver; if the two transmitted bits are ones, a one is transmitted to the receiver; if the two bits are different, an erasure symbol is transmitted to the receiver. The second model is also a multiple-access binary erasure channel but with noise introduced.

Kasami, T.↗

The autocorrelation structure of Tausworthe pseudorandom number generators

An algorithm for determining the autocorrelation structure of a new sequence generated from an original sequence by proper decimation (a shift with each q-th term of the original sequence used) is presented, once autocorrelations for any repeating number sequence are known. The autocorrelation structure of the Tausworthe random number generator (RNG), based on proper decimation by q, is accepted as a RNG structure in which a proper decimation generates a long interval over which autocorrelations are small for all shifts. It is shown that if L bits of an N-bit Tausworthe RNG are L-bit binary numbers, L + 1 levels of correlation will exist, and L levels of correlation will each occur twice per RNG cycle length.

Neuman, F.↗

Development of a high capacity bubble domain memory element and related epitaxial garnet materials for application in spacecraft data recorders. Item 1: Development of a high capacity memory element

Several versions of the 100K bit chip, which is configured as a single serial loop, were designed, fabricated and evaluated. Design and process modifications were introduced into each succeeding version to increase device performance and yield. At an intrinsic field rate of 150 KHz the final design operates from -10 C to +60 C with typical bias margins of 12 and 8 percent, respectively, for continuous operation. Asynchronous operation with first bit detection on start-up produces essentially the same margins over the temperature range. Cost projections made from fabrication yield runs on the 100K bit devices indicate that the memory element cost will be less than 10 millicents/bit in volume production.

Besser, P. J.↗

Performance of convolutionally encoded noncoherent MFSK modem in fading channels

The performance of a convolutionally encoded noncoherent multiple-frequency shift-keyed (MFSK) modem utilizing Viterbi maximum-likelihood decoding and operating on a fading channel is described. Both the lognormal and classical Rician fading channels are considered for both slow and time-varying channel conditions. Primary interest is in the resulting bit error rate as a function of the ratio between the energy per transmitted information bit and noise spectral density, parameterized by both the fading channel and code parameters. Fairly general upper bounds on bit error probability are provided and compared with simulation results in the two extremes of zero and infinite channel memory. The efficacy of simple block interleaving in combatting channel memory effects are thoroughly explored. Both quantized and unquantized receiver outputs are considered.

Modestino, J. W.↗

High-density digital data recording/reproducing system

Problems associated with reliably recording and reproducing digital data at densities of 10 to 30 kilobits per inch and the solutions to these problems are discussed. The three problems are skew, dc offset, and tape imperfections. The solutions are to use a 14-track, wideband II tape recorder; record NRZ-L; use a 24-bit sync word, 504-bit frame length, and odd parity in every 8-bit byte; and to employ circuit design techniques that minimize the effects of the remaining dc offset and tape imperfections.

Leighou, R. O.↗