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A complete data analysis system utilizing laser speckle interferometry and Experimental Integral Equation Method (EBIE) is described. A host computer provides the optical data analysis and serves as an input device to a PDP11/VAX computer for numerical analysis. The basic theory of pointwise filtering and digital correlation is described as experimental data input to the BIE method.
A real time thermal imaging system with temperature resolution better than + or - 1 C and spatial resolution of better than 0.5 mm was developed and applied to the analysis of melt surface thermal field distributions in both Czochralski and liquid encapsulated Czochralski (LEC) growth configurations. The melt is viewed in near normal incidence by a high resolution charge coupled device camera to which is attached a very narrow bandpass filter. The resulting image is digitized and processed using a pipelined pixel processor operating at an effective 40 million operations per second thus permitting real time high frequency spatial and temporal filtering of the high temperature scene. A multi-pixel averaging algorithm was developed which permits localized, low noise sensing of temperature variations at any location in the hot zone as a function of time. This signial is used to implement initial elements of a feedforward growth control scheme which is aimed at reducing disturbances to the melt caused by the batch nature of the growth process. The effect of magnetic melt stabilization on radial melt temperature distributions was measured using this technique. Problems associated with residual internal reflections and non-optimized path geometry are discussed.
Shock-absorbing apparatus includes electromechanical actuator and digital feedback control circuitry rather than springs and hydraulic damping as in conventional shock absorbers. Device not subject to leakage and requires little or no maintenance. Attenuator parameters adjusted in response to sensory feedback and predictive algorithms to obtain desired damping characteristic. Device programmed to decelerate slowly approaching vehicle or other large object according to prescribed damping characteristic.
A system was designed to automate cryogenically cooled low-noise amplifier systems used in the NASA Deep Space Network. It automates the entire operation of the system including cool-down, warm-up, and performance monitoring. The system is based on a single-board computer with custom software and hardware to monitor and control the cryogenic operation of the system. The system provides local display and control, and can be operated remotely via a Web interface. The system controller is based on a commercial single-board computer with onboard data acquisition capability. The commercial hardware includes a microprocessor, an LCD (liquid crystal display), seven LED (light emitting diode) displays, a seven-key keypad, an Ethernet interface, 40 digital I/O (input/output) ports, 11 A/D (analog to digital) inputs, four D/A (digital to analog) outputs, and an external relay board to control the high-current devices. The temperature sensors used are commercial silicon diode devices that provide a non-linear voltage output proportional to temperature. The devices are excited with a 10-microamp bias current. The system is capable of monitoring and displaying three temperatures. The vacuum sensors are commercial thermistor devices. The output of the sensors is a non-linear voltage proportional to vacuum pressure in the 1-Torr to 1-millitorr range. Two sensors are used. One measures the vacuum pressure in the cryocooler and the other the pressure at the input to the vacuum pump. The helium pressure sensor is a commercial device that provides a linear voltage output from 1 to 5 volts, corresponding to a gas pressure from 0 to 3.5 MPa (approx. = 500 psig). Control of the vacuum process is accomplished with a commercial electrically operated solenoid valve. A commercial motor starter is used to control the input power of the compressor. The warm-up heaters are commercial power resistors sized to provide the appropriate power for the thermal mass of the particular system, and typically provide 50 watts of heat. There are four basic operating modes. "Cool " mode commands the system to cool to normal operating temperature. "Heat " mode is used to warm the device to a set temperature near room temperature. "Pump " mode is a maintenance function that allows the vacuum system to be operated alone to remove accumulated contaminants from the vacuum area. In "Off " mode, no power is applied to the system.
A key component in the Integrated Radio and Optical Communications project at the National Aeronautics and Space Administration's (NASA) Glenn Research Center (GRC) is the radio frequency (RF) and optical software defined radio (SDR). A NASA RF SDR might consist of a general purpose processor to run the Space Telecommunications Radio System (STRS) Architecture for radio command and control, a reconfigurable signal processing device such as a field programmable gate array (FPGA) which houses the waveform, and a digital to analog converter for (DAC) transmitting data. Prior to development, SDR architecture trades on how to combine the RF and optical elements were studied. A modular architecture with physically separate RF and optical hardware slices was chosen and the optical slice of an SDR was designed and developed. The Harris AppSTAR("TM") platform, which consists of an FPGA processing platform with a mezzanine card targeted for RF communications, was used as the base platform in prototyping the optical slice. A serially concatenated pulse position modulation (SCPPM) optical waveform was developed. The waveform follows the standard described in the Consultative Committee for Space Data Systems (CCSDS) Optical Communions Coding and Synchronization Red Book. A custom optical mezzanine printed circuit board card was developed at NASA GRC for optical transmission. The optical mezzanine card replaces the DAC, which is used in the transmission of RF signals. This paper describes RF and optical SDR architecture trades, the Harris AppSTAR("TM") platform, the design of the SCPPM waveform, and the development of the optical mezzanine card.
A key component in the Integrated Radio and Optical Communications project at the National Aeronautics and Space Administration's (NASA) Glenn Research Center (GRC) is the radio frequency (RF) and optical software defined radio (SDR). A NASA RF SDR might consist of a general purpose processor to run the Space Telecommunications Radio System (STRS) Architecture for radio command and control, a reconfigurable signal processing device such as a field programmable gate array (FPGA) which houses the waveform, and a digital to analog converter (DAC) for transmitting data. Prior to development, SDR architecture trades on how to combine the RF and optical elements were studied. A modular architecture with physically separate RF and optical hardware slices was chosen and the optical slice of an SDR was designed and developed. The Harris AppSTARTM platform, which consists of an FPGA processing platform with a mezzanine card targeted for RF communications, was used as the base platform in prototyping the optical slice. A serially concatenated pulse position modulation (SCPPM) optical waveform was developed. The waveform follows the standard described in the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization Red Book. A custom optical mezzanine printed circuit board card was developed at NASA GRC for optical transmission. The optical mezzanine card replaces the DAC, which is used in the transmission of RF signals. This paper describes RF and optical SDR architecture trades, the Harris AppSTAR platform, the design of the SCPPM waveform, and the development of the optical mezzanine card.
Prism and grating spectrometers have been the defacto devices for spectral mapping and imaging (hereafter referred to as hyperspectra). We have developed a new, hybrid instrument with many superior capabilities, the Digital Array Scanned Interferometer, DASI. The DASI performs the hyperspectral data acquisition in the same way as a grating or prism spectrograph, but retains the substantial advantages of the two-beam (Michelson) interferometer with additional capabilities not possessed by either of the other devices. The DASI is capable of hyperspectral studies in virtually any space or surface environment at any wavelength from below 50 nm to beyond 12 microns with available array detectors. By our efforts, we have defined simple, low cost, no-moving parts DASI's capable of carrying out hyperspectral science measurements for solar system exploration missions, e.g. for martian, asteroid, lunar, or cometary surveys. DASI capabilities can be utilized to minimize cost, weight, power, pointing, and other physical requirements while maximizing the science data return for spectral mapping missions. Our success in the development of DASI's has become and continues to be an important influence on the efforts of the best research groups developing remote sensing instruments for space and other applications.
Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.
This paper serves a twofold purpose: characterize the behavior of a reconfigurable chip exposed to radiation; and demonstrate a method for functionality recovery due to Total Ionizing Dose (TID) effects. The experiments are performed using a PL developed reconfigurable device, a Field Programmable Transistor Array (FPTA). The paper initially describes experiments on the characterization of the NMOS transistor behavior for TID values up to 300krad. The behavior of analog and digital circuits downloaded onto the FPTA chip is also assessed for TID effects. This paper also presents a novel approach for circuit functionality recovery due to radiation effects based on Evolvable Hardware. The key idea is to reconfigure a programmable device, in-situ, to compensate, or bypass its degraded or damaged components. Experiments with total radiation dose up to 300kRad show that while the functionality of a variety of circuits, including digital gates, a rectifier and a Digital to Analog Converter implemented on a FPTA-2 chip is degraded/lost at levels before 200kRad, the correct functionality can be recovered through the proposed evolutionary approach and the chips are able to survive higher radiation, for several functions in excess of total radiation dose of 250kRad.
The Annular Suspension and Pointing System (ASPS) is a payload auxiliary pointing device of the Space Shuttle. The ASPS is comprised of two major subassemblies, a vernier and a coarse pointing subsystem. The experiment is attached to a mounting plate/rim combination which is suspended on magnetic bearing/actuators (MBA) strategically located about the rim. Fine pointing is achieved by gimballing the plate/rim within the MBA gaps. Control about the experiment line-of-sight is obtained through the use of a non-contacting rim drive and positioning torquer. All sensors used to close the servo loops on the vernier system are noncontacting elements. Therefore, the experiment is a free-flyer constrained only by the magnetic forces generated by the control loops.
This paper argues in favor of adaptive reconfiguration as a technique to expand the operational envelope of analog electronics for extreme environments (EE). In addition to hardening-by-process and hardening-by-design, "hardening-by-reconfiguration", when applicable, could be used to mitigate drifts, degradation, or damage on electronic devices (chips) in EE, by using re-configurable devices and an adaptive self-reconfiguration of their circuit topology. Conventional circuit design exploits device characteristics within a certain temperature/radiation range; when that is exceeded, the circuit function degrades. On a reconfigurable device, although component parameters change in EE, as long as devices still operate, albeit degraded, a new circuit design, suitable for new parameter values, may be mapped into the reconfigurable structure to recover the initial circuit function. Partly degraded resources are still used, while completely damaged resources are bypassed. Designs suitable for various environmental conditions can be determined prior to operation or can be determined in-situ, by adaptive reconfiguration algorithms running on built-in digital controllers. Laboratory demonstrations of this technique were performed by JPL in several independent experiments in which bulk CMOS reconfigurable devices were exposed to, and degraded by, low temperatures (approx. 196 C), high temperatures (approx.300 C) or radiation (300kRad TID), and then recovered by adaptive reconfiguration using evolutionary search algorithms. Taking this technology from Technology Readiness Level (TRL) 3 to TRL 5 is the target of a current NASA project.
proposed joint-transform optical correlator (JTOC) would be capable of operating as a real-time pattern-recognition processor. The key correlation-filter reading/writing medium of this JTOC would be an updateable holographic photopolymer. The high-resolution, high-speed characteristics of this photopolymer would enable pattern-recognition processing to occur at a speed three orders of magnitude greater than that of state-of-the-art digital pattern-recognition processors. There are many potential applications in biometric personal identification (e.g., using images of fingerprints and faces) and nondestructive industrial inspection. In order to appreciate the advantages of the proposed JTOC, it is necessary to understand the principle of operation of a conventional JTOC. In a conventional JTOC (shown in the upper part of the figure), a collimated laser beam passes through two side-by-side spatial light modulators (SLMs). One SLM displays a real-time input image to be recognized. The other SLM displays a reference image from a digital memory. A Fourier-transform lens is placed at its focal distance from the SLM plane, and a charge-coupled device (CCD) image detector is placed at the back focal plane of the lens for use as a square-law recorder. Processing takes place in two stages. In the first stage, the CCD records the interference pattern between the Fourier transforms of the input and reference images, and the pattern is then digitized and saved in a buffer memory. In the second stage, the reference SLM is turned off and the interference pattern is fed back to the input SLM. The interference pattern thus becomes Fourier-transformed, yielding at the CCD an image representing the joint-transform correlation between the input and reference images. This image contains a sharp correlation peak when the input and reference images are matched. The drawbacks of a conventional JTOC are the following: The CCD has low spatial resolution and is not an ideal square-law detector for the purpose of holographic recording of interference fringes. A typical state-of-the-art CCD has a pixel-pitch limited resolution of about 100 lines/mm. In contrast, the holographic photopolymer to be used in the proposed JTOC offers a resolution > 2,000 lines/mm. In addition to being disadvantageous in itself, the low resolution of the CCD causes overlap of a DC term and the desired correlation term in the output image. This overlap severely limits the correlation signal-to-noise ratio. The two-stage nature of the process limits the achievable throughput rate. A further limit is imposed by the low frame rate (typical video rates) of low- and medium-cost commercial CCDs.
Optocoupler failures occurred on the Topex-Poseidon spacecraft after about two years of operation. Later work in the laboratory showed that the failures were due to extreme sensitivity of LEDs within the optocouplers to displacement damage from protons. Although earlier work had been done on displacement damage in light-emitting diodes, none of the devices studied previously had been heavily damaged at the low radiation levels where the optocouplers failed in space. Subsequent work has shown that LED damage varies over an extremely wide range, depending on the particular manufacturing technology. This paper discusses proton degradation of linear and digital optocouplers. One obvious way to harden optocoupler technologies is to select LEDs that are more resistant to displacement damage. A direct comparison is made of degradation of a commercial linear optocoupler from one manufacturer with a modified version of the same device with a different LED technology. Other factors, including degradation of optical photoresponse and transistor -ain are also discussed, along with basic comparisons of digital and analog optocouplers. Linear optocouplers are designed with somewhat different requirements than digital optocouplers, which not only affects their radiation response but also the interpretation of radiation test data.
An overview of activities in the automatic rendezvous and docking area is presented. A representative mission scenario is covered. A statement of the problem is made and the requirements for the extraction of relative attitude and position data are delineated. A systems block diagram is included and the integral functions which go to make up an autonomous docking system is described. A system was simulated, and the digital simulation is described along with some representative results of a system based a laser ranging device as the sensor. A television camera as the ranging sensor was also considered, one video based automatic docking scheme is discussed along with some representative results.
Barker codes can be realized as simple digital preprocessors, or with the use of a delay line, can be realized as an analogue device. Assuming the process observed has an autocorrelation time that is long compared to the code length, a gain in signal to noise, G = N where N is the number of elements in the code, may be realized. Typically Barker codes are implemented by shifting the phase of the transmitted signal by 0 or 180 degrees according to the code pattern. A typical detection scheme is shown where the output of the radar receiver is delayed by an analogue delay line or a shift register. The signal in each element of the delay line or shift register is continuously multiplied by the code and all elements are summed. A principal disadvantage was the sidelobe response. In the case of MST or ST radar echoes where there is a dynamic range as large as 60 dB, these unwanted sidelobes cause an increase in the apparent width of atmospheric layers, or some narrow layer to appear at several altitudes. The sidelobes of a Barker code may be reduced by tapering the response of the decoder. Optimum tapers, are shown. It is found that the sidelobe response is greatly reduced with very little loss in G.
A simple and inexpensive Space Shuttle experimental apparatus to conduct microgravity melting and solidification is presented. A GAS space furnace was initially developed as a student design project at the USAF Academy and further refined at NASA Lewis. The experiment package consists of a melting chamber, battery power system, temperature data recording systems, and electronic controller. The melting chamber is a thin-walled tube wrapped by heating resistance wire. Thermocouples are used to record the specimen thermal history. Power is supplied by 2-V batteries wired to produce 360 W. The mV output of the thermocouples is amplified, cold-junction compensated, and converted to a frequency which is then recorded on an off-the-shelf cassette tape recorder. A backup data recording system which digitizes the amplified signal and records the data on EEPROMs has also been included. This experimental device demonstrates that basic science research can be kept simple and inexpensive.
The authors constructed and tested a prototype digital readout system for optical spark chambers using a linear, solid-state charge-coupled-device detector array. Position resolution of 0.013 mm (sigma) over a 25-cm field of view has been demonstrated. It is concluded that this technique should permit the construction of economical, lightweight and low-power trajectory hodoscopes for use in cosmic-ray instrumentation on balloons and in spacecraft.
Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond earth's atmosphere. Traditional approaches to preserve electronics incorporate shielding, insulation and redundancy at the expense of power and weight. However, a novel way of bypassing these problems is the concept of evolutionary hardware. A reconfgurable device, consisting of several switches interconnected with analog/digital parts, is controlled by an evolutionary processor (EP). When the EP detects degradation in the circuit it sends signals to reconfgure the switches, thus forming a new circuit with the desired output. This concept has been developed since the mid-90s, but one problem remains - the EP cannot degrade substantially. For this reason, extensive testing at extreme temperatures (-180' to 120(deg)C) has been done on devices found on FPGA boards (taking the role of the EP) such as the Analog to Digital and the Digital to Analog Converter. Analysis of the results has shown that FPGA boards implementing EP with some compensation may be a practical solution to evolving circuits. This paper describes results on the tests of data converters at extreme temperatures.