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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28

Circuitry selectively limits data storage in general purpose computer

Circuitry limits storage in the memory of a stored program general purpose digital computer by permitting storage or writing to certain, specified areas of memory. The limit register used in the computer is easily set under program control, and the memory block size and position is readily changed to suit each specific program.

Slopper, D. K.↗

Computer grading of examinations

A method, using IBM cards and computer processing, automates examination grading and recording and permits use of computational problems. The student generates his own answers, and the instructor has much greater freedom in writing questions than is possible with multiple choice examinations.

Frigerio, N. A.↗

Encode/Decode facility for FORTRAN 4

An ENCODE and DECODE facility, a subroutine added to a FORTRAN 4 library, allows alphanumeric data to be transfered to or from an area in memory rather than to or from external input/output devices. A buffer storage array allows the operations on the data prior to writing.

Cohn, C. E.↗

JFLIP-JPL FORTRAN language with interval pre-processor

FLIP and TMG are a FORTRAN pre-processor and a Syntax-Directed-Compiler used to describe the language in which the former is written. They provide those who write in FORTRAN 4 with greater language flexibility and power.

Germann, D. A.↗

Batch fabrication process development for ferrite logic conductors

A process for fabricating ultrareliable magnetic ferrite logic circuits is described in which the conductors are formed by a combination of two batch type processes - photolithography and electroplating - and a mechanized writing process for completing conductors in the third dimension. Up to 4 turns, through an aperture 1 mm in diameter, are formed by the described process. The number of joints in the conductors is reduced by use of this process to only those which are required for input, output and power connections of a logic block. To demonstrate feasibility, 8-stage magnetic ring counter circuits have been fabricated.

Heckler, C. H., Jr.↗

Program documentation standards

A style manual is presented to serve as a reference and guide for system and program documentation. It is intended to set standards for documentation, prescribing the procedures to be followed, format to be used, and information to be produced. The standards for program documentation specify the extent to which the programmer should support his efforts in writing. The first three sections of the manual (system, program, and operation descriptions) contain information of particular interest to management, operators, and program users, respectively. Each section was designed as a self-sufficient description from the management, operator, or user point of view.

Parker, D. A.↗

Operational testing of system for automatic sleep analysis

Tables on the performance, under operational conditions, of an automatic sleep monitoring system are presented. Data are recorded from patients who were undergoing heart and great vessel surgery. This study resulted in cap, electrode, and preamplifier improvements. Children were used to test the sleep analyzer and medical console write out units. From these data, an automatic voltage control circuit for the analyzer was developed. A special circuitry for obviating the possibility of incorrect sleep staging due to the presence of a movement artifact was also developed as a result of the study.

Kellaway, P.↗

Conceptual design of a 10 to the 8th power bit magnetic bubble domain mass storage unit and fabrication, test and delivery of a feasibility model

The conceptual design of a highly reliable 10 to the 8th power-bit bubble domain memory for the space program is described. The memory has random access to blocks of closed-loop shift registers, and utilizes self-contained bubble domain chips with on-chip decoding. Trade-off studies show that the highest reliability and lowest power dissipation is obtained when the memory is organized on a bit-per-chip basis. The final design has 800 bits/register, 128 registers/chip, 16 chips/plane, and 112 planes, of which only seven are activated at a time. A word has 64 data bits +32 checkbits, used in a 16-adjacent code to provide correction of any combination of errors in one plane. 100 KHz maximum rotational frequency keeps power low (equal to or less than, 25 watts) and also allows asynchronous operation. Data rate is 6.4 megabits/sec, access time is 200 msec to an 800-word block and an additional 4 msec (average) to a word. The fabrication and operation are also described for a 64-bit bubble domain memory chip designed to test the concept of on-chip magnetic decoding. Access to one of the chip's four shift registers for the read, write, and clear functions is by means of bubble domain decoders utilizing the interaction between a conductor line and a bubble.

Source record↗

Remote sensing on Indian and public lands

The use of remote sensing techniques by the Bureaus of Indian Affairs and Land Management in planning resource problems, making decisions, writing environmental impact statements, and monitoring their respective programs is investigated. For Indian affairs, data cover the Papago, Fort Apache, San Carlos, and South Dakota Reservations. For the Land Management Office, data cover cadastral surveys, California desert study, range watersheds, and efforts to establish a natural resources information system.

Torbert, G. B.↗

The practical implementation of fatigue requirements to military aircraft and helicopters in the United Kingdom

The methods adopted in the United Kingdom to ensure the structural integrity of military aeroplanes and helicopters from the fatigue point of view are described. The procedure adopted from the writing of the specification to the monitoring of fatigue life in service are presented along with the requirements to be met and the way in which they are satisfied. Some of the outstanding problems that remain to be solved are indicated.

Maxwell, R. D. J.↗

Application of holographic optical techniques to bulk memory.

Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.

Anderson, L. K.↗

A translator and simulator for the Burroughs D machine

The D Machine is described as a small user microprogrammable computer designed to be a versatile building block for such diverse functions as: disk file controllers, I/O controllers, and emulators. TRANSLANG is an ALGOL-like language, which allows D Machine users to write microprograms in an English-like format as opposed to creating binary bit pattern maps. The TRANSLANG translator parses TRANSLANG programs into D Machine microinstruction bit patterns which can be executed on the D Machine simulator. In addition to simulation and translation, the two programs also offer several debugging tools, such as: a full set of diagnostic error messages, register dumps, simulated memory dumps, traces on instructions and groups of instructions, and breakpoints.

Roberts, J.↗