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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28
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NASA NTRS1984

Simulations for Full Unit-memory and Partial Unit-memory Convolutional Codes with Real-time Minimal-byte-error Probability Decoding Algorithm

A program which was written to simulate Real Time Minimal-Byte-Error Probability (RTMBEP) decoding of full unit-memory (FUM) convolutional codes on a 3-bit quantized AWGN channel is described. This program was used to compute the symbol-error probability of FUM codes and to determine the signal to noise (SNR) required to achieve a bit error rate (BER) of 10 to the minus 6th power for corresponding concatenated systems. A (6,6/30) FUM code, 6-bit Reed-Solomon code combination was found to achieve the required BER at a SNR of 1.886 dB. The RTMBEP algorithm was then modified for decoding partial unit-memory (PUM) convolutional codes. A simulation program was also written to simulate the symbol-error probability of these codes.

Vo, Q. D.↗
NASA NTRS1984

Mathematical algorithms to maximize performance in numerical weather prediction

Numerical weather prediction models, which involve the solution of non-linear partial differential equations at points on an extensive three dimensional grid, are ideally suited for processing on vector machines. It was logical therefore that the new global forecast model to be implemented at the Meteorological Office should be written in vector code for the CYBER 205. In order to achieve full efficiency and to reduce storage requirements the model used 32-bit arithmetic which was found to provide high enough precision. Unfortunately, however, the trigonometrical and logarithmic functions provided by CDC could only handle 64-bit vectors and, although written in efficient scalar code, did not take advantage of the special facilities of a vector processor. It was therefore necessary to rewrite the functions in vector code to handle both 32 and 64-bit vectors. There was also no half-precision compiler available for the Cyber 205 at that time and so the functions, like the model, had to make extensive use of the special call syntax. This made the code more difficult to write but it allowed much greater flexibility in that it became possible to access the exponent of a floating-point number independently of its coefficient. A description is given of the technique and the results which were achieved are summarized.

Foreman, A.↗
NASA NTRS1984

The PDS-VAX intelligent plate scanning system of Trieste Astronomical Observatory

An intelligent subsystem for interfacing a PDS1010A digital microdensitometer to a DEC DR11W DMA 16 bit UNIBUS port in DEC VAX VMS environment was tested. The subsystem employs two MOTOROLA M68000 microprocessors with 128 KB data memory. The PDS primitives and the user defined high level scanning functions and preprocessing modules are loaded from the host computer into two 8 KB RAM memories in the microprocessors using a dedicated PDS control language. The subsystem is planned to employ a nonstandard photomultiplier electronics. Two design schemes were tested: (1) based on three amplifiers of gain 10 cascaded and multiplexed to a 12 bit AD converter, and (2) based on a single amplifier of gain 100 and two 14 bit AD converters.

Pucillo, M.↗
NASA NTRS1984

Reed Solomon codes for error control in byte organized computer memory systems

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. Some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation are presented. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative algorithm to find the error locator polynomial.

Lin, S.↗
NASA NTRS1983

Large array VLSI filter

A 35 by 35 element pipelined convolutional kernel is being fabricated using VLSI chips, each containing a 5 by 1 segment of the kernel. Three levels of printed circuitry are used: the first level is used for the VLSI chips, the second level connects seven chips together on one platform, and the third level connects seven platforms with associated delay lines, all fitting on one board. Therefore, on each board there are seven rows of the kernel containing 245 multipliers and adders, and five such boards complete the kernel array. Each multiplier accepts an 8 bit picture element which is multiplied by a 16 bit weight. A truncated 22 bit product is added to a previously stored product sum and the results are shifted to the following multiplier as the next picture element is read in. The multiplier uses a modified Booth algorithm to reduce the number of shift add operations nearly in half. The filter box is presently configured as an ancillary box to a VAX 11/780, but can be connected to essentially any CPU. The I/O bandwidth is easily compatible with most CPU devices.

Nathan, R.↗
NASA NTRS1984

A high-accuracy optical linear algebra processor for finite element applications

Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

Casasent, D.↗
NASA NTRS1984

Performance of OOK and low-order PPM modulations in optical communications when using APD-based receivers

The paper computes direct detection laser communications receiver performance when using avalanche photodiode (APD) detectors. The performances are compared in terms of bit error probability vs average signal required per bit when the transmitter uses either on-off keying (OOK) or low-order PPM formats. It is shown that QPPM requires 3 dB less signal than OOK, while BPPM requires the same or slightly more than OOK for the same performance. Optimum APD gain values range from 200 to 400. When using QPPM, k(eff) = 0.006, and optimum gain, 60 signal counts/bit are required at 500 Mbits/s for a 0.000001 bit error probability. It is concluded that QPPM may be an attractive signaling format for some fiber or free space laser communication applications.

Abshire, J. B.↗
NASA NTRS1986

Data reduction, management, and analysis software for CID

In an overview of the Data Reduction System, three major steps are examined. First, the raw data tapes were selected from the onboard recorders. These tapes should provide the best quality data for the data reduction software system. These tapes contained 352 channels of data, plus the monitor channels recorded in 8 bit Pulsed Coded Modulation (PCM) words. The next step consists of transcribing the PCM tapes from 8 bit serial digital data to 8 bit parallel digital data. This puts the data in the correct format for processing. The transcription process was accomplished here at LaRC in the Central Data Transportation Facility (CDTF). The last step in this 3 step process is to process the data through the reduction system developed for the Impact Dynamic Research Facility in the early part of 1980. Processing system criteria, system interface routines, and engineering units program that reads digitized data from tapes, and file management programs are discussed.

Davis, C. W.↗
NASA NTRS1986

Error control techniques for satellite and space communications

High rate concatenated coding systems with trellis inner codes and Reed-Solomon (RS) outer codes for application in satellite communication systems are considered. Two types of inner codes are studied: high rate punctured binary convolutional codes which result in overall effective information rates between 1/2 and 1 bit per channel use; and bandwidth efficient signal space trellis codes which can achieve overall effective information rates greater than 1 bit per channel use. Channel capacity calculations with and without side information performed for the concatenated coding system. Concatenated coding schemes are investigated. In Scheme 1, the inner code is decoded with the Viterbi algorithm and the outer RS code performs error-correction only (decoding without side information). In scheme 2, the inner code is decoded with a modified Viterbi algorithm which produces reliability information along with the decoded output. In this algorithm, path metrics are used to estimate the entire information sequence, while branch metrics are used to provide the reliability information on the decoded sequence. This information is used to erase unreliable bits in the decoded output. An errors-and-erasures RS decoder is then used for the outer code. These two schemes are proposed for use on NASA satellite channels. Results indicate that high system reliability can be achieved with little or no bandwidth expansion.

Costello, D. J., Jr.↗
NASA NTRS1985

Error control for reliable digital data transmission and storage systems

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. In this paper we present some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative alorithm to find the error locator polynomial. Two codes are considered: (1) a d sub min = 4 single-byte-error-correcting (SBEC), double-byte-error-detecting (DBED) RS code; and (2) a d sub min = 6 double-byte-error-correcting (DBEC), triple-byte-error-detecting (TBED) RS code.

Costello, D. J., Jr.↗
NASA NTRS1985

An adaptive quantization method for burst mode synthetic aperture radar data

Synthetic aperture radar (SAR) has high data rate because it collects and processes the data coherently. The data rate limitation of the system has to be satisfied while maintaining good image quality. Thus, a quantizer with minimum data rate and high SNR should be employed. An adaptive quantization method is proposed for the burst mode SAR. This adaptive quantizer uses uniformly quantized data to select a subset of bits which is equivalent to changing the step size of the uniform quantizer. A simple implementation which uses the previous burst data to compute the local statistics for the bit selection is presented. The use of previous burst simplifies the implementation because it does not require storage or delay; however, an abrupt change in the terrain could result in incorrect bit selection. An error analysis of this implementation and comparison of two burst mode SAR images formed using the uniformly quantized and adaptively quantized data is presented.

Joo, T. H.↗
NASA NTRS1986

A cascaded coding scheme for error control and its performance analysis

A coding scheme for error control in data communication systems is investigated. The scheme is obtained by cascading two error correcting codes, called the inner and the outer codes. The error performance of the scheme is analyzed for a binary symmetric channel with bit error rate epsilon < 1/2. It is shown that, if the inner and outer codes are chosen properly, extremely high reliability can be attained even for a high channel bit error rate. Various specific example schemes with inner codes ranging from high rates to very low rates and Reed-Solomon codes are considered, and their probabilities are evaluated. They all provide extremely high reliability even for very high bit error rates, say 0.1 to 0.01. Several example schemes are being considered by NASA for satellite and spacecraft down link error control.

Lin, S.↗
NASA NTRS1986

Voyager Uranus encounter 0.2lbf T/VA short pulse test report

The attitude control thrusters on the Voyager spacecraft were tested for operation at electrical pulse widths of less than the current 10-millisecond minimum to reduce impulse bit and, therefore, reduce image smear of pictures taken during the Uranus encounter. Thrusters with the identical configuration of the units on the spacecraft were fired in an altitude chamber to characterize impulse bit and impulse bit variations as a function of electrical pulse widths and to determine if the short pulses decreased thruster life. Pulse widths of 4.0 milliseconds provide approximately 45 percent of the impulse provided by a 10-ms pulse, and thruster-to-thruster and pulse-to-pulse variation is approximately plus or minus 10 percent. Pulse widths shorter than 4 ms showed wide variation, and no pulse was obtained at 3 ms. Three thrusters were each subjected to 75,000 short pulses of 4 ms or less without performance degradation. A fourth thruster exhibited partial flow blockage after 13,000 short pulses, but this was attributed to prevous test history and not short pulse exposure. The Voyager attitude control thrusters should be considered flight qualified for short pulse operation at pulse widths of 4.0 ms or more.

Source record↗
NASA NTRS1986

A cascaded coding scheme for error control and its performance analysis

A coding scheme is investigated for error control in data communication systems. The scheme is obtained by cascading two error correcting codes, called the inner and outer codes. The error performance of the scheme is analyzed for a binary symmetric channel with bit error rate epsilon <1/2. It is shown that if the inner and outer codes are chosen properly, extremely high reliability can be attained even for a high channel bit error rate. Various specific example schemes with inner codes ranging form high rates to very low rates and Reed-Solomon codes as inner codes are considered, and their error probabilities are evaluated. They all provide extremely high reliability even for very high bit error rates. Several example schemes are being considered by NASA for satellite and spacecraft down link error control.

Lin, Shu↗
NASA NTRS1986

The electron-cyclotron maser instability as the source of solar type V continuum

In this paper, it is proposed that the electron-cyclotron (EC) maser instability can be the source of solar type V bursts. The propagation of electrons up an open field line is examined, and it is shown that the resultant distribution can be subject to the bump-in-tail (BIT) or the EC maser instabilities, or both. The characteristics of the emission from the BIT and EC maser instabilities when they are driven by such distributions are compared. It is proposed that type V bursts are produced by the coalescence of the upper hybrid waves produced by the maser instability, while type IIIs are produced by the BIT instability.

Winglee, R. M.↗
NASA NTRS1986

Image data compression with vector quantization in the transform domain

In this paper, an algorithm is presented for image data compression based upon vector quantization of the two-dimensional discrete cosine transformed coefficients. The ac energies of the transformed blocks are used to classify them into eight different ac classes. The ac coefficients of the transformed blocks of class one are set to zero, while those of classes two through eight are transmitted by seven different code books. The dc coefficients of all eight classes are scalar quantized by an adaptive uniform quantizer. As a result, only 4.5 bits instead of eight bits are required to transmit the dc coefficient with negligible additional degradation. Overall, this algorithm requires approximately 0.75 bits per pixel and gives an average reconstruction error of 7.1.

Abdelwahab, A. A.↗
NASA NTRS1986

A high quality image compression scheme for real-time applications

Many image compression or coding techniques have been developed to reduce the amount of bits of information needed to represent digital images. Among these, Vector Quantization (VQ) seems to have the edge; its theoretical distortion is lower than that of other block coding techniques at comparable bit rates. However, the application of Vector Quantization remains limited due to its high computational complexity. Presently, it is limited to low to medium quality image compression. In this paper it is shown that VQ can be mapped onto VLSI implementation via systolic type architecture, making real time application possible. In addition, it is shown that using multistage or cascade VQ high quality images can be obtained at very low bit rates for real time applications while using smaller codebooks than is necessary in single stage VQ. Examples of processed images are presented.

Ramamoorthy, P. A.↗
NASA NTRS1988

Optical communication with semiconductor laser diodes

Slot timing recovery in a direct detection optical PPM communication system can be achieved by processing the photodetector waveform with a nonlinear device whose output forms the input to a phase lock group. The choice of a simple transition detector as the nonlinearity is shown to give satisfactory synchronization performance. The rms phase error of the recovered slot clock and the effect of slot timing jitter on the bit error probability were directly measured. The experimental system consisted of an AlGaAs laser diode (lambda = 834 nm) and a silicon avalanche photodiode (APD) photodetector and used Q=4 PPM signaling operated at a source data rate of 25 megabits/second. The mathematical model developed to characterize system performance is shown to be in good agreement with actual performance measurements. The use of the recovered slot clock in the receiver resulted in no degradation in receiver sensitivity compared to a system with perfect slot timing. The system achieved a bit error probability of 10 to the minus 6 power at received signal energies corresponding to an average of less than 60 detected photons per information bit.

Davidson, F.↗