Search NASA⌕ Search

SEARCH · Search NASA

Results for “switching device”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

A Compact 50kW High Power Density, Hybrid 3-Level Paralleled T-type Inverter for More Electric Aircraft Applications

The demand for high performing, lightweight, reliable inverters, increased the scope of wide bandgap and high-switching frequency based solutions. To achieve such high efficiency inverters, it is vital to focus on the system level design considerations to maximize the benefits of these advanced technologies. This paper presents an improved design based on considerations to further reap the benefits of choosing the right inverter topology; increased capabilities through paralleling devices, with reduced total number of switches; and designing a planarized inverter with PCB based busbar. Appropriate thermal analysis and heatsink design has aided in increased system power density along with the overall efficiency. Demonstration of a 50kW 3-phase 3-level paralleled T-type SiC inverter operating at 40kHz switching frequency for aircraft applications is shown to evaluate the benefits of proposed design methodology. Here, the prototype achieves a high power density of 11kW/L.

42 ENGINEERING↗
NASA NTRS1983

High-temperature optically activated GaAs power switching for aircraft digital electronic control

Gallium arsenide high-temperature devices were fabricated and assembled into an optically activated pulse-width-modulated power control for a torque motor typical of the kinds used in jet engine actuators. A bipolar heterojunction phototransistor with gallium aluminum arsenide emitter/window, a gallium arsenide junction field-effect power transistor and a gallium arsenide transient protection diode were designed and fabricated. A high-temperature fiber optic/phototransistor coupling scheme was implemented. The devices assembled into the demonstrator were successfully tested at 250 C, proving the feasibility of actuator-located switching of control power using optical signals transmitted by fibers. Assessments of the efficiency and technical merits were made for extension of this high-temperature technology to local conversion of optical power to electrical power and its control at levels useful for driving actuators. Optical power sources included in the comparisons were an infrared light-emitting diode, an injection laser diode, tungsten-halogen lamps and arc lamps. Optical-to-electrical power conversion was limited to photovoltaics located at the actuator. Impedance matching of the photovoltaic array to the load was considered over the full temperature range, -55 C to 260 C. Loss of photovoltaic efficiency at higher temperatures was taken into account. Serious losses in efficiency are: (1) in the optical source and the cooling which they may require in the assumed 125 C ambient, (2) in the decreased conversion efficiency of the gallium arsenide photovoltaic at 260 C, and (3) in impedance matching. Practical systems require improvements in these areas.

Berak, J. M.↗
DOE OSTI2020

( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.

42 ENGINEERING↗
NASA NTRS2003

Effects Of Environmental And Operational Stresses On RF MEMS Switch Technologies For Space Applications

Micro Electro Mechanical Systems (MEMS) have been heralded for their ability to provide tremendous advantages in electronic systems through increased electrical performance, reduced power consumption, and higher levels of device integration with a reduction of board real estate. RF MEMS switch technology offers advantages such as low insertion loss (0.1- 0.5 dB), wide bandwidth (1 GHz-100 GHz), and compatibility with many different process technologies (quartz, high resistivity Si, GaAs) which can replace the use of traditional electronic switches, such as GaAs FETS and PIN Diodes, in microwave systems for low signal power (x < 500 mW) applications. Although the electrical characteristics of RF MEMS switches far surpass any existing technologies, the unknown reliability, due to the lack of information concerning failure modes and mechanisms inherent to MEMS devices, create an obstacle to insertion of MEMS technology into high reliability applications. All MEMS devices are sensitive to moisture and contaminants, issues easily resolved by hermetic or near-hermetic packaging. Two well-known failure modes of RF MEMS switches are charging in the dielectric layer of capacitive membrane switches and contact interface stiction of metal-metal switches. Determining the integrity of MEMS devices when subjected to the shock, vibration, temperature extremes, and radiation of the space environment is necessary to facilitate integration into space systems. This paper will explore the effects of different environmental stresses, operational life cycling, temperature, mechanical shock, and vibration on the first commercially available RF MEMS switches to identify relevant failure modes and mechanisms inherent to these device and packaging schemes for space applications. This paper will also describe RF MEMS Switch technology under development at NASA GSFC.

Jah, Muzar↗
DOE OSTI2025

Development of a reliable Potting process for Photoconductive Semiconductor Switches (PCSS)

Electrical potting is an important process to protect semiconductor devices from damaging external elements (mechanical stress, moisture, high voltage, etc.) and provides structural support for delicate devices for electrical connectivity to a larger platform. This internship will focus on the development of a universal potting jig for photoconductive semiconductor switches (PCSS). The goal is to design a reliable compression jig that is cross compatible with various PCSS designs that allow for easy potting of devices with a high dielectric breakdown strength material. The challenge with the current potting jig is that the design is only compatible with one style of PCSS and applies uneven pressure that can lead to leakage of potting material. Our approach is to move from a design that applies pressure by binder clip to utilizing a micrometer based compressing jig for a reliable packaging process that can pot a variety of devices without having to have a unique compressing jig for each of style of PCSS. Possible roadblocks with the new design include epoxy leakage into the optical path and misalignment of the electrode – metal contact bond.

42 ENGINEERING↗
DOE OSTI2024

Ultrafast high-endurance memory based on sliding ferroelectrics

The persistence of voltage-switchable collective electronic phenomena down to the atomic scale has extensive implications for area- and energy-efficient electronics, especially in emerging nonvolatile memory technology. We investigate the performance of a ferroelectric field-effect transistor (FeFET) based on sliding ferroelectricity in bilayer boron nitride at room temperature. Sliding ferroelectricity represents a different form of atomically thin two-dimensional (2D) ferroelectrics, characterized by the switching of out-of-plane polarization through interlayer sliding motion. We examined the FeFET device employing monolayer graphene as the channel layer, which demonstrated ultrafast switching speeds on the nanosecond scale and high endurance exceeding 10 11 switching cycles, comparable to state-of-the-art FeFET devices. These characteristics highlight the potential of 2D sliding ferroelectrics for inspiring next-generation nonvolatile memory technology.

Science & Technology - Other Topics↗
NASA NTRS1983

Development and fabrication of an augmented power transistor

The development of device design and processing techniques for the fabrication of an augmented power transistor capable of fast switching and high voltage power conversion is discussed. The major device goals sustaining voltages in the range of 800 to 1000 V at 80 A and 50 A, respectively, at a gain of 14. The transistor switching rise and fall times were both to have been less than 0.5 microseconds. The development of a passivating glass technique to shield the device high voltage junction from moisture and ionic contaminants is discussed as well as the development of an isolated package that separates the thermal and electrical interfaces. A new method was found to alloy the transistors to the molybdenum disc at a relatively low temperature. The measured electrical performance compares well with the predicted optimum design specified in the original proposed design. A 40 mm diameter transistor was fabricated with seven times the emitter area of the earlier 23 mm diameter device.

Geisler, M. J.↗
DOE OSTI2020

Device-Level Multidimensional Thermal Dynamics With Implications for Current and Future Wide Bandgap Electronics

Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.

42 ENGINEERING↗
DOE OSTI2022

Demonstrating Distribution System Resiliency through Grid-Edge Microgrids, on a Multi-Site Networked Hardware-in-Loop Platform

With the increasing penetration of Distributed Energy Resources (DERs) at the grid-edge, power systems include more energy storage, remote switches, relays, voltage regulators, and other intelligent electronic devices (IED). Effective control of these grid-edge devices by using Advanced Distribution Management Systems (ADMS) can yield substantial improvements to the resiliency and power quality of distribution systems. In this paper, improvements to the resiliency of a distribution system are demonstrated using a multi-site evaluation environment consisting of a real-time Hardware-in-Loop (HIL) setup in which DERs and other IEDs are modeled; and an ADMS which monitors and is able to control the distribution system assets. The HIL model and the ADMS are located 2400 km away, with communication between the sites enabled by a data manager using Distributed Network Protocol 3 (DNP3), demonstrating the system's capabilities even over long distances. After a simulated transmission system failure in the HIL demonstration setup, DERs and other devices are operated to restore critical loads and node voltage profile (to within the 'nominal +/-5%' band) in the distribution system.

ADMS↗
DOE OSTI2021

True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching

This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. Furthermore, these results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV. Index Terms— GaN, HEMT, power electronics, hard switching, breakdown voltage, overvoltage, ruggedness, reliability.

42 ENGINEERING↗
DOE OSTI2026

Gallium Arsenide Semiconductor Opening Switches: Enabling Nanosecond High Powering Pulsed Systems

The goal of this work awas to investigate design manufacturing semiconductor opening switches (SOS) in both silicon and gallium arsenide (GaAs). Solid-state opening switches are critical components for pulsed power systems and applications in directed energy, dielectric wall accelerators, and novel semiconductor manufacturing techniques. Under this funding, we have developed silicon SOS designs that suppresses an unwanted prepulse, increases the peak output voltage by about 10 percent, and reduces the pulse rise time by ~ 4x compared with more conventional profiles. Through this effort we have improved device fabrication and bonding techniques. Additionally, work on this the GaAs opening switch has defined a unique application space that these devices are suited for. GaAs opening switches have short risetimes and pulse widths compared to silicon devices, however the short carrier lifetime of GaAs makes the circuit design more challenging than in silicon. For high PRF operation, the lifetime of the GaAs is an advantage compared to silicon. TCAD simulations of GaAs devices have been used to optimize a GaAs profile. Additionally, we have designed pulsers with sub 50ns reserve pump times and tested GaAs COTs PIN diodes in them.

42 ENGINEERING↗
DOE OSTI2022

Design Considerations for Developing 1.2 kV 4H-SiC BiDFET-enabled Power Conversion Systems

Bidirectional switches are essential for cycloconverter and matrix converter applications to facilitate single-stage AC-AC conversion without intermediate energy storage elements. The 1.2 kV 4H-SiC BiDFET was developed as the first monolithic bidirectional SiC power transistor. This paper describes the design considerations taken into account while creating the BiDFET device and developing custom packages for housing the switch in discrete form for low power applications and in module form for high-power applications. The realized switches are characterized for their on-state and switching performance. The versatility of the BiDFET device is demonstrated by operating a single BiDFET H-bridge in voltage-source-inverter and current-source-inverter topologies only by varying the gate bias on the individual BiDFETs and reversing the input-output connections.

Bidirectional, Silicon Carbide, Half-Bridge Module↗
NASA NTRS1979

Bond graph for modeling valves and switches

Digital graph element represents two-state devices. It can be used in modeling mechanical stops, backlash, and other discontinuities that occur whenever subsystems are connected or disconnected.

Gebben, V. D.↗
NASA NTRS2006

Power Actuation and Switching Module Test Results

The X2000 Power System Electronics (PSE) is a Jet Propulsion Laboratory (JPL) task to develop a new generation of power system building blocks for use on future deep-space missions. The effort includes the development of electronic components and modules that can be used as building blocks in the design of generic spacecraft power systems. All X2000 avionics components and modules are designed for use in centralized or distributed spacecraft architectures. The Power Actuation and Switching Module (PASM) has been developed under the X2000 program. This component enables a modular and scalable design approach for power switching applications, which can result in a wide variety of power switching architectures using this simple building block. The PASM is designed to provide most of the necessary power switching functions of spacecraft for various Deep Space missions including future missions to Mars, comets, Jupiter and its moons. It is fabricated using an ASIC process that is tolerant of high radiation. The development included two application specific integrated circuits (ASICs) and support circuitry all packaged using High Density Interconnect (HDI) technology. It can be operated in series or parallel with other PASMs. It can be used as a high-side or low-side switch and it can drive thruster valves, pyrotechnic devices such as NASA standard initiators, bus shunt resistors, and regular spacecraft component loads. Each PASM contains two independent switches with internal current limiting and over-current trip-off functions to protect the power subsystem from load faults. During turnon and turnoff each switch can limit the rate of current change (di/dt) to a value determined by the user. Three-way majority-voted On/Off commandability and full switch status telemetry (both analog and digital) are built into the module. This paper is a follow up to the one presented at he IECEC 2004 conference that will include the lessons learned and test results from the development.

X2000↗
NASA NTRS2004

Power Actuation and Switching Module Development

The Deep Space Avionics (DSA) Project is developing a Power Actuation and Switching Module (PASM). This component enables a modular and scalable design approach for power switching applications, which can result in a wide variety of power switching architectures using this simple building block. The PASM is designed to provide most of the necessary power switching functions of spacecraft for various Deep Space missions including future missions to Mars, comets, Jupiter and its moons. It is fabricated using an A SIC process that is tolerant of high radiation. The development includes two application specific integrated circuits (ASICs) and support circuitry all packaged using High Density Interconnect (HDI) technology. It can be operated in series or parallel with other PASMs, It can be used as a high-side or low-side switch and it can drive thruster valves, pyrotechnic devices such as NASA standard initiators, bus shunt resistors, and regular spacecraft component loads. Each PASM contains two independent switches with internal current limiting and over-current trip-off functions to protect the power subsystem from load faults. During turnon and turnoff each switch can limit the rate of current change (di/dt) to a value determined by the user. Threeway majority-voted On/Off commandability and full switch status telemetry (both analog and digital) are built into the module. This paper describes the development process used to design, model, fabricate, and test these compact and versatile power switches. Preliminary test results from prototype HDI PASM hardware are also discussed.

Power Actuation and Switching Module (PASM)↗
NASA NTRS2009

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures over the range of -190 C to +225 C in terms of its voltage/current characteristic curves. The test temperatures included +22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 C. Limited thermal cycling testing was also performed on the device. These tests consisted of subjecting the transistor to a total of twelve thermal cycles between -190 C and +225 C. A temperature rate of change of 10 C/min and a soak time at the test temperature of 10 minutes were used throughout this work. Post-cycling measurements were also performed at selected temperatures. In addition, re-start capability at extreme temperatures, i.e. power switched on while the device was soaking for a period of 20 minutes at the test temperatures of -190 C and +225 C, was investigated.

Patterson, Richard↗
NASA NTRS1979

Development and fabrication of improved power transistor switches

A new class of high-voltage power transistors was achieved by adapting present interdigitated thyristor processing techniques to the fabrication of npn Si transistors. Present devices are 2.3 cm in diameter and have V sub CEO (sus) in the range of 400 to 600V. V sub CEO (sus) = 450V devices were made with an (h sub FE)(I sub C) product of 900A at V sub CE = 2.5V. The electrical performance obtained was consistent with the predictions of an optimum design theory specifically developed for power switching transistors. The device design, wafer processing, and assembly techniques are described. Experimental measurements of the dc characteristics, forward SOA, and switching times are included. A new method of characterizing the switching performance of power transistors is proposed.

Hower, P. L.↗
DOE OSTI2023

Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials

The Abisko project aims to develop an energy-efficient spiking neural network (SNN) computing architecture and software system capable of autonomous learning and operation. The SNN architecture explores novel neuromorphic devices that are based on resistive-switching materials, such as memristors and electrochemical RAM. Equally important, Abisko uses a deep codesign approach to pursue this goal by engaging experts from across the entire range of disciplines: materials, devices and circuits, architectures and integration, software, and algorithms. Here, the key objectives of our Abisko project are threefold. First, we are designing an energy-optimized high-performance neuromorphic accelerator based on SNNs. This architecture is being designed as a chiplet that can be deployed in contemporary computer architectures and we are investigating novel neuromorphic materials to improve its design. Second, we are concurrently developing a productive software stack for the neuromorphic accelerator that will also be portable to other architectures, such as field-programmable gate arrays and GPUs. Third, we are creating a new deep codesign methodology and framework for developing clear interfaces, requirements, and metrics between each level of abstraction to enable the system design to be explored and implemented interchangeably with execution, measurement, a model, or simulation. As a motivating application for this codesign effort, we target the use of SNNs for an analog event detector for a high-energy physics sensor.

97 MATHEMATICS AND COMPUTING↗