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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 523 records · Page 29

Gigarad-tolerant power switches and memory elements

A new class of silicon devices operating without p-n junctions has been studied for radiation hardness. The electric field in these devices is uniform over most of the device, thus causing high-voltage breakdown to increase with electrode spacing. Deep acceptor levels are created in the silicon by diffusing gold atoms into the lattice, or by electron radiation. These acceptor levels, near the center of the band gap, trap out electrons so that the low resistivity of the n-type doped wafer can be raised to intrinsic resistivity. Switching between a high-resistivity state at low currents and a low-resistivity state at high currents occurs at a definite threshold voltage, exhibiting characteristics similar to silicon-controlled rectifiers. Compensating 0.1 ohm-meter (10 ohm-cm) silicon wafers requires electron fluxes of 10 to the 23rd electrons per square meter (10 to the 19th electrons per square centimeter). Experiments demonstrating gamma tolerance to 1 Gigarad(Si) are described. Calculations for maximum tolerable neutron fluence are shown, and a phenomenological explanation for these results is presented.

Joyner, W. T.↗

Assessment of the Electrical Substation-Grid Testbed with Inside/Outside Devices and Distributed Ledger Technology

The electrical substation-grid testbed was created to integrate the GOOSE and/or DNP (Distributed Network Protocol) messages with time synchronized sources and Distributed Ledger Technology (DLT). The objective was to study the impact of faults and cyber-events at an electrical substation with inside (protective relays) and outside (power meters) substation devices. The electrical substation-grid testbed was based on the design of a 34.5/ 12.47 kV electrical substation (sectionalized bus configuration) with two power transformers, connected to radial power lines and load feeders. The electrical substation-grid testbed was installed at 252 lab space (Advanced Power System Protection), Grid Research Integration and Deployment Center (GRID-C), Oak Ridge National Laboratory. This testbed was created for Task 5, DarkNet project. The electrical substation-grid testbed was created to simulate fault and/or cyber events that could potentially result in damage to the electrical infrastructure. In addition, tests were run that are usually not allowed to be performed in an operational electrical power grid, because these test scenarios could trip breakers and/or generate fault situations that could potentially damage equipment. The number of tests performed in the electrical substation-grid testbed were executed in a better way than in a real electrical substation and/or power grid, because multiple tests could be run in a short period of time, and complex permits, and safety/ schedule restrictions like in a real electrical substation environment were not needed. The electrical substation-grid testbed was created using real measurement, communication, and protection devices that are used by electrical utilities, to have same conditions that we could observe in a real power grid or electrical substation. The electrical substation-grid testbed was based on using a real time simulator and expansion box with amplifiers that were wired to electrical substation-grid devices. This hardware-in-the-loop (HIL) was provided by protective relays, power meters, ethernet switches, remote terminal units, synchronized timing network clock, DLT devices, workstations, and servers. This report includes the design, installation, and assessment of the electrical substation-grid testbed that was similar to an operational electrical substation, integrating the power system protection, communication, and control systems. The results for the electrical substation-grid testbed were based on:• verifying the analog signals for protective relays and power meters, • observing the synchronized time source frame at devices, • authenticating the GOOSE (IEC 61850) and DNP messages from power meters and protective relays, and • verifying the trip conditions of protective relays at fault tests with the power system fault event detection, using DLT devices. For future work, the electrical substation-grid testbed with protective relays and power meters, using DLT and synchronized time source from DarkNet, will be used to study the impact of cyber-events at inside and outside substation devices. Advanced algorithms for detecting cyber-events produced by non-desired protective relay settings will be studied, to improve the detection and reliability of protection, control, and communication systems at power grids.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗

Wide-range continuous tuning of the thermal conductivity of La0.5Sr0.5CoO3-δ films via room-temperature ion-gel gating

Abstract Solid-state control of the thermal conductivity of materials is of exceptional interest for novel devices such as thermal diodes and switches. Here, we demonstrate the ability to continuously tune the thermal conductivity of nanoscale films of La 0.5 Sr 0.5 CoO 3- δ (LSCO) by a factor of over 5, via a room-temperature electrolyte-gate-induced non-volatile topotactic phase transformation from perovskite (with δ ≈ 0.1) to an oxygen-vacancy-ordered brownmillerite phase (with δ = 0.5), accompanied by a metal-insulator transition. Combining time-domain thermoreflectance and electronic transport measurements, model analyses based on molecular dynamics and Boltzmann transport equation, and structural characterization by X-ray diffraction, we uncover and deconvolve the effects of these transitions on heat carriers, including electrons and lattice vibrations. The wide-range continuous tunability of LSCO thermal conductivity enabled by low-voltage (below 4 V) room-temperature electrolyte gating opens the door to non-volatile dynamic control of thermal transport in perovskite-based functional materials, for thermal regulation and management in device applications.

42 ENGINEERING↗

High Voltage Regrown GaN P-N Diodes Enabled by Defect and Doping Control

This project studied and implemented methods to form GaN p-n diodes using selective area regrowth to achieve selective area doping. Successful selective area doping of GaN p-n diodes is an enabling factor to realize more advanced devices such as vertical transistors. The general challenge to selective area regrowth of GaN is that the primary etch method, inductively coupled plasma (ICP), damages the crystal and causes high leakage when didoes are formed by regrowth on the etched surface. Our approach used low damage etch methods following ICP etch to remove crystal damage and reduced leakage in the regrown diode. This project demonstrated 1.6 kV etched-and-regrown GaN p-n diodes using planar (non-selective) regrowth and 840 V etched-and-regrown p-n diodes using selective area regrown. Enabling factors were use of a low-damage reactive ion etch (RIE) to remove damage caused by the primary ICP etch combined with a multi-step junction terminal extension (JTE) process. Deep level defect investigation quantitatively correlated a deep level near the middle of the GaN band gap with ICP etch-induced leakage that was greatly mitigated by using a slow, low damage RIE process. This research is economically feasible for commercialization because the processes used in this project, including substrate type and source, epitaxial crystal growth and fabrication techniques are all standard to the GaN semiconductor industry. The fundamental understanding and foundational ability to produce kV-class GaN p-n diodes through etch-and-regrowth provides a path to realize high power, high efficiency GaN power switches that can significantly outperform commercial devices for next-generation electrical power conversion and transmission systems.

36 MATERIALS SCIENCE↗

Exploring OpenSNAPI Use Cases and Evolving Requirements [Slides]

Emerging system architectures are rapidly transforming in order to meet shifting requirements. Motivated by expanding data volumes, energy efficiency concerns, and the omnipresent need to improve performance, architectures are increasingly adopting a data-centric approach. At the core of this concept is the goal of minimizing data motion and instead processing data in-situ to the greatest degree possible. Therefore, data-centric designs, in contrast to conventional CPU-centric models, typically distribute compute capabilities throughout the architecture. As part of this paradigm shift, a novel class of devices known as data processing units (DPUs), alongside CPUs and GPUs, are quickly forming a third pillar of data-centric systems. These devices, which include smart network adapters and switches, seek to offload computation on data at the network edge as well as in-flight within the network fabric. The Open Smart Network API (OpenSNAPI) project seeks to develop a unified API for DPU devices. In our previous talks, we introduced the OpenSNAPI project and detailed our investigations regarding the viability of offloading compute intensive kernels to BlueField DPUs. In contrast, in this talk we detail our efforts to offload application-level file I/O to the DPU. We also discuss plans and early efforts to explore in-network compute capabilities. Finally, we describe our observations with respect to the evolving design of OpenSNAPI.

97 MATHEMATICS AND COMPUTING↗

Laser-Induced Ultrafast Demagnetization and Spin Switching (Final Report)

The information technology revolution demands bigger and faster magnetic storage devices. The funded research focuses on a new frontier - Laser-induced ultrafast all-optical spin switching (AOS), where a single laser pulse can switch spins from one direction to another permanently, without a magnetic field, on a time scale of 1-10 picoseconds, 2-3 orders of magnitude faster than the existing technology. The funded research has successfully resolved a long-standing issue in ultrafast demagnetization whether the lattice contributes to the demagnetization. We developed a high level first-principles theory and employed a massively parallel computer to pin down the details of the physical mechanisms that are inaccessible to other methods. This unique feature allows us to compute the force on each atom in both bulk and monolayer systems. We find that it is indeed true there is a nonzero force on each atom, but the idea of vibration contribution is not crucial to our basic understanding of physics. This paves the way to future experimental, theoretical and technological developments.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions

Addressing the increasing demand for high- efficiency and high-power-density converters, the flying-capacitor multilevel converter has shown itself as a promising topology. A key advantage of this topology is the reduced voltage rating of the switches, though also makes it vulnerable to device failure during short-circuit conditions. Despite large interest in fault-tolerant operation of these converters, alongside detailed descriptions of flying capacitor balancing, little research has focused on the converter short-circuit fault analysis, which may cause a switch failure if not properly designed for. Therefore, this work presents a comprehensive model describing the large- signal short-circuit switching behavior of a general N -level flying- capacitor multilevel converter. Highly simplified models used to predict the evolution of the switch current and voltage stress during the fault are proposed, targeted at practicing engineers for conservative design guidelines. These models are used to determine the critical time for remedial action of the converter before reaching some predefined maximum conditions. A 2-to-10- level fully-configurable flying-capacitor multilevel converter and a fault circuit hardware prototype are used to experimentally perform different short-circuit tests that show a good match to the measured behavior.

24 POWER TRANSMISSION AND DISTRIBUTION↗

High‐Efficiency Magnon‐Mediated Magnetization Switching in All‐Oxide Heterostructures with Perpendicular Magnetic Anisotropy

Abstract The search for efficient approaches to realize local switching of magnetic moments in spintronic devices has attracted extensive attention. One of the most promising approaches is the electrical manipulation of magnetization through electron‐mediated spin torque. However, the Joule heat generated via electron motion unavoidably causes substantial energy dissipation and potential damage to spintronic devices. Here, all‐oxide heterostructures of SrRuO 3 /NiO/SrIrO 3 are epitaxially grown on SrTiO 3 single‐crystal substrates following the order of the ferromagnetic transition metal oxide SrRuO 3 with perpendicular magnetic anisotropy, insulating and antiferromagnetic NiO, and metallic transition metal oxide SrIrO 3 with strong spin–orbit coupling. It is demonstrated that instead of the electron spin torques, the magnon torques present in the antiferromagnetic NiO layer can directly manipulate the perpendicular magnetization of the ferromagnetic layer. This magnon mechanism may significantly reduce the electron motion‐related energy dissipation from electron‐mediated spin currents. Interestingly, the threshold current density to generate a sufficient magnon current to manipulate the magnetization is one order of magnitude smaller than that in conventional metallic systems. These findings suggest a route for developing highly efficient all‐oxide spintronic devices operated by magnon current.

Zheng, Dongxing↗

Sulfurization Engineering of One–Step Low–Temperature MoS 2 and WS 2 Thin Films for Memristor Device Applications

2D materials have been of considerable interest as new materials for device applications. Non-volatile resistive switching applications of MoS 2 and WS 2 have been previously demonstrated; however, these applications are dramatically limited by high temperatures and extended times needed for the large-area synthesis of 2D materials on crystalline substrates. The experimental results demonstrate a one-step sulfurization method to synthesize MoS 2 and WS 2 at 550 °C in 15 min on sapphire wafers. Furthermore, a large area transfer of the synthesized thin films to SiO 2 /Si substrates is achieved. Following this, MoS 2 and WS 2 memristors are fabricated that exhibit stable non-volatile switching and a satisfactory large on/off current ratio (10 3 –10 5 ) with good uniformity. Tuning the sulfurization parameters (temperature and metal precursor thickness) is found to be a straightforward and effective strategy to improve the performance of the memristors. Furthermore, the demonstration of large-scale MoS 2 and WS 2 memristors with a one-step low-temperature sulfurization method with simple strategy to tuning can lead to potential applications such as flexible memory and neuromorphic computing.

36 MATERIALS SCIENCE↗

Defect Chemistry and Doping of Ultrawide Band Gap (III)BO 3 Compounds

New wide band gap semiconductors are needed to increase the power, voltage, and switching frequency limits of power electronic devices. A recent computational search identified a family of ultrawide band gap (4.8-7.8 eV) group-III orthoborates as promising materials for power electronics, assuming n-type doping could be attained. In this report we test this assumption by investigating the defect chemistry and dopability of rhombohedral calcite-structured AlBO 3 , GaBO 3 , and InBO 3 using first-principles calculations. Of the three, we find InBO 3 to have the most potential for n-type doping without significant compensation by native acceptor defects. Furthermore, Zr is predicted to readily substitute for In and behave as a shallow donor with maximal net donor concentrations exceeding 1 x 10 18 cm -3 under growth conditions typical for this class of materials. We also demonstrate thin film growth of InBO3 and measure its absorption onset, which we find to be consistent with theory. Ultimately, our results confirm the promise of InBO 3 as an n-type ultrawide band gap semiconductor and point to alloying with GaBO 3 and AlBO 3 for further optimization of band gap and electron concentration for high-power applications.

36 MATERIALS SCIENCE↗

Low cost switching circuit for van der Pauw resistivity and Hall measurements at various temperatures

The electrical characterization of materials, particularly superconductors, semiconductors, and those undergoing metal-insulator transitions (MITs), relies significantly on resistivity and Hall measurements as a function of temperature. The van der Pauw four-point probe method is commonly used for such measurements, which involves resistance measurements for different circuit configurations connected to sample contacts. However, repeating these measurements at different temperatures is challenging and time consuming. Here, this study introduces a novel approach utilizing a switching circuit controlled by an Arduino device and a LabVIEW program to automate resistance measurements for different electrical configurations. The effectiveness of this setup was demonstrated by testing V 2 O 3 thin film samples deposited on Al 2 O 3 (001) substrates using DC magnetron sputtering. The MIT temperature of the sample was 115 K during heating and 100 K during cooling. The sample exhibited p-type charge carriers with a Hall coefficient of 1.3 ± 0.1 x 10 -4 cm 3 /C and Hall mobility of 1.7 x 10 -1 cm 2 /V∙s, which is consistent with findings from other studies employing commercial equipment.

36 MATERIALS SCIENCE↗

Reanalysis of Experimental Determinations of Polariton-Polariton Interactions in Microcavities

The polariton-polariton interaction strength is an important parameter for all kinds of applications using the nonlinear properties of polaritons, such as optical switching and single-photon blockade devices. In this paper, we review and compare the results of a series of experiments on polariton-polariton interactions in GaAs/AlxGa1-xAs microcavity polariton structures and present an updated analysis of these experiments. We show that not just the energy shift of the spectral lines but also the results of measurements sensitive to the polariton scattering rate are important for the calibration of the interaction parameter at low excitation density. We find that when adjustments are made to correct for recent understanding of the experiments, the value of the interaction parameter at low density is lower than previous reported, but still significantly higher than theoretically predicted.

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗

Electric Drive Technologies Research: ELT223 Component Modeling, Co-Optimization, and Trade-Space Evaluation Annual Report

This project is intended to support the development of new traction drive systems that meet the targets of 100 kW/L for power electronics and 50 kW/L for electric machines with reliable operation to 300,000 miles. To meet these goals, new designs must be identified that make use of state-of-the-art and next-generation electronic materials and design methods. Designs must exploit synergies between components, for example converters designed for high-frequency switching using wide band gap (WBG) devices and ceramic capacitors. This project included: (1) a survey of available technologies; (2) investigating new technologies, that for example, reduce volume of thermal management or magnetic components; (3) the development of computer aided design tools that consider the converter volume, reliability, and electrical performance; (4) exercising the design software to evaluate performance gaps and predict the impact of certain technologies and design approaches, i.e. GaN semiconductors, ceramic capacitors, ceramic thermal management components, and select topologies; (5) building and testing hardware prototypes to validate models and concepts. The design tools enable co-optimization of the power module and passive elements and provide some design guidance. At the end of the project, new advanced computing methods, such as machine learning approaches, were considered.

33 ADVANCED PROPULSION SYSTEMS↗