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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

Effect Of Clock Mode On Radiation Hardness Of An ADC

Report discusses techniques for testing and evaluating effects of total dosages of ionizing radiation on performances of high-resolution successive-approximation analog-to-digital converters (ADCs), without having to test each individual bit or transition. Reduces cost of testing by reducing tests to few critical parametric measurements, from which one determines approximate radiation failure levels providing good approximations of responses of converters for purpose of total-dose-radiation evaluations.

Lee, Choon I.↗
NASA NTRS2006

Broadband X-ray Spectroscopy of the ADC Source 4U 1822-37 with Suzaku

We will present the broadband spectra of the low mass x-ray binary 4U 1822-37, recently observed with Suzaku. 4U 1822-37 is the canonical accretion disk corona (ADC) source where the compact object is obscured by an extended corona that intercepts and scatters the central continuum emission, some of which is then reprocessed in the outer regions of the accretion disk. 4U 1822-37 therefore serves as an important link between x-ray binaries and AGN. The broadband x-ray spectra from the Suzaku XIS and HXD provide a unique opportunity to probe the physical conditions in the corona and the accretion disk for this important accretion geometry.

Cottam, J.↗
NASA NTRS2015

Minimal Power Latch for Single-Slope ADCs

A latch circuit that uses two interoperating latches. The latch circuit has the beneficial feature that it switches only a single time during a measurement that uses a stair step or ramp function as an input signal in an analog to digital converter. This feature minimizes the amount of power that is consumed in the latch and also minimizes the amount of high frequency noise that is generated by the latch. An application using a plurality of such latch circuits in a parallel decoding ADC for use in an image sensor is given as an example.

Hancock, Bruce R.↗
DOE OSTI2023

Chip Development Toward 12 bit 10 GSPS Cryogenic ADC for Multiplexed Quantum Readout

This presentation presents the background and plan for the development toward a 12 bit 10 GSPS cryogenic ADC for multiplexed quantum readout. It covers the first two chips that have been taped out and tested. It includes results for those chips and provides some context to plans for the upcoming chip tapeout and the final one to come later.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2023

Physical Layer Security at a Point-to-Point MIMO System With 1-Bit DACs and ADCs

Low-resolution converters reduce the power consumption of wireless devices and help enable large energy-efficient arrays. In this letter, we evaluate the secrecy rate for the extreme case of 1-bit single-user multiple-input multiple-output systems following two signaling approaches. In the first method, the system uses discrete signaling. In the second, the system combines Gaussian signaling with artificial noise alongside power allocation. In the first case, we give a closed-form expression of the secrecy rate and propose an algorithm that provides near-optimal results for low signal-to-noise ratios (SNRs). Further, in the second scenario, depending on the channel state information, we suggest different precoding plans and derive a secrecy rate lower bound. At low SNR, power is allocated to the main signal. Only at high SNR is optimal power allocation effective. Moreover, knowing the eavesdropper channel greatly improves the system’s secrecy.

1-bit digital-to-analog (DAC) and analog-to-digita↗
DOE OSTI2021

Characterization and QC practice of 16-channel ADC ASIC at cryogenic temperature for Liquid Argon TPC front-end readout electronics system in DUNE experiment

ColdADC is a low-noise 16-channel analog-to-digital converter ASIC designed for cold readout electronics of Liquid Argon Time Projection Chambers (LArTPCs) in the Deep Underground Neutrino Experiment (DUNE). ColdADC was specifically designed for operation at cryogenic temperatures (77 K–89 K). Cold electronics is considered to be an enabling technology for liquid argon detectors in neutrino experiments. The main function of the chip is to digitize signals from the 16-channel charge-sensitive amplifier designed at BNL (LArASIC) and send digitized signals to the data aggregator and serializer chip (COLDATA). ColdADC operates with a resolution of 12 bits and a sampling rate of 2 MS/s per channel. A complete characterization of prototype chips was conducted at cryogenic temperature, involving power consumption, noise and linearity performance. In the first DUNE Far-Detector module, 384000 data channels will be read out, corresponding to 24000 ColdADC chips. Therefore, systematic testing of ColdADC chips at cryogenic temperature is vital for the quality and reliability of DUNE Single-Phase modules. We have developed a Quality Control (QC) test stand that includes ColdADC evaluation and characterization at cryogenic temperature. The QC procedure was applied to a first batch of 33 chips, corresponding to 528 data channels. The obtained results meet all the required DUNE specifications for ColdADC. Moreover, the testing outcome allowed us to identify possibilities of performance optimization that are currently being addressed in the design of the next version of the chip. The Quality Control procedure is proved to be successful and will be a reference design for future large-batch production testing of final ColdADC ASICs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗