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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2008

Efficient G(sup 4)FET-Based Logic Circuits

A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

Vatan, Farrokh↗
NASA NTRS1985

Boolean integral calculus for digital systems

The concept of Boolean integration is introduced and developed. When the changes in a desired function are specified in terms of changes in its arguments, then ways of 'integrating' (i.e., realizing) the function, if it exists, are presented. Boolean integral calculus has applications in design of logic circuits.

Tucker, J. H.↗
NASA NTRS1988

Boolean integral calculus

The concept of Boolean integration is developed, and different Boolean integral operators are introduced. Given the changes in a desired function in terms of the changes in its arguments, the ways of 'integrating' (i.e. realizing) such a function, if it exists, are presented. The necessary and sufficient conditions for integrating, in different senses, the expression specifying the changes are obtained. Boolean calculus has applications in the design of logic circuits and in fault analysis.

Tucker, Jerry H.↗
NASA NTRS1994

Fuzzy expert systems using CLIPS

This paper describes a CLIPS-based fuzzy expert system development environment called FCLIPS and illustrates its application to the simulated cart-pole balancing problem. FCLIPS is a straightforward extension of CLIPS without any alteration to the CLIPS internal structures. It makes use of the object-oriented and module features in CLIPS version 6.0 for the implementation of fuzzy logic concepts. Systems of varying degrees of mixed Boolean and fuzzy rules can be implemented in CLIPS. Design and implementation issues of FCLIPS will also be discussed.

Le, Thach C.↗
NASA NTRS1984

A representational basis for the development of a distributed expert system for Space Shuttle flight control

A new representation of malfunction procedure logic which permits the automation of these procedures using Boolean normal forms is presented. This representation is discussed in the context of the development of an expert system for space shuttle flight control including software and hardware implementation modes, and a distributed architecture. The roles and responsibility of the flight control team as well as previous work toward the development of expert systems for flight control support at Johnson Space Center are discussed. The notion of malfunction procedures as graphs is introduced as well as the concept of hardware-equivalence.

Helly, J. J., Jr.↗
NASA NTRS1968

Logic hazards in threshold networks.

Logic hazards detection in threshold gate networks, discussing hazard free network synthesis based on Boolean functions and tree method

Coates, C. L.↗
NASA NTRS2008

Runtime Verification of C Programs

We present in this paper a framework, RMOR, for monitoring the execution of C programs against state machines, expressed in a textual (nongraphical) format in files separate from the program. The state machine language has been inspired by a graphical state machine language RCAT recently developed at the Jet Propulsion Laboratory, as an alternative to using Linear Temporal Logic (LTL) for requirements capture. Transitions between states are labeled with abstract event names and Boolean expressions over such. The abstract events are connected to code fragments using an aspect-oriented pointcut language similar to ASPECTJ's or ASPECTC's pointcut language. The system is implemented in the C analysis and transformation package CIL, and is programmed in OCAML, the implementation language of CIL. The work is closely related to the notion of stateful aspects within aspect-oriented programming, where pointcut languages are extended with temporal assertions over the execution trace.

RMOR↗
NASA NTRS2024

Two mechanisms for the spontaneous emergence, execution, and reprogramming of chemical logic circuits

A key question in origin-of-life research is how primitive life or life-like systems obtained reusable and reprogrammable machinery of processing information to respond to various environmental and internal stimuli. One strategy to approach this question is to view living systems as universal chemical computers. This approach focuses upon uncovering how reusable and reprogrammable chemical NOT, AND, and OR logic gates could appear under prebiotically possible scenarios where simple chemicals and second- or lower-order reactions are more frequent than macromolecules and higher-order reactions. In this article, we theoretically model two generic mechanisms of forming Boolean gates based on geochemically plausible reaction systems that could have preceded complex biopolymers. The mechanisms exploit simple bistable autocatalytic systems to encode binary variables and use heterogeneous dilution rates to differentially activate or deactivate autocatalysis in different reactors. We found that NOT, AND, and OR gates, as well as more complex logic circuits, can spontaneously arise from connected, well-mixed flow reactors based on (i) catalysis by a heterodimer between mutually inhibitory autocatalysts or (ii) selectively permeable tunnels connecting reactors. Our results suggest that simple machinery can support the prebiotic emergence of complex chemical logic circuits and provide new guides for experimentally actualizing chemical computation.

Zhen Peng↗
NASA NTRS1994

SEQ-GEN: A comprehensive multimission sequencing system

SEQ-GEN is a user-interactive computer program used to plan and generate a sequence of commands for spacecraft. Desired activities are specified by the user of SEQ-GEN; SEQ-GEN in turn expands these activities, deriving the spacecraft commands necessary to accomplish the desired activities. SEQ-GEN models the effects on the spacecraft of the commands, predicting the state as a function of time, flagging any conflicts and rule violations. These states, conflicts, and violations are viewable both graphically and textually at the user's request. SEQ-GEN also displays the entire sequence graphically, showing each requested activity as a bar on its graphical timeline. SEQ-GEN immediately revalidates the sequence, updating its models and calculations along with its displays based on these changes. Because it has the ability to recalculate spacecraft states immediately, the user is able to perform 'what-if' sessions easily. SEQ-GEN, a multimission tool, is adaptable to any flight project. A flight project writes its adaptation files containing project unique information including in its simplest form, only spacecraft commands. For more involved projects the adaptation files may also contain flight and mission rules, description of the spacecraft and ground models, and the definition of activities. SEQ-GEN operates at whatever level of detail the adaptation files imply. Simple adaptations are straight forward to do. There is, however, no limit to the complexity of activity definitions or of spacecraft models: both may involve unlimited logical decision points. Commands and activities may involve any number of parameters of a wide variety of data types, including integer, float, time, boolean, and character strings. SEQ-GEN will be used by the Mars Pathfinder, Cassini, and VIM (Voyager Interstellar Mission) project in an effort to speed up adaptation time and to keep sequence generation costs down. SEQ-GEN is hosted on UNIX workstations. It uses MOTIF and X for windowing, and was designed and coded in an object-oriented style in the language C++.

Salcedo, Jose↗
NASA NTRS1980

Development of Boolean calculus and its applications

The development of Boolean calculus for its application to developing digital system design methodologies that would reduce system complexity, size, cost, speed, power requirements, etc., is discussed. Synthesis procedures for logic circuits are examined particularly asynchronous circuits using clock triggered flip flops.

Tapia, M. A.↗
NASA NTRS2002

What is a Question?

A given question can be defined in terms of the set of statements or assertions that answer it. Application of the logic of inference to this set of assertions allows one to derive the logic of inquiry among questions. There are interesting symmetries between the logics of inference and inquiry; where probability describes the degree to which a premise implies an assertion, there exists an analogous quantity that describes the bearing or relevance that a question has on an outstanding issue. These have been extended to suggest that the logic of inquiry results in functional relationships analogous to, although more general than, those found in information theory. Employing lattice theory, I examine in greater detail the structure of the space of assertions and questions demonstrating that the symmetries between the logical relations in each of the spaces derive directly from the lattice structure. Furthermore, I show that while symmetries between the spaces exist, the two lattices are not isomorphic. The lattice of assertions is described by a Boolean lattice 2(sup N) whereas the lattice of real questions is shown to be a sublattice of the free distributive lattice FD(N) = 2(sup 2(sup N)). Thus there does not exist a one-to-one mapping of assertions to questions, there is no reflection symmetry between the two spaces, and questions in general do not possess unique complements. Last, with these lattice structures in mind, I discuss the relationship between probability, relevance and entropy.

Knuth, Kevin H.↗
NASA NTRS1988

Adaptive parallel logic networks

Adaptive, self-organizing concurrent systems (ASOCS) that combine self-organization with massive parallelism for such applications as adaptive logic devices, robotics, process control, and system malfunction management, are presently discussed. In ASOCS, an adaptive network composed of many simple computing elements operating in combinational and asynchronous fashion is used and problems are specified by presenting if-then rules to the system in the form of Boolean conjunctions. During data processing, which is a different operational phase from adaptation, the network acts as a parallel hardware circuit.

Martinez, Tony R.↗
NASA NTRS2017

First Order Temporal Logic Monitoring with BDDs

Runtime verification is aimed at analyzing execution traces stemming from a running program or system. The traditional purpose is to detect the lack of conformance with respect to a formal specification. Numerous efforts in the field have focused on monitoring so-called parametric specifications, where events carry data, and formulas can refer to such. Since a monitor for such specifications has to store observed data, the challenge is to have an efficient representation and manipulation of Boolean operators, quantification, and lookup of data. The fundamental problem is that the actual values of the data are not necessarily bounded or provided in advance. In this work we explore the use of Binary Decision Diagrams (BDDs) for representing observed data. Our experiments show a substantial improvement in performance compared to related work.

Ulus, Dogan↗
NASA NTRS2005

Biased Randomized Algorithm for Fast Model-Based Diagnosis

A biased randomized algorithm has been developed to enable the rapid computational solution of a propositional- satisfiability (SAT) problem equivalent to a diagnosis problem. The closest competing methods of automated diagnosis are described in the preceding article "Fast Algorithms for Model-Based Diagnosis" and "Two Methods of Efficient Solution of the Hitting-Set Problem" (NPO-30584), which appears elsewhere in this issue. It is necessary to recapitulate some of the information from the cited articles as a prerequisite to a description of the present method. As used here, "diagnosis" signifies, more precisely, a type of model-based diagnosis in which one explores any logical inconsistencies between the observed and expected behaviors of an engineering system. The function of each component and the interconnections among all the components of the engineering system are represented as a logical system. Hence, the expected behavior of the engineering system is represented as a set of logical consequences. Faulty components lead to inconsistency between the observed and expected behaviors of the system, represented by logical inconsistencies. Diagnosis - the task of finding the faulty components - reduces to finding the components, the abnormalities of which could explain all the logical inconsistencies. One seeks a minimal set of faulty components (denoted a minimal diagnosis), because the trivial solution, in which all components are deemed to be faulty, always explains all inconsistencies. In the methods of the cited articles, the minimal-diagnosis problem is treated as equivalent to a minimal-hitting-set problem, which is translated from a combinatorial to a computational problem by mapping it onto the Boolean-satisfiability and integer-programming problems. The integer-programming approach taken in one of the prior methods is complete (in the sense that it is guaranteed to find a solution if one exists) and slow and yields a lower bound on the size of the minimal diagnosis. In contrast, the present approach is incomplete and fast and yields an upper bound on the size of the minimal diagnosis.

Williams, Colin↗
NASA NTRS1995

Model checking

Automatic formal verification methods for finite-state systems, also known as model-checking, successfully reduce labor costs since they are mostly automatic. Model checkers explicitly or implicitly enumerate the reachable state space of a system, whose behavior is described implicitly, perhaps by a program or a collection of finite automata. Simple properties, such as mutual exclusion or absence of deadlock, can be checked by inspecting individual states. More complex properties, such as lack of starvation, require search for cycles in the state graph with particular properties. Specifications to be checked may consist of built-in properties, such as deadlock or 'unspecified receptions' of messages, another program or implicit description, to be compared with a simulation, bisimulation, or language inclusion relation, or an assertion in one of several temporal logics. Finite-state verification tools are beginning to have a significant impact in commercial designs. There are many success stories of verification tools finding bugs in protocols or hardware controllers. In some cases, these tools have been incorporated into design methodology. Research in finite-state verification has been advancing rapidly, and is showing no signs of slowing down. Recent results include probabilistic algorithms for verification, exploitation of symmetry and independent events, and the use symbolic representations for Boolean functions and systems of linear inequalities. One of the most exciting areas for further research is the combination of model-checking with theorem-proving methods.

Dill, David L.↗