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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

Are Soft Short Tests Good Indicators of Internal Li-ion Cell Defects?

The self discharge test at full state of charge, may not be a good one to detect subtle defects since the li-ion chemistry has the highest self discharge at full state of charge. One should characterize self discharge versus storage time for each cell manufacturer/design to differentiate between normal self discharge and that due to a subtle manufacturing defect. The various soft short test methods indicate that if this test is carried out at full discharge (0% SOC) with all capacity removed (by lowering the current load in a stepwise manner to the same end of discharge voltage), then the cells need to be placed in storage for more than 72 hours to get a good analysis on the presence of subtle defects since it takes more than 72 hours to achieve voltage stabilization. If the cells are to be charged up even to a small percentage (ex. 1%), 72 hours are sufficient to determine issues. However, the pass/fail criteria should be based on a valid OCV decline. Less than 10 mV voltage decline is not a good method to detect subtle defects. As mentioned in the first bullet, self discharge is a competing reaction when a charge is introduced and hence a characterization of the self discharge versus storage time is required to fully correlate voltage decline to a failure due to a subtle defect. Soft short test method cannot be relied on for defect detection because cells with and without voltage decline seemed to have similar defects and characteristics. Screening methods such as internal resistance and capacity as well as a 3-sigma range for OCV, mass and dimensions should be used to screen out outliers. A very critical aspect in the understanding of subtle defects is to carry out destructive analysis of cells from every lot to confirm the quality of production and screen all cells and batteries in a stringent manner to have a high quality set of flight cells. Self Discharge Test: Fully charged cells shall be placed in Open circuit stand for 72 hours (OCV measurement twice a day); continue for total of 14 days with 1 reading per day 2. Soft Short Test 1: Fully charge; cells discharged to manufacturer's end of disch. Voltage (EODV) cutoff at C/5 rate; stand for 30 minutes; discharge with C/500 to the same EODV. stand for another 30 minutes; discharge the cells again using C/1000 current to the same EODV. OCV measurements twice a day for 72 hours and then for total of 14 days (data collection same as in 1.) 3. Soft Short Test 2: Fully charge; cells discharged to the manuf. EODV with a C/13 constant current; provide a 10 hour rest, discharge again to the same EODV with a current of C/250, provide a 10 hour rest, discharge again using a C/250 rate, provide a 24 hour rest, charge using C/250 to 3.15 V (for ~12 hours). OCV measurements twice a day for at 72 hours. (data collection same as in 1.) 4. Soft Short Test 3: Fully charge; cells shall be discharged using C/10 current to manuf. EODV. Allow the cell to remain at Open circuit for 10 seconds. Discharge the cell at C/20 rate to the same EODV, hold open circuit for 24 hours. Discharge the cells at C/200 rate to the same end of voltage cutoff and hold open circuit for 24 hours. Discharge the cells one more time at C/200 rate to the same EODV and hold open circuit for 36 hours. Charge at C/200 rate to 3.15 V and hold for 3 days. Record OCV during the open circuit stand periods every 12 hours and at the beginning and end of the 3 day hold (include the 12 hour OCV recording during this time also). Capacity Cycling: Cells with declining voltages - one cell from each manufacturer chosen for cycling Destructive Physical Analysis (DPA): Cells with and without decline chosen from each lot for DPA.

Jeevarajan, J.↗
NASA NTRS1995

Yield modeling of acoustic charge transport transversal filters

This paper presents a yield model for acoustic charge transport transversal filters. This model differs from previous IC yield models in that it does not assume that individual failures of the nondestructive sensing taps necessarily cause a device failure. A redundancy in the number of taps included in the design is explained. Poisson statistics are used to describe the tap failures, weighted over a uniform defect density distribution. A representative design example is presented. The minimum number of taps needed to realize the filter is calculated, and tap weights for various numbers of redundant taps are calculated. The critical area for device failure is calculated for each level of redundancy. Yield is predicted for a range of defect densities and redundancies. To verify the model, a Monte Carlo simulation is performed on an equivalent circuit model of the device. The results of the yield model are then compared to the Monte Carlo simulation. Better than 95% agreement was obtained for the Poisson model with redundant taps ranging from 30% to 150% over the minimum.

Kenney, J. S.↗
DOE OSTI2025

Mitigating Battery Cell Failure: Role of Ag‐Nanoparticle Fillers in Solid Electrolyte Dendrite Suppression

Abstract The development of solid‐state batteries (SSBs) with lithium Li metal anodes holds significant promise for enhancing the energy density and safety of next‐generation energy storage systems. However, their commercialization is hindered by challenges related to Li dendrite formation, which can lead to short circuits and battery failure. In this study, the role of Ag nanoparticles embedded within solid electrolytes (SE) is investigated in suppressing dendrite propagation. The results demonstrate that Ag nanoparticles effectively mitigate two key failure mechanisms: (1) dendrite growth within porous networks at low current densities and (2) stress intensification‐induced SE fracture at higher current densities (12 mA cm −2 ). Ex situ characterization using focused‐ion beam – scanning electron microscopy (FIB–SEM) and energy dispersive X‐ray spectroscopy (EDS,) reveals that Ag nanoparticles migrate alongside advancing Li dendrites, promoting homogeneous dendrite growth and reducing the likelihood of localized stress concentrations. Additionally, the incorporation of Ag nanoparticles is shown to facilitate a more uniform Li distribution toward the anode side, which can potentially enable the use of higher charging rates in SSBs. This study provides a new perspective on Li dendrite suppression and presents new opportunities for enhancing the performance and safety of SSBs.

Diallo, Mouhamad Said↗
NASA NTRS1977

Design, fabrication, and evaluation of charge-coupled devices with aluminum-anodized-aluminum gates

A 4-phase, 49 1/2 bit CCD shift register was designed and fabricated using two levels of aluminum metallization with anodic Al2O3 insulation separating the layers. Test circuitry was also designed and constructed. A numerical analysis of an MOS-RC transmission line was made and results are given to characterize performance for various conductivities. The electrical design of the CCD included a low-noise dual-gate input and a balanced floating diffusion output circuit. Metallization was accomplished both by low voltage DC sputtering and thermal evaporation. The audization was according to published procedures using a buffered tartaric acid bath. Approximately 20 wafers were processed with 50 complete chips per wafer. All devices failed by shorting between the metal levels at some point. Experimental procedures eliminated temperature effects from sintering and drying, anodic oxide thickness, edge effects, photoresist stripping procedures, and metallization techniques as the primary causes of failure. It was believed from a study of SEM images that protuberances (hillocks) grow up from the first level metal through the oxide either causing a direct short or producing a weak, highly stressed insulation point which fails at low voltage. The cause of these hillocks is unknown; however, they have been observed to grow during temperature excursions to 470 C.

Gassaway, J. D.↗
NASA NTRS2011

Failure Modes in Capacitors When Tested Under a Time-Varying Stress

Steady step surge testing (SSST) is widely applied to screen out potential power-on failures in solid tantalum capacitors. The test simulates the power supply's on and off characteristics. Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors for decoupling applications. On the other hand, the SSST can also be reviewed as an electrically destructive test under a time-varying stress. It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. Highly accelerated life testing (HALT) is usually a time-efficient method for determining the failure mechanism in capacitors; however, a destructive test under a time-varying stress like SSST is even more effective. It normally takes days to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating specific time-varying stress into a statistical model is significant in providing an alternative life test method for quickly revealing the failure modes in capacitors. In this paper, a time-varying stress has been incorporated into the Weibull model to characterize the failure modes. The SSST circuit and transient conditions to correctly test the capacitors is discussed. Finally, the SSST was applied for testing polymer aluminum capacitors (PA capacitors), Ta capacitors, and multi-layer ceramic capacitors with both precious metal electrode (PME) and base-metal-electrodes (BME). It appears that testing results are directly associated to the dielectric layer breakdown in PA and Ta capacitors and are independent on the capacitor values, the way the capacitors being built, and the manufactures. The testing results also reveal that ceramic capacitors exhibit breakdown voltages more than 20 times the rated voltage, and the breakdown voltages are inverse proportional to the dielectric layer thickness. The possibility of ceramic capacitors in front-end decoupling applications to block the surge noise from a power supply is also discussed.

Liu, David (Donhang)↗
NASA NTRS2016

Terrestrial Sources of X-Ray Radiation and Their Effects on NASA Flight Hardware

X-rays are an energetic and penetrating form of ionizing electromagnetic radiation, which can degrade NASA flight hardware. The main concern posed by such radiation is degradation of active electronic devices and, in some cases, diodes. Non-electronic components are only damaged at doses that far exceed the point where any electronic device would be destroyed. For the purposes of this document, flight hardware can be taken to mean an entire instrument, the flight electronics within the instrument or the individual microelectronic devices in the flight electronics. This document will discuss and describe the ways in which NASA flight hardware might be exposed to x-rays, what is and isn't a concern, and how to tell the difference. First, we must understand what components in flight hardware may be vulnerable to degradation or failure as a result of being exposed to ionizing radiation, such as x-rays. As stated above, bulk materials (structural metals, plastics, etc.) are generally only affected by ionizing radiation at very high dose levels. Likewise, passive electronic components (e.g. resistors, capacitors, most diodes) are strongly resistant to exposure to x-rays, except at very high doses. The main concerns arise when active components, that is, components like discrete transistors and microelectronic devices, are exposed to ionizing radiation. Active components are designed to respond to minute changes in currents and voltages in the circuit. As such, it is not surprising that exposure to ionizing radiation, which creates ionized and therefore electrically active particles, may degrade the way the hardware performs. For the most part, the mechanism for this degradation is trapping of the charges generated by ionizing radiation by defects in dielectric materials in the hardware. As such, the degree of damage is a function of both the quantity of ionizing radiation exposure and the physical characteristics of the hardware itself. The metric that describes the level of exposure to ionizing radiation is total ionizing dose (TID). The unit of TID is the rad, which is defined as 100 ergs absorbed per gram of material. Dose can be expressed in other units, for example grays (gy), where 1 gy = 100 rads. The actual fluence of radiation needed to deliver a rad depends on the absorbing material, so units of dose are usually stated in reference to the material of interest. That is, for microelectronic devices, the unit of dose is generally rad (Si) or rad (SiO2). However, the definition of absorbed dose in this fashion has the advantage that the type of radiation causing the ionization can be normalized so that a realistic and adequate comparison can be made. The sensitivity of microelectronic parts to TID varies over many orders of magnitude. (Note: Doses to humans are typically expressed in rems-or roentgen-equivalent-man-which measures tissue damage, and depends on the type of radiation, as well as the dose in rads.) Thus far, the "softest" parts tested at NASA showed damage at 500 rads (Si), while parts that are radiation-hardened by design can remain functional to doses on the order of 107 rads (Si). This broad range of sensitivity highlights one of the most important considerations when considering the effects of radiation on electronic parts: In order to determine whether a radiation exposure is a concern for a particular part, one must understand the technologies used in the part and their vulnerabilities to TID damage. A NASA radiation expert should be consulted to obtain such information.

X-ray↗
NASA NTRS2011

Failure Modes in Capacitors When Tested Under a Time-Varying Stress

Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors in decoupling applications. A surge step stress test (SSST) has been previously applied to identify the critical stress level of a capacitor batch to give some predictability to the power-on failure mechanism [1]. But SSST can also be viewed as an electrically destructive test under a time-varying stress (voltage). It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. When the reliability of capacitors is evaluated, a highly accelerated life test (HALT) is usually adopted since it is a time-efficient method of determining the failure mechanism; however, a destructive test under a time-varying stress such as SSST is even more time efficient. It usually takes days or weeks to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating a specific time-varying stress profile into a statistical model is significant in providing an alternative life test method for quickly revealing the failure mechanism in capacitors. In this paper, a time-varying stress that mimics a typical SSST has been incorporated into the Weibull model to characterize the failure mechanism in different types of capacitors. The SSST circuit and transient conditions for correctly surge testing capacitors are discussed. Finally, the SSST was applied for testing Ta capacitors, polymer aluminum capacitors (PA capacitors), and multi-layer ceramic (MLC) capacitors with both precious metal electrodes (PME) and base metal electrodes (BME). The test results are found to be directly associated with the dielectric layer breakdown in Ta and PA capacitors and are independent of the capacitor values, the way the capacitors were built, and the capacitors manufacturers. The test results also show that MLC capacitors exhibit surge breakdown voltages much higher than the rated voltage and that the breakdown field is inversely proportional to the dielectric layer thickness. The SSST data can also be used to comparatively evaluate the voltage robustness of capacitors for decoupling applications.

Liu, David (Donhang)↗
DOE OSTI2024

High throughput battery failure experimental platform

Addressing the need to increase the sample set to understand the causes of lithium battery thermal runaway, we conceived of an experimental platform with capability to increase the number of runaway experiments (currently 3-5 per week), while also collecting detailed electrochemical impedance spectroscopy measurements (EIS). Once expanded, the platform would enable data collection on 10s to 100s of cells that all experience runaway, thereby creating a statistical database necessary to identify early indication of risk. A primary containment unit to house cylindrical cells of variety NMC811 and of size 21700 (21 mm diameter by 70 mm length) was designed with features such as debris containment, preloaded cells in an exchangeable port, nitrogen ventilation, and exhaust containment. We performed the first overcharge abuse experiments of several 21700 cells, handpicked because of different initial EIS, and demonstrated that EIS changes dramatically during early stages of overcharge, but in a different manner than previous pouch cell experiments. The abuse experiments also revealed the discharge pattern and debris field created during runaway, as well as the cell temperature control and overheat, that must be considered in the primary containment apparatus. We designed and built a switching relay system to permit measurement of EIS without an active charging circuit, and created instrument control software for charging, EIS, and cell temperature control. The late-start funding was insufficient to fully construct the primary containment unit, but the foundational design and knowhow is available for any future work.

25 ENERGY STORAGE↗
NASA NTRS2008

NASA Tech Briefs, August 2008

Customizable Digital Receivers for Radar Two-Camera Acquisition and Tracking of a Flying Target Visual Data Analysis for Satellites A Data Type for Efficient Representation of Other Data Types Hand-Held Ultrasonic Instrument for Reading Matrix Symbols Broadband Microstrip-to-Coplanar Strip Double-Y Balun A Topographical Lidar System for Terrain-Relative Navigation Programmable Low-Voltage Circuit Breaker and Tester Electronic Switch Arrays for Managing Microbattery Arrays Topics covered include: Lower-Dark-Current, Higher-Blue-Response CMOS Imagers; Fabricating Large-Area Sheets of Single-Layer Graphene by CVD; Support for Diagnosis of Custom Computer Hardware; Providing Goal-Based Autonomy for Commanding a Spacecraft; Dynamic Method for Identifying Collected Sample Mass; Optimal Planning and Problem-Solving; Attitude-Control Algorithm for Minimizing Maneuver Execution Errors; Grants Document-Generation System; Heat-Storage Modules Containing LiNO3 3H2O and Graphite Foam; Precipitation-Strengthened, High-Temperature, High-Force Shape Memory Alloys; Improved Relief Valve Would Be Less Susceptible to Failure; Safety Modification of Cam-and-Groove Hose Coupling; Using Composite Materials in a Cryogenic Pump; Using Electronic Noses to Detect Tumors During Neurosurgery; Producing Newborn Synchronous Mammalian Cells; Smaller, Lower-Power Fast-Neutron Scintillation Detectors; Rotationally Vibrating Electric-Field Mill; Estimating Hardness from the USDC Tool-Bit Temperature Rise; Particle-Charge Spectrometer; Automated Production of Movies on a Cluster of Computers; FIDO-Class Development Rover; and Tone-Based Command of Deep Space Probes Using Ground Antennas.

Source record↗
DOE OSTI2026

Heterogeneous doping via nanoscale coating impacts the mechanics of Li intrusion in brittle solid electrolytes

Lithium dendrite intrusion in solid-state batteries limits fast charging and causes short-circuiting, yet the underlying regulating mechanisms are not well-understood. Here, in this work, we discover that heterogeneous Ag + doping dramatically affects lithium intrusion into Li 6.6 La 3 Zr 1.6 Ta 0.4 O 12 (LLZO), a brittle solid electrolyte. Nanoscale Ag + doping is achieved by thermally annealing a 3-nm-thick metallic coating on LLZO, inducing Ag–Li ion exchange and Ag diffusion into grains and grain boundaries. Density functional theory calculations and experimental characterization show negligible impact on the electronic properties and surface wettability from Ag + incorporation. Mechanically, nanoindentation experiments show a fivefold increase in the mechanical force required to fracture the surface Ag + -doped LLZO, indicating substantial doping-induced surface toughening. Operando microprobe scanning electron microscopy experiments show that the Ag + -doped LLZO surface exhibits improved lithium plating at >250 mA cm −2 and an electroplating diameter that is expanded by over fourfold, even under an extreme indentation stress of 3 GPa. This demonstrates enhanced defect tolerance in LLZO, rather than electronic or adhesion effects. Our study reveals a chemo-mechanical mechanism via surface heterogeneous doping, complementing present bulk design rules to minimize mechanical failures in solid-state batteries.

36 MATERIALS SCIENCE↗
NASA NTRS2009

Modular Battery Charge Controller

A new approach to masterless, distributed, digital-charge control for batteries requiring charge control has been developed and implemented. This approach is required in battery chemistries that need cell-level charge control for safety and is characterized by the use of one controller per cell, resulting in redundant sensors for critical components, such as voltage, temperature, and current. The charge controllers in a given battery interact in a masterless fashion for the purpose of cell balancing, charge control, and state-of-charge estimation. This makes the battery system invariably fault-tolerant. The solution to the single-fault failure, due to the use of a single charge controller (CC), was solved by implementing one CC per cell and linking them via an isolated communication bus [e.g., controller area network (CAN)] in a masterless fashion so that the failure of one or more CCs will not impact the remaining functional CCs. Each micro-controller-based CC digitizes the cell voltage (V(sub cell)), two cell temperatures, and the voltage across the switch (V); the latter variable is used in conjunction with V(sub cell) to estimate the bypass current for a given bypass resistor. Furthermore, CC1 digitizes the battery current (I1) and battery voltage (V(sub batt) and CC5 digitizes a second battery current (I2). As a result, redundant readings are taken for temperature, battery current, and battery voltage through the summation of the individual cell voltages given that each CC knows the voltage of the other cells. For the purpose of cell balancing, each CC periodically and independently transmits its cell voltage and stores the received cell voltage of the other cells in an array. The position in the array depends on the identifier (ID) of the transmitting CC. After eight cell voltage receptions, the array is checked to see if one or more cells did not transmit. If one or more transmissions are missing, the missing cell(s) is (are) eliminated from cell-balancing calculations. The cell-balancing algorithm is based on the error between the cell s voltage and the other cells and is categorized into four zones of operation. The algorithm is executed every second and, if cell balancing is activated, the error variable is set to a negative low value. The largest error between the cell and the other cells is found and the zone of operation determined. If the error is zero or negative, then the cell is at the lowest voltage and no balancing action is needed. If the error is less than a predetermined negative value, a Cell Bad Flag is set. If the error is positive, then cell balancing is needed, but a hysteretic zone is added to prevent the bypass circuit from triggering repeatedly near zero error. This approach keeps the cells within a predetermined voltage range.

Button, Robert↗
DOE OSTI2024

Control, Fault Management, and Grid Support Functionality of an MV AC-DC Solid State Transformer based EV Extreme Fast Charging Station

Electric vehicles (EVs) have become increasingly popular in recent times while revolutionizing the consumer and commercial transportation market. The development of charging infrastructure has become one of the priorities for increasing the adoption of EVs. Extreme fast charging (XFC) technology can reduce the so-called ’range anxiety’ of consumers as they significantly reduce the charging time. With the advent of wide band-gap (WBG) power devices and improvement in power electronic converters, medium voltage (MV) solid state transformer (SST) based XFC system has the potential to replace the traditional XFC stations because of the lower footprint, ease of installation, enhanced control feature, and better system efficiency. The control system design is one of the critical aspects of the SST development process. Careful consideration and detailed analysis are required to find out suitable control method for the SST based on its topology among different centralized and decentralized control architectures. Also, the control parameters selection and potential improvement to the transient response of the controller ought to be investigated. Another major concern of the SST is different types of internal fault which reduces the overall reliability of the XFC system. As a result, designing a robust protection system is essential. Among different fault modes, open circuit switch faults have received significant attention as an active research area because of their likelihood and severe effects on converters. Therefore, the power stages used in the XFC system require functional and accurate open circuit switch fault management methods. An equally significant aspect of this SST based XFC is its compatibility in a microgrid where there is no synchronous generator present. When the grid is not available, the XFC SSTs can provide grid forming capability and continue supplying the critical loads in islanded mode. The transition between grid connected and islanded mode, especially the grid resynchronization process has to be carefully performed for the safety of the microgrid components. The challenges posed by the aforementioned issues have inspired the work done in this dissertation. Here, a 13.2 kV, 1 MVA, AC/DC SST for the XFC system is examined and a comparative analysis is conducted to select the control architecture based on feasibility of implementation and performance. A detailed control parameter design process is demonstrated considering the sensor dynamics and delay. The selected decentralized control method is augmented by introducing a novel sensor-less load current feedforward method to provide better voltage regulation at the DC bus during a change of load. Next, in the fault management section, a hierarchical failure mode effect analysis (FMEA) is proposed to enable a systematic design of the internal fault protection of the XFC SST as there are limited examples in the literature regarding the analysis of the safety and design of the protection of a power electronic converter system. Novel open circuit switch fault management methods for the converters in the system are presented. Finally, XFC SST based MV microgrid operations in grid connected mode and islanded mode are explored. A secondary control method for grid resynchronization is presented and a design process of control parameters is shown to ensure the stability of the secondary voltage and frequency regulation.

30 DIRECT ENERGY CONVERSION↗