Search NASA⌕ Search

SEARCH · Search NASA

Results for “Chips”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

A very high speed lossless compression/decompression chip set

A chip is described that will perform lossless compression and decompression using the Rice Algorithm. The chip set is designed to compress and decompress source data in real time for many applications. The encoder is designed to code at 20 M samples/second at MIL specifications. That corresponds to 280 Mbits/second at maximum quantization or approximately 500 Mbits/second under nominal conditions. The decoder is designed to decode at 10 M samples/second at industrial specifications. A wide range of quantization levels is allowed (4...14 bits) and both nearest neighbor prediction and external prediction are supported. When the pre and post processors are bypassed, the chip set performs high speed entropy coding and decoding. This frees the chip set from being tied to one modeling technique or specific application. Both the encoder and decoder are being fabricated in a 1.0 micron CMOS process that has been tested to survive 1 megarad of total radiation dosage. The CMOS chips are small, only 5 mm on a side, and both are estimated to consume less than 1/4 of a Watt of power while operating at maximum frequency.

Venbrux, Jack↗
NASA NTRS2004

A Low Cost Single Chip VDL Compatible Transceiver ASIC

Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

Becker, Robert↗
NASA NTRS2009

Manipulating Neutral Atoms in Chip-Based Magnetic Traps

Several techniques for manipulating neutral atoms (more precisely, ultracold clouds of neutral atoms) in chip-based magnetic traps and atomic waveguides have been demonstrated. Such traps and waveguides are promising components of future quantum sensors that would offer sensitivities much greater than those of conventional sensors. Potential applications include gyroscopy and basic research in physical phenomena that involve gravitational and/or electromagnetic fields. The developed techniques make it possible to control atoms with greater versatility and dexterity than were previously possible and, hence, can be expected to contribute to the value of chip-based magnetic traps and atomic waveguides. The basic principle of these techniques is to control gradient magnetic fields with suitable timing so as to alter a trap to exert position-, velocity-, and/or time-dependent forces on atoms in the trap to obtain desired effects. The trap magnetic fields are generated by controlled electric currents flowing in both macroscopic off-chip electromagnet coils and microscopic wires on the surface of the chip. The methods are best explained in terms of examples. Rather than simply allowing atoms to expand freely into an atomic waveguide, one can give them a controllable push by switching on an externally generated or a chip-based gradient magnetic field. This push can increase the speed of the atoms, typically from about 5 to about 20 cm/s. Applying a non-linear magnetic-field gradient exerts different forces on atoms in different positions a phenomenon that one can exploit by introducing a delay between releasing atoms into the waveguide and turning on the magnetic field.

Aveline, David↗
NASA NTRS2012

Mathematical Simulation for Integrated Linear Fresnel Spectrometer Chip

A miniaturized solid-state optical spectrometer chip was designed with a linear gradient-gap Fresnel grating which was mounted perpendicularly to a sensor array surface and simulated for its performance and functionality. Unlike common spectrometers which are based on Fraunhoffer diffraction with a regular periodic line grating, the new linear gradient grating Fresnel spectrometer chip can be miniaturized to a much smaller form-factor into the Fresnel regime exceeding the limit of conventional spectrometers. This mathematical calculation shows that building a tiny motionless multi-pixel microspectrometer chip which is smaller than 1 cubic millimter of optical path volume is possible. The new Fresnel spectrometer chip is proportional to the energy scale (hc/lambda), while the conventional spectrometers are proportional to the wavelength scale (lambda). We report the theoretical optical working principle and new data collection algorithm of the new Fresnel spectrometer to build a compact integrated optical chip.

Park, Yeonjoon↗
NASA NTRS2015

Towards a Generic and Adaptive System-On-Chip Controller for Space Exploration Instrumentation

This paper introduces one of the first efforts conducted at NASA’s Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9 dual-core processor on a single chip. The Zynq implements a generic and customizable on-chip infrastructure that can be reused with a variety of instruments, and it has been coupled with a set of off-chip components that are necessary to deal with the different instruments. We have taken JPL’s Compositional InfraRed Imaging Spectrometer (CIRIS), which is proposed for NASA icy moons missions, as a use-case scenario to demonstrate that the entire data processing, control and interface of an instrument can be implemented on a single device using the on-chip infrastructure described in this paper. We show that the performance results achieved in this preliminary version of the instrumentation controller are sufficient to fulfill the science requirements demanded to the CIRIS instrument in future NASA missions, such as Europa.

embedded system↗
NASA NTRS2018

NEPP Evaluation of Automotive Grade Tantalum Chip Capacitors

Automotive grade tantalum (Ta) chip capacitors are available at lower cost with smaller physical size and higher volumetric efficiency compared to military/space grade capacitors. Designers of high reliability aerospace and military systems would like to take advantage of these attributes while maintaining the high standards for long-term reliable operation they are accustomed to when selecting military-qualified established reliability tantalum chip capacitors (e.g., MIL-PRF-55365). The objective for this evaluation was to assess the long-term performance of off-the-shelf automotive grade Ta chip capacitors (i.e., manufacturer self-qualified per AEC Q-200). Two (2) lots of case size D manganese dioxide (MnO2) cathode Ta chip capacitors from 1 manufacturer were evaluated. The evaluation consisted of construction analysis, basic electrical parameter characterization, extended long-term (2000 hours) life testing and some accelerated stress testing. Tests and acceptance criteria were based upon manufacturer datasheets and the Automotive Electronics Council's AEC Q-200 qualification specification for passive electronic components. As-received a few capacitors were marginally above the specified tolerance for capacitance and ESR. X-ray inspection found that the anodes for some devices may not be properly aligned within the molded encapsulation leaving less than 1 mil thickness of the encapsulation. This evaluation found that the long-term life performance of automotive grade Ta chip capacitors is generally within specification limits suggesting these capacitors may be suitable for some space applications.

Automotive↗
NASA NTRSDate not supplied

Testing of the ISS’s Charcoal HEPA Integrated Particle Scrubber (CHIPS) Filters to Ascertain an Efficiency Curve and Most Penetrating Particle Size

High air quality is a top priority in hermetically sealed environments, such as the International Space Station (ISS). Aerosol particulate filtration on the ISS is achieved via 21 HEPA filters. Traditional HEPA filters have an efficiency of 99.97%, but HEPA filters aboard the ISS have been found to achieve 99.99% efficiency. This may be due to the flight-grade HEPA filters chosen or, less likely, that they are combined with activated charcoal filters for siloxane removal in a combination referred to as Charcoal HEPA Integrated Particle Scrubbers (CHIPS) filters. All filters have a Most Penetrating Particle Size (MPPS), but, until now, the MPPS and efficiency curve of the CHIPS filters was not known. The efficiency curve of the CHIPS filters was ascertained at NASA Glenn Research Center through standard salt crystal aerosolization. This method was selected over aerosolized oil droplets due to a desire to preserve the filter’s function for further testing. The CHIPS filters were tested as they are oriented on the ISS (activated charcoal filter followed by a flight-grade HEPA filter), with the HEPA portion alone, and with the activated charcoal portion alone. The results of this experiment are generally useful but can be especially useful for the microbiology and Environmental Control and Life Support Systems (ECLSS). This is due to microbial contamination being a potential concern in the air revitalization systems on the ISS. Knowing the MMPS of the CHIPS filters, in conjunction with levels of airborne microbes, is useful for predicting which and how many microbes are likely to get through the HEPA filters that sit in the beginning of the ISS airstream. It may also be useful to other groups at NASA to know how many particulates are able to pass through high-efficiency filtration, and even for healthcare cleanrooms and other air purification pursuits.

A Nicolas Whitlock↗
DOE OSTI2025

Simulating Alpha Particles Incident on MKID Chips for Quantum Sensitivity Analysis

Superconducting quantum devices, such as microwave kinetic inductance detectors (MKIDs), are highly sensitive instruments used in quantum computing and advanced sensing technologies. However, their extreme sensitivity also makes them vulnerable to background noise from natural sources like radiation. One significant contributor to this noise is alpha particles emitted by 210Po, a radon decay daughter that accumulates on surfaces near the detector. This project investigates how alpha particles emitted from 210Po interact with MKID chips. These particles can deposit energy on the detector surface, disrupting its operation and generating false signals. Understanding the energy and behavior of these particles is crucial for improving the design and reliability of quantum devices. To explore this, we first modeled the decay chain starting from 210Pb to 210Po using differential equations. This allowed us to predict how the activity of alpha-emitting isotopes changes over time, reaching a steady state after about two years. Next, we simulated alpha particle interactions with the MKID chip using the Geant4 software toolkit. We built a detailed computer model of the detector housing, including the copper lid where alpha particles originate, the silicon chip, and a thin aluminum sensor layer. Alpha particles were emitted isotropically from just beneath the copper lid’s surface, mimicking natural decay conditions. The simulation tracked how these particles deposit energy on the chip, generating electron-hole pairs and phonons. The results provide insight into the behavior of the resultant electron-hole pairs and phonons, giving us a clear understanding of the energy deposition distribution on the chip. This work supports efforts to mitigate background noise in superconducting sensors, advancing their use in quantum computing and sensitive physics experiments.

Hall, Matthew [Fermilab; UCLA]↗
NASA NTRS2004

Open-systems Architecture of a Standardized Command Interface Chip-set for Switching and Control of a Spacecraft Power Bus

This viewgraph presentation reviews the architecture of the The CIA-AlA chip-set is a set of mixed-signal ASICs that provide a flexible high level interface between the spacecraft's command and data handling (C&DH) electronics and lower level functions in other spacecraft subsystems. Due to the open-systems architecture of the chip-set including an embedded micro-controller a variety of applications are possible. The chip-set was developed for the missions to the outer planets. The chips were developed to provide a single solution for both the switching and regulation of a spacecraft power bus. The Open-Systems Architecture allows for other powerful applications.

power switch slice (PSS)↗
DOE OSTI2020

A versatile and low-cost chip-to-world interface: enabling ICP-MS characterization of isotachophoretically separated lanthanides on a microfluidic device

Microfluidics offer novel and state-of-the-art pathways to process materials. Microfluidic systems drastically reduce timeframes and costs associated with traditional lab-scale efforts in the area of analytical sample preparations. The challenge arises in effectively connecting microfluidics to off-chip analysis tools to accurately characterize samples after treatment on-chip. Here, a fused silica microfluidic device (MFD) is connected to a fused-silica capillary in order to create a world-to-chip connection between the MFD and an inductively coupled plasma mass spectrometer (ICP-MS). Specifically, this is demonstrated by utilizing isotachophoresis (ITP) on a microfluidic chip to separate samples containing up to 14 lanthanides into elementally pure bands. The separated sample is successfully transferred across a 7 nL dead space at the microchip-capillary junction, such that separation resolution is maintained and even increased through the interface and into the ICP-MS, where the elemental composition of the separated sample is analysed. Lanthanide samples of varying composition are detected using ICP-MS, demonstrating this versatile and cost-effective approach that does not degrade the separation quality achieved on the MFD. This simple and inexpensive connection enables fast, low-cost sample preparation immediately prior to injection into an ICP-MS or other analytical instruments.

Lackey, Hope E.↗
DOE OSTI2020

Analysis of structure-property gradients in orthogonally machined chips and workpiece subsurface

Production of machined surfaces with optimized mechanical properties requires fundamental process-structure-property knowledge. In this paper, we focus on structure-property gradients in orthogonally cut OFHC Copper chips and the workpiece subsurface. We utilize orientation imaging microscopy and statistical spatial correlation metrics to quantify the microstructure. Constitutive elastic-plastic properties of the workpiece subsurface and chips are measured using spherical nanoindentation. Analysis of the data reveals significant structure and property gradients in both regions. Differences and similarities in structure and property gradients near the workpiece surface and tool-chip interface, and in the chip middle are discussed and explained.

42 ENGINEERING↗
DOE OSTI2022

Low cost and massively parallel force spectroscopy with fluid loading on a chip

Current approaches for single molecule force spectroscopy are typically constrained by low throughput and high instrumentation cost. Herein, a low-cost, high throughput technique is demonstrated using microfluidics for multiplexed mechanical manipulation of up to ~4000 individual molecules via molecular fluid loading on-a-chip (FLO-Chip). The FLO-Chip consists of serially connected microchannels with varying width, allowing for simultaneous testing at multiple loading rates. Molecular force measurements are demonstrated by dissociating Biotin-Streptavidin and Digoxigenin-AntiDigoxigenin interactions along with unzipping of double stranded DNA of varying sequence under different dynamic loading rates and solution conditions. Rupture force results under varying loading rates and solution conditions are in good agreement with prior studies, verifying a versatile approach for single molecule biophysics and molecular mechanobiology. FLO-Chip enables straightforward, rapid, low-cost, and portable mechanical testing of single molecules that can be implemented on a wide range of microscopes to broaden access and may enable new applications of molecular force spectroscopy.

42 ENGINEERING↗
DOE OSTI2025

An on-chip phased array for non-classical light

Abstract Quantum science and technology can offer fundamental enhancements in sensing, communications and computing. The expansion from wired to wireless links is an exciting prospect for quantum technologies. For classical technologies, the advent of phased arrays enabled directional and adaptive wireless links by manipulating electromagnetic waves over free space. Here we demonstrate a phased array system on a chip that can receive, image and manipulate non-classical light over free space. We use an integrated photonic-electronic system with more than 1000 functional components on-chip to detect squeezed light. By integrating an array of 32 sub-wavelength engineered metamaterial antennas, we demonstrate a direct free-space-to-chip interface for reconfigurable quantum links. On the same chip, we implement a large-scale array of quantum-limited coherent receivers that can resolve non-classical signals simultaneously across 32 channels. With coherent readout and manipulation of these signals, we demonstrate 32-pixel imaging and spatially configurable reception of squeezed light over free space. Our work advances wireless quantum technologies that could enable practical applications in quantum communications and sensing.

Science & Technology - Other Topics↗
DOE OSTI2021

System-on-chip upgrade of millimeter-wave imaging diagnostics for fusion plasma

Monolithic, millimeter wave “system-on-chip” technology has been employed in chip heterodyne radiometers in a newly developed Electron Cyclotron Emission Imaging (ECEI) system on the DIII-D tokamak for 2D electron temperature and fluctuation diagnostics. The system employs 20 horn-waveguide receiver modules each with customized W-band (75–110 GHz) monolithic microwave integrated circuit chips comprising a W-band low noise amplifier, a balanced mixer, a ×2 local oscillator (LO) frequency doubler, and two intermediate frequency amplifier stages in each module. Compared to previous quasi-optical ECEI arrays with Schottky mixer diodes mounted on planar antennas, the upgraded W-band array exhibits >30 dB additional gain and 20× improvement in noise temperature; an internal eight times multiplier chain is used to provide LO coupling, thereby eliminating the need for quasi-optical coupling. The horn-waveguide shielding housing avoids out-of-band noise interference on each module. The upgraded ECEI system plays an important role for absolute electron temperature and fluctuation measurements for edge and core region transport physics studies. An F-band receiver chip (up to 140 GHz) is under development for additional fusion facilities with a higher toroidal magnetic field. Visualization diagnostics provide multi-scale and multi-dimensional data in plasma profile evolution. Finally, a significant aspect of imaging measurement is focusing on artificial intelligence for science applications.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

Strategies for on-chip digital data compression for X-ray pixel detectors

Here, the continued desire for X-ray pixel detectors with higher frame rates will stress the ability of application-specific integrated circuit (ASIC) designers to provide sufficient off-chip bandwidth to reach continuous frame rates in the 1 MHz regime. To move from the current 10 kHz to the 1 MHz frame rate regime, ASIC designers will continue to pack as many power-hungry high-speed transceivers at the periphery of the ASIC as possible. In this paper, however, we present new strategies to make the most efficient use of the off-chip bandwidth by utilizing data compression schemes for X-ray photon-counting and charge-integrating pixel detectors. In particular, we describe a novel in-pixel compression scheme that converts from analog to digital converter units to encoded photon counts near the photon Poisson noise level and achieves a compression ratio of >1.5x independent of the dataset. In addition, we describe a simple yet efficient zero-suppression compression scheme called "zeromask" (ZM) located at the ASIC's edge before streaming data off the ASIC chip. ZM achieves average compression ratios of >4x, >7x, and >8x for high-energy X-ray diffraction, ptychography, and X-ray photon correlation spectroscopy datasets, respectively. We present the conceptual designs, register-transfer level block diagrams, and the physical ASIC implementation of these compression schemes in 65 nm CMOS. When combined, these two digital compression schemes could increase the effective off-chip bandwidth by a factor of 6-12x.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

A first look at AS-ROC: a Si-Ge integrated chip readout for fast timing

Abstract Advances in timing detector technology require new specialized readout electronics. Applications demand below 10 ps time of arrival resolution and low power for a low repetition rate. A possible path to achieve O(10 ps) time resolution is an integrated chip using Silicon Germanium (SiGe) technology. Using DoE SBIR funding, Anadyne, Inc., in collaboration with UC Santa Cruz, has developed a prototype SiGe front-end readout chip optimized for low power and timing resolution. Two versions of the chip were produced with performance in simulation: a more power version with 10 ps resolution at 5 fC with 1.1 mW/channel, and a less power version with 10 ps resolution at 8 fC with 0.6 mW/channel.The chip was produced at Tower Semiconductor with 350 nm technology. The ASIC from the prototype run shows good performance: a rise time of 0.7–1 ns and 25 mV per fC response with RMS noise <1 mV. Simulation and results from the prototype will be reported in this paper.

Instruments & Instrumentation↗
DOE OSTI2022

Distributed Quantum Error Correction for Chip-Level Catastrophic Errors

Quantum error correction holds the key to scaling up quantum computers. Cosmic ray events severely impact the operation of a quantum computer by causing chip-level catastrophic errors, essentially erasing the information encoded in a chip. Here, in this work, we present a distributed error correction scheme to combat the devastating effect of such events by introducing an additional layer of quantum erasure error correcting code across separate chips. We show that our scheme is fault tolerant against chip-level catastrophic errors and discuss its experimental implementation using superconducting qubits with microwave links. Our analysis shows that in state-of-the-art experiments, it is possible to suppress the rate of these errors from 1 per 10 s to less than 1 per month.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Hardware-in-the-Loop Evaluation of Grid-Edge DER Chip Integration Into Next-Generation Smart Meters

To facilitate the implementation of distributed energy resource management systems (DERMS), we propose to insert a grid-edge distributed energy resource (DER) chip hosting a DERMS algorithm into the next generation of smart meters. This will create a pathway for the wide adoption of DERMS technology because many utilities plan to invest in advanced metering infrastructure in the near future. This will also bridge the gap between an electrical power utility and DERs behind the meter. The DER chip is designed to follow power direction signals from the DERMS coordinator while balancing its local objectives. We tested the chip using a controller- and power-hardware-in-the-loop evaluation under three scenarios that a DERMS could face in the real world. The DER chip was capable of and effective at directing four heterogeneous DERs to respond to a DERMS coordinator for grid services (e.g., voltage regulation and a virtual power plant).

distributed energy resource management system↗