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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3

Airport-Noise Levels and Annoyance Model (ALAMO) system's reference manual

The airport-noise levels and annoyance model (ALAMO) is described in terms of the constituent modules, the execution of ALAMO procedure files, necessary for system execution, and the source code documentation associated with code development at Langley Research Center. The modules constituting ALAMO are presented both in flow graph form, and through a description of the subroutines and functions that comprise them.

Deloach, R.↗

A real-time expert system for self-repairing flight control

An integrated environment for specifying, prototyping, and implementing a self-repairing flight-control (SRFC) strategy is described. At an interactive workstation, the user can select paradigms such as rule-based expert systems, state-transition diagrams, and signal-flow graphs and hierarchically nest them, assign timing and priority attributes, establish blackboard-type communication, and specify concurrent execution on single or multiple processors. High-fidelity nonlinear simulations of aircraft and SRFC systems can be performed off-line, with the possibility of changing SRFC rules, inference strategies, and other heuristics to correct for control deficiencies. Finally, the off-line-generated SRFC can be transformed into highly optimized application-specific real-time C-language code. An application of this environment to the design of aircraft fault detection, isolation, and accommodation algorithms is presented in detail.

Gaither, S. A.↗

Real-Time MENTAT programming language and architecture

Real-time MENTAT, a programming environment designed to simplify the task of programming real-time applications in distributed and parallel environments, is described. It is based on the same data-driven computation model and object-oriented programming paradigm as MENTAT. It provides an easy-to-use mechanism to exploit parallelism, language constructs for the expression and enforcement of timing constraints, and run-time support for scheduling and exciting real-time programs. The real-time MENTAT programming language is an extended C++. The extensions are added to facilitate automatic detection of data flow and generation of data flow graphs, to express the timing constraints of individual granules of computation, and to provide scheduling directives for the runtime system. A high-level view of the real-time MENTAT system architecture and programming language constructs is provided.

Grimshaw, Andrew S.↗

Obtaining schedules for digital systems

A systematic technique is presented to derive correct schedules for a synchronous digital system, given a signal flow graph for an algorithm. It is also shown how to use this technique to derive designs that are optimal in having the lowest latency, the highest throughput, or the smallest number of registers. The same technique can also be used to verify digital systems that have already been designed.

Jagadish, H. V.↗

A comparison of multiprocessor scheduling methods for iterative data flow architectures

A comparative study is made between the Algorithm to Architecture Mapping Model (ATAMM) and three other related multiprocessing models from the published literature. The primary focus of all four models is the non-preemptive scheduling of large-grain iterative data flow graphs as required in real-time systems, control applications, signal processing, and pipelined computations. Important characteristics of the models such as injection control, dynamic assignment, multiple node instantiations, static optimum unfolding, range-chart guided scheduling, and mathematical optimization are identified. The models from the literature are compared with the ATAMM for performance, scheduling methods, memory requirements, and complexity of scheduling and design procedures.

Storch, Matthew↗

SPROC: A multiple-processor DSP IC

A large, single-chip, multiple-processor, digital signal processing (DSP) integrated circuit (IC) fabricated in HP-Cmos34 is presented. The innovative architecture is best suited for analog and real-time systems characterized by both parallel signal data flows and concurrent logic processing. The IC is supported by a powerful development system that transforms graphical signal flow graphs into production-ready systems in minutes. Automatic compiler partitioning of tasks among four on-chip processors gives the IC the signal processing power of several conventional DSP chips.

Davis, R.↗

A novel visual hardware behavioral language

Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

Li, Xueqin↗

Modeling heterogeneous processor scheduling for real time systems

A new model is presented to describe dataflow algorithms implemented in a multiprocessing system. Called the resource/data flow graph (RDFG), the model explicitly represents cyclo-static processor schedules as circuits of processor arcs which reflect the order that processors execute graph nodes. The model also allows the guarantee of meeting hard real-time deadlines. When unfolded, the model identifies statically the processor schedule. The model therefore is useful for determining the throughput and latency of systems with heterogeneous processors. The applicability of the model is demonstrated using a space surveillance algorithm.

Leathrum, J. F.↗

NAS Grid Benchmarks: A Tool for Grid Space Exploration

We present an approach for benchmarking services provided by computational Grids. It is based on the NAS Parallel Benchmarks (NPB) and is called NAS Grid Benchmark (NGB) in this paper. We present NGB as a data flow graph encapsulating an instance of an NPB code in each graph node, which communicates with other nodes by sending/receiving initialization data. These nodes may be mapped to the same or different Grid machines. Like NPB, NGB will specify several different classes (problem sizes). NGB also specifies the generic Grid services sufficient for running the bench-mark. The implementor has the freedom to choose any specific Grid environment. However, we describe a reference implementation in Java, and present some scenarios for using NGB.

Frumkin, Michael↗

NAS Grid Benchmarks

We provide a paper-and-pencil specification of a benchmark suite for computational grids. It is based on the NAS (NASA Advanced Supercomputing) Parallel Benchmarks (NPB) and is called the NAS Grid Benchmarks (NGB). NGB problems are presented as data flow graphs encapsulating an instance of a slightly modified NPB task in each graph node, which communicates with other nodes by sending/receiving initialization data. Like NPB, NGB specifies several different classes (problem sizes). In this report we describe classes S, W, and A, and provide verification values for each. The implementor has the freedom to choose any language, grid environment, security model, fault tolerance/error correction mechanism, etc., as long as the resulting implementation passes the verification test and reports the turnaround time of the benchmark.

VanderWijngaart, Rob↗

Distributed Computing Framework for Synthetic Radar Application

We are developing an extensible software framework, in response to Air Force and NASA needs for distributed computing facilities for a variety of radar applications. The objective of this work is to develop a Python based software framework, that is the framework elements of the middleware that allows developers to control processing flow on a grid in a distributed computing environment. Framework architectures to date allow developers to connect processing functions together as interchangeable objects, thereby allowing a data flow graph to be devised for a specific problem to be solved. The Pyre framework, developed at the California Institute of Technology (Caltech), and now being used as the basis for next-generation radar processing at JPL, is a Python-based software framework. We have extended the Pyre framework to include new facilities to deploy processing components as services, including components that monitor and assess the state of the distributed network for eventual real-time control of grid resources.

synthetic aperture radar (SAR)↗

Multi-Platform Avionics Simulator

Multi-Platform Avionics Simulator (MPAvSim) is a software library for development of simulations of avionic hardware. MPAvSim facilitates simulation of interactions between flight software and such avionic peripheral equipment as telecommunication devices, thrusters, pyrotechnic devices, motor controllers, and scientific instruments. MPAvSim focuses on the behavior of avionics as seen by flight software, rather than on performing high-fidelity simulations of dynamics. However, MPAvSim is easily integrable with other programs that do perform such simulations. MPAvSim makes it possible to do real-time partial hardware- in-the-loop simulations. An MPAvSim simulation consists of execution chains (see figure) represented by flow graphs of models, defined here as stateless procedures that do some work. During a simulation, MPAvSim walks the execution chain, running each model in turn. Using MPAvSim, flight software can be run against a spacecraft that is all simulation, all hardware, or part hardware and part simulation. With respect to a specific piece of hardware, either the hardware itself or its simulation can be plugged in without affecting the rest of the system. Thus, flight software can be tested before hardware is available, and as items of hardware become available, they can be substituted for their simulations, with minimal disruption.

Clark, Micah↗

Software Defined Radio with Parallelized Software Architecture

This software implements software-defined radio procession over multicore, multi-CPU systems in a way that maximizes the use of CPU resources in the system. The software treats each processing step in either a communications or navigation modulator or demodulator system as an independent, threaded block. Each threaded block is defined with a programmable number of input or output buffers; these buffers are implemented using POSIX pipes. In addition, each threaded block is assigned a unique thread upon block installation. A modulator or demodulator system is built by assembly of the threaded blocks into a flow graph, which assembles the processing blocks to accomplish the desired signal processing. This software architecture allows the software to scale effortlessly between single CPU/single-core computers or multi-CPU/multi-core computers without recompilation. NASA spaceflight and ground communications systems currently rely exclusively on ASICs or FPGAs. This software allows low- and medium-bandwidth (100 bps to approx.50 Mbps) software defined radios to be designed and implemented solely in C/C++ software, while lowering development costs and facilitating reuse and extensibility.

Heckler, Greg↗

Software Defined Radio with Parallelized Software Architecture

This software implements software-defined radio procession over multi-core, multi-CPU systems in a way that maximizes the use of CPU resources in the system. The software treats each processing step in either a communications or navigation modulator or demodulator system as an independent, threaded block. Each threaded block is defined with a programmable number of input or output buffers; these buffers are implemented using POSIX pipes. In addition, each threaded block is assigned a unique thread upon block installation. A modulator or demodulator system is built by assembly of the threaded blocks into a flow graph, which assembles the processing blocks to accomplish the desired signal processing. This software architecture allows the software to scale effortlessly between single CPU/single-core computers or multi-CPU/multi-core computers without recompilation. NASA spaceflight and ground communications systems currently rely exclusively on ASICs or FPGAs. This software allows low- and medium-bandwidth (100 bps to .50 Mbps) software defined radios to be designed and implemented solely in C/C++ software, while lowering development costs and facilitating reuse and extensibility.

Heckler, Greg↗

Experimental results for a hypersonic nozzle/afterbody flow field

This study was conducted to experimentally characterize the flow field created by the interaction of a single-expansion ramp-nozzle (SERN) flow with a hypersonic external stream. Data were obtained from a generic nozzle/afterbody model in the 3.5 Foot Hypersonic Wind Tunnel at the NASA Ames Research Center, in a cooperative experimental program involving Ames and McDonnell Douglas Aerospace. The model design and test planning were performed in close cooperation with members of the Ames computational fluid dynamics (CFD) team for the National Aerospace Plane (NASP) program. This paper presents experimental results consisting of oil-flow and shadow graph flow-visualization photographs, afterbody surface-pressure distributions, rake boundary-layer measurements, Preston-tube skin-friction measurements, and flow field surveys with five-hole and thermocouple probes. The probe data consist of impact pressure, flow direction, and total temperature profiles in the interaction flow field.

Spaid, Frank W.↗

Graphical User Interface Development for Representing Air Flow Patterns

In the Turbine Branch, scientists carry out experimental and computational work to advance the efficiency and diminish the noise production of jet engine turbines. One way to do this is by decreasing the heat that the turbine blades receive. Most of the experimental work is carried out by taking a single turbine blade and analyzing the air flow patterns around it, because this data indicates the sections of the turbine blade that are getting too hot. Since the cost of doing turbine blade air flow experiments is very high, researchers try to do computational work that fits the experimental data. The goal of computational fluid dynamics is for scientists to find a numerical way to predict the complex flow patterns around different turbine blades without physically having to perform tests or costly experiments. When visualizing flow patterns, scientists need a way to represent the flow conditions around a turbine blade. A researcher will assign specific zones that surround the turbine blade. In a two-dimensional view, the zones are usually quadrilaterals. The next step is to assign boundary conditions which define how the flow enters or exits one side of a zone. way of setting up computational zones and grids, visualizing flow patterns, and storing all the flow conditions in a file on the computer for future computation. Such a program is necessary because the only method for creating flow pattern graphs is by hand, which is tedious and time-consuming. By using a computer program to create the zones and grids, the graph would be faster to make and easier to edit. Basically, the user would run a program that is an editable graph. The user could click and drag with the mouse to form various zones and grids, then edit the locations of these grids, add flow and boundary conditions, and finally save the graph for future use and analysis. My goal this summer is to create a graphical user interface (GUI) that incorporates all of these elements. I am writing the program in Java, a language that is portable among platforms, because it can run on different operating systems such as Windows and Unix without having to be rewritten. I had no prior experience of programming in Java at the start of my internship; I am continuously learning as I create the program. I have written the part of the program that enables a user to draw several zones, edit them, and store their locations. The next phase of my project is to allow the user to click on the side of a zone and create a boundary condition for it. A previous intern wrote a program that allows the user to input boundary conditions. I can integrate the two programs to create a larger, more usable program. After that, I will develop a way for the user to save the graph for future reference. Another eventual goal is to make the GUI capable of creating three-dimensional zones as well. Researchers such as my mentor, Dr. David Ashpis, need a quick, user-friendly

Chaudhary, Nilika↗