Field Assisted Photoemission from Nanocrystalline Diamond and Diamond Field Emitter Arrays
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Many applications, such as compact accelerators and electron microscopy, demand high brightness electron beams with small source size and ultralow emittance. Diamond emitters manufactured with semiconductor processes can be employed in such compact beam sources. The micrometer-scale pyramid structure of the emitter allows enhancement of the external field compared to that at the substrate, leading to electron emission with small beam size. We investigate the dependence of the field enhancement on the shape of the emitter and the resulting emission characteristics. The beam formation and dynamics are simulated with the LSP particle-in-cell code to obtain the macroscopic observables. To account for the semiconductor charge transport in the bulk material and the tunneling through the surface, a first-principle semiclassical Monte Carlo emission model is developed and applied to the diamond pyramid. Using this Monte Carlo emission model and the result from the geometric field enhancement calculation, we construct a simple model to qualitatively explain the measured emission characteristics. In conclusion, a comparison between our model and experiments indicates that the beam current is mostly emitted at the apex of the emitter.
Field Programmable Gate Arrays (FPGAU's) offer substantial benefits in terms of flexibility and design integration. In addition to qualifying this device for space applications by establishing its reliability and evaluating its sensitivity to radiation, screening the programmed devices with Automatic Test Equipment (ATE) and functional burn-in presents an interesting challenge. This paper presents a review of the design, qualification, and screening cycle employed for FPGA designs in a space program, and demonstrates the need for close interaction between design and test engineers.
In the investigation discussed in this paper, the response of FEA cathodes and FEA material candidates to simulated electric propulsion system environments are presented.
These are slides for a presentation at Stanford University. The outline is as follows: Motivation: customers for compact accelerators, LANL's technologies for laser acceleration, DFEA cathodes, and additive manufacturing of micron-size structures. Among the stated conclusions are the following: preliminary study identified DFEA cathodes as promising sources for DLAs--high beam current and small emittance; additive manufacturing with Nanoscribe Professional GT can produce structures with the right scale features for a DLA operating at micron wavelengths (fabrication tolerances need to be studied, DLAs require new materials). Future plans include DLA experiment with a beam produced by the DFEA cathode with field emission, demonstration of photoemission from DFEAs, and new structures to print and test.
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Explore the source record for details and available documents.
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We characterize the plasma flows generated during the ablation stage of an over-massed exploding planar wire array, fielded on the COBRA pulsed-power facility (1 MA peak current, 250 ns rise time). The planar wire array is designed to provide a driving magnetic field (80–100 T) and current per wire distribution (about 60 kA), similar to that in a 10 MA cylindrical exploding wire array fielded on the Z machine. Over-massing the arrays enables continuous plasma ablation over the duration of the experiment without implosion. The requirement to over-mass on the Z machine necessitates wires with diameters of 75–100μm, which are thicker than wires usually fielded on wire array experiments. To test ablation with thicker wires, we perform a parametric study by varying the initial wire diameter between 33 and 100 μm. The largest wire diameter (100 μm) array exhibits early closure of the cathode-wire gap, while the gap remains open over the duration of the experiment for wire diameters between 33 and 75 μm. Laser plasma interferometry and time-gated extreme-ultraviolet (XUV) imaging are used to probe the plasma flows ablating from the wires. The plasma flows from the wires converge to generate a pinch, which appears as a fast-moving (V≈100kms−1) column of increased plasma density (n¯e≈2×1018cm−3) and strong XUV emission. Finally, we compare the results with three-dimensional resistive-magnetohydrodynamic (MHD) simulations performed using the code GORGON, the results of which reproduce the dynamics of the experiment reasonably well.
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High voltage potential (Hipot) and module frame continuity tests are important parts of determining the suitability of solar modules for deployment into large arrays for electrical power production. Since field arrays operate at hundreds of volts above (or below) ground potential at some point in the field, it is necessary to assure adequate voltage isolation of the solar cell circuits.
Current field-deployable microphone phased arrays for aeroacoustic flight testing require the placement of hundreds of individual sensors over a large area. Depending on the duration of the test campaign, the microphones may be required to stay deployed at the testing site for weeks or even months. This presents a challenge in regards to tracking the response (i.e., sensitivity) of the individual sensors as a function of time in order to evaluate the health of the array. To address this challenge, two different methods for in-situ tracking of microphone responses are described. The first relies on the use of an aerial sound source attached as a payload on a hovering small Unmanned Aerial System (sUAS) vehicle. The second relies on the use of individually excited ground-based sound sources strategically placed throughout the array pattern. Testing of the two methods was performed in microphone array deployments conducted at Fort A.P. Hill in 2015 and at Edwards Air Force Base in 2016. The results indicate that the drift in individual sensor responses can be tracked reasonably well using both methods. Thus, in-situ response tracking methods are useful as a diagnostic tool for monitoring the health of a phased array during long duration deployments.
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The use of SRAM-based Field Programmable Gate Arrays (FPGAs) is becoming more and more prevalent in space applications. Commercial-grade FPGAs are potentially susceptible to permanently debilitating Single-Event Latchups (SELs). Repair methods based on Evolutionary Algorithms may be applied to FPGA circuits to enable successful fault recovery. This paper presents the experimental results of applying such methods to repair four commonly used circuits (quadrature decoder, 3-by-3-bit multiplier, 3-by-3-bit adder, 440-7 decoder) into which a number of simulated faults have been introduced. The results suggest that evolutionary repair techniques can improve the process of fault recovery when used instead of or as a supplement to Triple Modular Redundancy (TMR), which is currently the predominant method for mitigating FPGA faults.