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At least 55 records · Page 3

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NASA NTRS2011

Initial Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite that launched in November 2010. The memory device being tested is a commercial Ramtron Inc. 512K memory device. The circuit was designed into the satellite avionics and is not used to control the satellite. The test consists of writing and reading data with the ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is sent to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test is one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The initial data from the test is presented. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

MacLeond, Todd C.↗

NASA NTRS2000

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

Wulf, William A.↗

NASA NTRS2009

Nanoscale content-addressable memory

A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value.

Davis, Bryan↗

NASA NTRS2009

Satellite Test of Radiation Impact on Ramtron 512K FRAM

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

MacLeod, Todd C.↗

NASA NTRS1987

Rotary stepping device with memory metal actuator

A rotary stepping device includes a rotatable shaft which is driven by means of a coiled spring clutch which is alternately tightened to grip and rotate the shaft and released to return it to a resting position. An actuator formed of a memory metal is used to pull the spring clutch to tighten it and rotate the shaft. The actuator is activated by heating it above its critical temperature and is returned to an elongated configuration by means of the force of the spring cloth.

Jamieson, Robert S.↗

DOE OSTI2024

Mneme

A simple tool allowing recording the execution of a GPU (CUDA) kernel and replaying that kernel as an independent executable. The tool operates in 3 phases. During compile time the user needs to apply a provided LLVM pass to instrument the code. The pass detects all device global variables and device functions and stores this information with the respective LLVM-IR in the global device memory. The compilation generates a record-able executable. The second phase involves running the application executable with a desired input and using LD_PRELOAD to enable recording. When recording before invoking a device kernel the pre-loaded library stores device memory in persistent storage and associates the memory with the device kernel and an LLVM IR file. At the end of the recorded execution the pre-load library generates a database in the form of a JSON file containing information regarding the LLVM-IR files and the snapshots of device memory. During the third and last phase the user can replay the execution of an kernel as a separate independent executable. Besides executing it the user can modify the LLVM IR file and auto-tune parameters such as kernel launch-bounds or kernel runtime execution parameters (e.g. Kernel Block and Grid Dimensions). Is

Parasyris, Konstantinos↗

NASA NTRS2010

Systems, methods, and products for graphically illustrating and controlling a droplet actuator

Systems for controlling a droplet microactuator are provided. According to one embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, and a display device displaying a user interface electronically coupled to the controller, wherein the system is programmed and configured to permit a user to effect a droplet manipulation by interacting with the user interface. According to another embodiment, a system is provided and includes a processor, a display device electronically coupled to the processor, and software loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller and programmed to display an interactive map of a droplet microactuator. According to yet another embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, a display device displaying a user interface electronically coupled to the controller, and software for executing a protocol loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller.

Paik, Philip Y.↗

NASA NTRS2007

Ion-Conducting Organic/Inorganic Polymers

Ion-conducting polymers that are hybrids of organic and inorganic moieties and that are suitable for forming into solid-electrolyte membranes have been invented in an effort to improve upon the polymeric materials that have been used previously for such membranes. Examples of the prior materials include perfluorosulfonic acid-based formulations, polybenzimidazoles, sulfonated polyetherketone, sulfonated naphthalenic polyimides, and polyethylene oxide (PEO)-based formulations. Relative to the prior materials, the polymers of the present invention offer greater dimensional stability, greater ease of formation into mechanically resilient films, and acceptably high ionic conductivities over wider temperature ranges. Devices in which films made of these ion-conducting organic/inorganic polymers could be used include fuel cells, lithium batteries, chemical sensors, electrochemical capacitors, electrochromic windows and display devices, and analog memory devices. The synthesis of a polymer of this type (see Figure 1) starts with a reaction between an epoxide-functionalized alkoxysilane and a diamine. The product of this reaction is polymerized by hydrolysis and condensation of the alkoxysilane group, producing a molecular network that contains both organic and inorganic (silica) links. The silica in the network contributes to the ionic conductivity and to the desired thermal and mechanical properties. Examples of other diamines that have been used in the reaction sequence of Figure 1 are shown in Figure 2. One can use any of these diamines or any combination of them in proportions chosen to impart desired properties to the finished product. Alternatively or in addition, one could similarly vary the functionality of the alkoxysilane to obtain desired properties. The variety of available alkoxysilanes and diamines thus affords flexibility to optimize the organic/inorganic polymer for a given application.

Kinder, James D.↗

NASA NTRS1992

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗

NASA NTRS1994

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗

NASA NTRS1991

Ferroelectric Memory Capacitors For Neural Networks

Thin-film ferroelectric capacitors proposed as nonvolatile analog memory devices. Intended primarily for use as synaptic connections in electronic neural networks. Connection strengths (synaptic weights) stored as nonlinear remanent polarizations of ferroelectric films. Ferroelectric memory and interrogation capacitors combined into memory devices in vertical or lateral configurations. Photoconductive layer modulated by light provides variable resistance to alter bias signal applied to memory capacitor. Features include nondestructive readout, simplicity, and resistance to ionizing radiation. Interrogated without destroying stored analog data. Also amenable to very-large-scale integration. Allows use of ac coupling, eliminating errors caused by dc offsets in amplifier circuits of neural networks.

Thakoor, Sarita↗

NASA NTRS1986

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗

NASA NTRS2012

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

MacLeod, Todd↗

DOE OSTI2025

Autonomous Multistate Nanoencoding Using Combinatorial Ferroelectric Closure Domains in BiFeO 3

Recent advances in ferroic materials have identified topological defects as promising candidates for enabling additional functionalities in future electronic systems. The generation of stable and customizable polar topologies is needed to achieve multistates that enable beyond-binary device architectures. Here, in this study, we show how to autonomously pattern on-demand highly tunable striped closure domains in pristine rhombohedral-phase BiFeO 3 thin films through precise scanning of a biased atomic force microscopy tip along carefully designed paths. By employing this strategy, we generate and manipulate closed-loop structures with high spatial resolution in an automated manner, allowing the creation of highly tunable and intricate topological domain structures that exhibit distinct polarization configurations without the need for electrode deposition or complex heterostructure growth. As a proof-of-concept for ferroelectric beyond-binary memory devices, we use such topological domains as multistates, engineering an alphabet and automating the symbolic writing/reading process using autonomous microscopy. The resulting information density is compared with that of current commercially available memory devices, demonstrating the potential of ferroelectric topological domains for multistate information storage applications.

BiFeO3↗

DOE OSTI2025

A new era of ferroelectric thin films for nonvolatile memories

Ferroelectric films have potential applications in nonvolatile memory devices. In addition to the well-established perovskite-structure oxide ferroelectrics, hafnia- and wurtzite-based ferroelectrics have recently attracted considerable attention because of the improved scalability of the ferroelectric response (down to nanometer thicknesses), their compatibility with silicon fabrication processes, and the availability of deposition methods that realize three-dimensional structures. Furthermore, due to their high compatibility with silicon processes, these are also expected to be used in emerging energy-efficient applications, such as neuromorphic computing and reservoir computing. In this article, we review the fundamentals of hafnia- and wurtzite-based ferroelectrics and their advantages and issues for developing in nonvolatile memory devices. Then, possible emerging applications are discussed.

36 MATERIALS SCIENCE↗

NASA NTRS1987

Rare-earth substitution in (BiYCa)3(FeSiGe)5O12 bubble films

The substitution of Y by Sm, Tb, Gd, and Ho in (BiYCa)3 FeSiGe)5O12 bubble garnet is shown to have large effects on the growth-induced anisotropy (GIA). The presently accepted film composition intended for 6-or 8-micron-period bubble memory devices demands partial substitution of Y by Gd and Ho. However, comparing films grown under the same growth conditions, it is observed that YGdHoBilG films posess less (GIA) than their Gd, Ho-free counterparts. Thus, to satisfy (GIA) requirements, the supercooling during growth must be increased by 20 K to 80 K with undesirable effects on defect densities. A new film composition containing Sm, Tb, and Gd has been formulated to satisfy all known material property specifications for 6- or 8-micron-period memory devices. It can be grown with only 45-50 K supercooling.

Luther, L. C.↗

DOE OSTI2025

Field-free switching of perpendicular magnetization in a ferrimagnetic insulator with spin reorientation transition

Writing magnetic bits through spin-orbit torque (SOT) switching is promising for fast and efficient magnetic random-access memory devices. While SOT switching of out-of-plane (OOP) magnetized states requires lateral symmetry breaking, in-plane (IP) magnetized states suffer from low storage density. Here, we demonstrate a field-free switching scheme using a 5-nanometer europium iron garnet film grown with a (110) orientation that shows a spin reorientation transition from OOP to IP above room temperature. This scheme combines the benefits of high-density storage in the OOP states at room temperature and the efficient field-free SOT switching in the IP states at elevated temperatures. While conventional switching of OOP bits faces the dilemma that high OOP anisotropy is required to improve bit stability and low OOP anisotropy is required to lower switching current density, this scheme disentangles this interdependence, allowing for low switching currents to be possible without sacrificing the bit stability, offering opportunities for future memory devices.

Science & Technology - Other Topics↗

DOE OSTI2025

Magnetic Switching in Monolayer 2D Diluted Magnetic Semiconductors via Spin‐to‐Spin Conversion

Abstract The integration of 2D van der Waals (vdW) magnets with topological insulators or heavy metals holds great potential for realizing next‐generation spintronic memory devices. However, achieving high‐efficiency spin–orbit torque (SOT) switching of monolayer vdW magnets at room temperature poses a significant challenge, particularly without an external magnetic field. Here, it is shown field‐free, deterministic, and nonvolatile SOT switching of perpendicular magnetization in the monolayer, diluted magnetic semiconductor (DMS), Fe‐doped MoS 2 (Fe:MoS 2 ) at up to 380 K with a current density of ≈7 × 10 4 A cm −2 . The in situ doping of Fe into monolayer MoS 2 via chemical vapor deposition and the geometry‐induced strain in the crystal break the rotational switching symmetry in Fe:MoS 2 , promoting field‐free SOT switching by generating out‐of‐plane spins via spin‐to‐spin conversion. An apparent anomalous Hall effect (AHE) loop shift at a zero in‐plane magnetic field verifies the existence of z spins in Fe:MoS 2 , inducing an antidamping‐like torque that facilitates field‐free SOT switching. This field‐free SOT application using a 2D ferromagnetic monolayer provides a new pathway for developing highly power‐efficient spintronic memory devices.

Chen, Siwei [Department of Mechanical Engineering ↗