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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
DOE OSTI2016

Device fabrication, characterization, and thermal neutron detection response of LiZnP and LiZnAs semiconductor devices

Nowotny-Juza compounds continue to be explored as candidates for solid-state neutron detectors. Such a device would have greater efficiency, in a compact form, than present day gas-filled 3 He and 10 BF 3 detectors. The 6 Li(n,t) 4 He reaction yields a total Q-value of 4.78 MeV, larger than 10 B, an energy easily identified above background radiations. Hence, devices fabricated from semiconductor compounds having either natural Li (nominally 7.5% 6 Li) or enriched 6 Li (usually 95% 6 Li) as constituent atoms may provide a material for compact high efficiency neutron detectors. Starting material was synthesized by preparing equimolar portions of Li, Zn, and As sealed under vacuum (10 -6 Torr) in quartz ampoules lined with boron nitride and subsequently reacted in a compounding furnace [1]. The raw synthesized material indicated the presence high impurity levels (material and electrical property characterizations). A static vacuum sublimation in quartz was performed to help purify the synthesized material [2], [3]. Bulk crystalline samples were grown from the purified material [4], [5]. Samples were cut using a diamond wire saw, and processed into devices. Bulk resistivity was determined from I–V curve measurements, ranging from 10 6 –10 11 Ω cm. Devices were characterized for sensitivity to 5.48 MeV alpha particles, 337 nm laser light, and neutron sensitivity in a thermal neutron diffracted beam at the Kansas State University TRIGA Mark II nuclear reactor. Thermal neutron reaction product charge induction was measured with a LiZnP device, and the reaction product spectral response was observed.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2015

Lorentz factor determination for local electric fields in semiconductor devices utilizing hyper-thin dielectrics

The local electric field (the field that distorts, polarizes, and weakens polar molecular bonds in dielectrics) has been investigated for hyper-thin dielectrics. Hyper-thin dielectrics are currently required for advanced semiconductor devices. In the work presented, it is shown that the common practice of using a Lorentz factor of L = 1/3, to describe the local electric field in a dielectric layer, remains valid for hyper-thin dielectrics. However, at the very edge of device structures, a rise in the macroscopic/Maxwell electric field E{sub diel} occurs and this causes a sharp rise in the effective Lorentz factor L{sub eff}. At capacitor and transistor edges, L{sub eff} is found to increase to a value 2/3 < L{sub eff} < 1. The increase in L{sub eff} results in a local electric field, at device edge, that is 50%–100% greater than in the bulk of the dielectric. This increase in local electric field serves to weaken polar bonds thus making them more susceptible to breakage by standard Boltzmann and/or current-driven processes. This has important time-dependent dielectric breakdown (TDDB) implications for all electronic devices utilizing polar materials, including GaN devices that suffer from device-edge TDDB.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Near-zero-field magnetoresistance measurements: A simple method to track atomic-scale defects involved in metal-oxide-semiconductor device reliability

We demonstrate the ability of a relatively new analytical technique, near-zero-field magnetoresistance (NZFMR), to track atomic-scale phenomena involved in the high-field stressing damage of fully processed Si metal-oxide-semiconductor field-effect transistors. We show that the technique is sensitive to both the Pb0 and Pb1 dangling bond centers and that the presence of both centers can be inferred through NZFMR via hyperfine interactions with the central 29Si atoms of the dangling bonds. The NZFMR results also provide evidence for the redistribution of mobile hydrogen atoms at the Si/SiO2 interface and also a potential change in the average dipolar coupling constant between electrons in neighboring defects. This work shows that NZFMR offers significant analytical power for studying technologically relevant semiconductor device reliability problems and has advantages in experimental simplicity over comparable techniques.

Moxim, Stephen J. (ORCID:0000000309659904)↗
DOE OSTI2015

Theory of Current Transients in Planar Semiconductor Devices: Insights and Applications to Organic Solar Cells

Time-domain current measurements are widely used to characterize semiconductor material properties, such as carrier mobility, doping concentration, carrier lifetime, and the static dielectric constant. It is therefore critical that these measurements be theoretically understood if they are to be successfully applied to assess the properties of materials and devices. In this paper, we derive generalized relations for describing current-density transients in planar semiconductor devices at uniform temperature. By spatially averaging the charge densities inside the semiconductor, we are able to provide a rigorous, straightforward, and experimentally relevant way to interpret these measurements. The formalism details several subtle aspects of current transients, including how the electrode charge relates to applied bias and internal space charge, how the displacement current can alter the apparent free-carrier current, and how to understand the integral of a charge-extraction transient. We also demonstrate how the formalism can be employed to derive the current transients arising from simple physical models, like those used to describe charge extraction by linearly increasing voltage (CELIV) and time-of-flight experiments. In doing so, we find that there is a nonintuitive factor-of-2 reduction in the apparent free-carrier concentration that can be easily missed, for example, in the application of charge-extraction models. Finally, to validate our theory and better understand the different current contributions, we perform a full time-domain drift-diffusion simulation of a CELIV trace and compare the results to our formalism. As expected, our analytic equations match precisely with the numerical solutions to the drift-diffusion, Poisson, and continuity equations. Furthermore, overall, our formalism provides a straightforward and general way to think about how the internal space-charge distribution, the electrode charge, and the externally applied bias translate into a measured current transient in a planar semiconductor device.

36 MATERIALS SCIENCE↗
DOE OSTI2015

Electroluminescence from metal-oxide-semiconductor devices with erbium-doped CeO{sub 2} films on silicon

We report on erbium (Er)-related electroluminescence (EL) in the visible and near-infrared (NIR) from metal-oxide-semiconductor (MOS) devices with Er-doped CeO{sub 2} (CeO{sub 2}:Er) films on silicon. The onset voltage of such EL under either forward or reverse bias is smaller than 10 V. Moreover, the EL quenching can be avoidable for the CeO{sub 2}:Er-based MOS devices. Analysis on the current-voltage characteristic of the device indicates that the electron transportation at the EL-enabling voltages under either forward or reverse bias is dominated by trap-assisted tunneling mechanism. Namely, electrons in n{sup +}-Si/ITO can tunnel into the conduction band of CeO{sub 2} host via defect states at sufficiently high forward/reverse bias voltages. Then, a fraction of such electrons are accelerated by electric field to become hot electrons, which impact-excite the Er{sup 3+} ions, thus leading to characteristic emissions. It is believed that this work has laid the foundation for developing viable silicon-based emitters using CeO{sub 2}:Er films.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2016

Charge collection efficiency degradation induced by MeV ions in semiconductor devices: Model and experiment

This study investigates both theoretically and experimentally the charge collection efficiency (CCE) degradation in silicon diodes induced by energetic ions. Ion Beam Induced Charge (IBIC) measurements carried out on n- and p-type silicon diodes which were previously irradiated with MeV He ions show evidence that the CCE degradation does not only depend on the mass, energy and fluence of the damaging ion, but also depends on the ion probe species and on the polarization state of the device. A general one-dimensional model is derived, which accounts for the ion-induced defect distribution, the ionization profile of the probing ion and the charge induction mechanism. Using the ionizing and non-ionizing energy loss profiles resulting from simulations based on the binary collision approximation and on the electrostatic/transport parameters of the diode under study as input, the model is able to accurately reproduce the experimental CCE degradation curves without introducing any phenomenological additional term or formula. Although limited to low level of damage, the model is quite general, including the displacement damage approach as a special case and can be applied to any semiconductor device. It provides a method to measure the capture coefficients of the radiation induced recombination centres. They can be considered indexes, which can contribute to assessing the relative radiation hardness of semiconductor materials.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2017

Computational and analytical comparison of flux discretizations for the semiconductor device equations beyond Boltzmann statistics

We compare three thermodynamically consistent numerical fluxes known in the literature, appearing in a Voronoï finite volume discretization of the van Roosbroeck system with general charge carrier statistics. Our discussion includes an extension of the Scharfetter–Gummel scheme to non-Boltzmann (e.g. Fermi–Dirac) statistics. It is based on the analytical solution of a two-point boundary value problem obtained by projecting the continuous differential equation onto the interval between neighboring collocation points. Hence, it serves as a reference flux. The exact solution of the boundary value problem can be approximated by computationally cheaper fluxes which modify certain physical quantities. One alternative scheme averages the nonlinear diffusion (caused by the non-Boltzmann nature of the problem), another one modifies the effective density of states. To study the differences between these three schemes, we analyze the Taylor expansions, derive an error estimate, visualize the flux error and show how the schemes perform for a carefully designed p-i-n benchmark simulation. We present strong evidence that the flux discretization based on averaging the nonlinear diffusion has an edge over the scheme based on modifying the effective density of states.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2015

Ultraviolet-visible electroluminescence from metal-oxide-semiconductor devices with CeO{sub 2} films on silicon

We report on ultraviolet-visible (UV-Vis) electroluminescence (EL) from metal-oxide-semiconductor (MOS) devices with the CeO{sub 2} films annealed at low temperatures. At the same injection current, the UV-Vis EL from the MOS device with the 550 °C-annealed CeO{sub 2} film is much stronger than that from the counterpart with the 450 °C-annealed CeO{sub 2} film. This is due to that the 550 °C-annealed CeO{sub 2} film contains more Ce{sup 3+} ions and oxygen vacancies. It is tentatively proposed that the recombination of the electrons in multiple oxygen-vacancy–related energy levels with the holes in Ce 4f{sup 1} energy band pertaining to Ce{sup 3+} ions leads to the UV-Vis EL.

36 MATERIALS SCIENCE↗
DOE OSTI2014

Conductance matrix of multiterminal semiconductor devices with edge channels

A method for determining the conductance matrix of multiterminal semiconductor structures with edge channels is proposed. The method is based on the solution of a system of linear algebraic equations based on Kirchhoff equations, made up of potential differences U{sub ij} measured at stabilized currents I{sub kl}, where i, j, k, l are terminal numbers. The matrix obtained by solving the system of equations completely describes the structure under study, reflecting its configuration and homogeneity. This method can find wide application when using the known Landauer-Buttiker formalism to analyze carrier transport in the quantum Hall effect and quantum spin Hall effect modes. Within the proposed method, the contribution of the contact area resistances R{sub c} to the formation of conductance matrix elements is taken into account. The possibilities of practical application of the results obtained in developing analog cryptographic devices are considered.

36 MATERIALS SCIENCE↗
DOE OSTI2014

Gate-control efficiency and interface state density evaluated from capacitance-frequency-temperature mapping for GaN-based metal-insulator-semiconductor devices

We present an analysis method for GaN-based metal-insulator-semiconductor (MIS) devices by using capacitance-frequency-temperature (C-f-T) mapping to evaluate the gate-control efficiency and the interface state density, both exhibiting correlations with the linear-region intrinsic transconductance. The effectiveness of the method was exemplified by application to AlN/AlGaN/GaN MIS devices to elucidate the properties of AlN-AlGaN interfaces depending on their formation processes. Using the C-f-T mapping, we extract the gate-bias-dependent activation energy with its derivative giving the gate-control efficiency, from which we evaluate the AlN-AlGaN interface state density through the Lehovec equivalent circuit in the DC limit. It is shown that the gate-control efficiency and the interface state density have correlations with the linear-region intrinsic transconductance, all depending on the interface formation processes. In addition, we give characterization of the AlN-AlGaN interfaces by using X-ray photoelectron spectroscopy, in relation with the results of the analysis.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2014

Low-frequency noise in AlN/AlGaN/GaN metal-insulator-semiconductor devices: A comparison with Schottky devices

We have systematically investigated low-frequency noise (LFN) in AlN/AlGaN/GaN metal-insulator-semiconductor (MIS) devices, where the AlN gate insulator layer was sputtering-deposited on the AlGaN surface, in comparison with LFN in AlGaN/GaN Schottky devices. By measuring LFN in ungated two-terminal devices and heterojunction field-effect transistors (HFETs), we extracted LFN characteristics in the intrinsic gated region of the HFETs. Although there is a bias regime of the Schottky-HFETs in which LFN is dominated by the gate leakage current, LFN in the MIS-HFETs is always dominated by only the channel current. Analyzing the channel-current-dominated LFN, we obtained Hooge parameters α for the gated region as a function of the sheet electron concentration n{sub s} under the gate. In a regime of small n{sub s}, both the MIS- and Schottky-HFETs exhibit α∝n{sub s}{sup −1}. On the other hand, in a middle n{sub s} regime of the MIS-HFETs, α decreases rapidly like n{sub s}{sup −ξ} with ξ ∼ 2-3, which is not observed for the Schottky-HFETs. In addition, we observe strong increase in α∝n{sub s}{sup 3} in a large n{sub s} regime for both the MIS- and Schottky-HFETs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2014

Positive bias temperature instability in p-type metal-oxide-semiconductor devices with HfSiON/SiO{sub 2} gate dielectrics

We present a detailed investigation on positive-bias temperature stress (PBTS) induced degradation of nitrided hafnium silicate (HfSiON)/SiO{sub 2} gate stack in n{sup +}-poly crystalline silicon (polySi) gate p-type metal-oxide-semiconductor (pMOS) devices. The measurement results indicate that gate dielectric degradation is a composite effect of electron trapping in as-fabricated as well as newly generated neutral traps, resulting a significant amount of stress-induced leakage current and generation of surface states at the Si/SiO{sub 2} interface. Although, a significant amount of interface states are created during PBTS, the threshold voltage (V{sub T}) instability of the HfSiON based pMOS devices is primarily caused by electron trapping and detrapping. It is also shown that PBTS creates both acceptor- and donor-like interface traps via different depassivation mechanisms of the Si{sub 3} ≡ SiH bonds at the Si/SiO{sub 2} interface in pMOS devices. However, the number of donor-like interface traps ΔN{sub it}{sup D} is significantly greater than that of acceptor-like interface traps ΔN{sup A}{sub it}, resulting the PBTS induced net interface traps as donor-like.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2015

Atomic origin of high-temperature electron trapping in metal-oxide-semiconductor devices

MOSFETs based on wide-band-gap semiconductors are suitable for operation at high temperature, at which additional atomic-scale processes that are benign at lower temperatures can get activated, resulting in device degradation. Recently, significant enhancement of electron trapping was observed under positive bias in SiC MOSFETs at temperatures higher than 150 °C. Here, we report first-principles calculations showing that the enhanced electron trapping is associated with thermally activated capturing of a second electron by an oxygen vacancy in SiO{sub 2} by which the vacancy transforms into a structure that comprises one Si dangling bond and a bond between a five-fold and a four-fold Si atoms. The results suggest a key role of oxygen vacancies and their structural reconfigurations in the reliability of high-temperature MOS devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2020

HPC4Mfg with Samsung: Making semiconductor devices cool through HPC ab initio simulations

For decades, the semiconductor technology has followed the Moore’s law, making newer devices more powerful and energy efficient. Recently, however, it has reached a point where the performance and the energy efficiency of the device do not improve with the shrinking device size. One of the fundamental reasons of this deviation from the past trend is the interconnect resistance, which becomes larger with the shrinking size. The devices size is so small that the quantum mechanical effects can no longer be ignored and the traditional continuum simulation tools such as TCAD become inadequate. In this project, Samsung Semiconductor Inc. and Lawrence Berkeley National Laboratory has collaborated to perform first of kind device-scale ab initio simulations to optimize materials and interconnect morphology to minimize interconnect resistance. We have tested the use of LS3DF method and the PEtot_trans approach on top of the folded spectrum method (FSM) Escan code to calculate the scattering state, and to study various effects influence the interconnect conductivity. We found that, the LS3DF can be used to calculate such metallic system. On the other hand, the use of Escan code to solve the linear equation is not practical due to the slow convergence. We have implemented a Chebyshev filter technique to calculate a few hundred eigen states near the scattering state energy E, then use these eigen states as preconditioner to solve the linear equation. We have used this approach to study the different factors which affect the interconnect conductivity, including the shape, the point defect, the temperature, and the grain boundary.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2019

Electron Emission Spectroscopy of III-N Semiconductor Devices

Gallium nitride (GaN) has proven to be a semiconductor material system that is ideal for the development of lasers and light-emitting diodes (LEDs) with emission wavelengths spanning the visible spectrum. In particular, the prevalence of white LEDs has been made possible by pairing GaN-based optoelectronic devices emitting at 450 nm (blue) with phosphors for down-conversion. The efficiency of these devices, although better than alternatives, is limited at high current densities (efficiency droop), elevated temperatures (thermal droop) and is markedly worse at longer wavelengths. Understanding the physical origins of these efficiency problems can provide a pathway for engineering solutions to these long-standing issues. Despite extensive efforts to improve and understand these limitations, the unambiguous identification of these efficiency loss mechanisms has remained an open topic of research. Most studies of the efficiency loss mechanisms in GaN LEDs rely on an indirect measurement of carrier dynamics by analysis of the emitted light. The inadequacy of these indirect measurements has motivated the development of an electron spectroscopy technique, capable of directly probing several electron transport and recombination mechanisms in GaN-based optoelectronic devices. In 2013, electron emission spectroscopy (EES) was used for the first time to measure high energy electrons generated via Auger recombination in the active region of an LED. This result brought an end to the longstanding controversy over the causes for efficiency droop at high carrier densities. Our analysis of the kinetic energy of vacuum emitted electrons from GaN-based LEDs xiii has unambiguously identified carrier overshoot as the dominant mechanism responsible for thermal droop. Control experiments from p-n diodes show evidence for a previously unknown hot carrier generating process, likely trap-assisted Auger recombination (TAAR) occurring in AlGaN/GaN barrier heterostrucutres. We also discuss the possibility of TAAR occurring in InGaN quantum wells through examination of low-efficiency LEDs grown by molecular beam epitaxy. Finally, we discuss preliminary EES results regarding long wavelength GaN LEDs as well as the first EES measurements from semipolar ($20\bar2\bar1$) GaN LEDs and p-n diodes.

light emitting diodes, solid state lighting↗
DOE OSTI2017

High voltage semiconductor devices and methods of making the devices

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

36 MATERIALS SCIENCE↗
DOE OSTI2018

High voltage semiconductor devices and methods of making the devices

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

36 MATERIALS SCIENCE↗