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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗
NASA NTRS2007

Multiple internal seal right micro-electro-mechanical system vacuum package

A Multiple Internal Seal Ring (MISR) Micro-Electro-Mechanical System (MEMS) vacuum package that hermetically seals MEMS devices using MISR. The method bonds a capping plate having metal seal rings to a base plate having metal seal rings by wafer bonding the capping plate wafer to the base plate wafer. Bulk electrodes may be used to provide conductive paths between the seal rings on the base plate and the capping plate. All seals are made using only metal-to-metal seal rings deposited on the polished surfaces of the base plate and capping plate wafers. However, multiple electrical feed-through metal traces are provided by fabricating via holes through the capping plate for electrical connection from the outside of the package through the via-holes to the inside of the package. Each metal seal ring serves the dual purposes of hermetic sealing and providing the electrical feed-through metal trace.

Hayworth, Ken J.↗
NASA NTRS2008

Multiple internal seal ring micro-electro-mechanical system vacuum packaging method

A Multiple Internal Seal Ring (MISR) Micro-Electro-Mechanical System (MEMS) vacuum packaging method that hermetically seals MEMS devices using MISR. The method bonds a capping plate having metal seal rings to a base plate having metal seal rings by wafer bonding the capping plate wafer to the base plate wafer. Bulk electrodes may be used to provide conductive paths between the seal rings on the base plate and the capping plate. All seals are made using only metal-to-metal seal rings deposited on the polished surfaces of the base plate and capping plate wafers. However, multiple electrical feed-through metal traces are provided by fabricating via holes through the capping plate for electrical connection from the outside of the package through the via-holes to the inside of the package. Each metal seal ring serves the dual purposes of hermetic sealing and providing the electrical feed-through metal trace.

Hayworth, Ken J.↗
NASA NTRS1979

Residential solar-heating system-design package

Design package for modular solar heating system includes performance specifications, design data, installation guidelines, and other information that should be valuable to those interested in system (or similar systems) for projected installation. When installed in insulated "energy saver" home, system can supply large percentage of total energy needs of building.

Source record↗
NASA NTRSDate not supplied

Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications

A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.

High temperature↗
NASA NTRSDate not supplied

Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications

A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.

High temperature↗
NASA NTRS2017

Packaging Technology for SiC High Temperature Electronics

High-temperature environment operable sensors and electronics are required for long-term exploration of Venus and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500 C. A compatible packaging system is essential for long-term testing and application of high temperature electronics and sensors in relevant environments. This talk will discuss a ceramic packaging system developed for high temperature electronics, and related testing results of SiC integrated circuits at 500 C facilitated by this high temperature packaging system, including the most recent progress.

Chen, Liang-Yu↗
NASA NTRS2013

Broad Frequency LTCC Vertical Interconnect Transition for Multichip Modules and System on Package Applications

Various stripline structures and flip chip interconnect designs for high-speed digital communication systems implemented in low temperature co-fired ceramic (LTCC) substrates are studied in this paper. Specifically, two different transition designs from edge launch 2.4 millimeter connectors to stripline transmission lines embedded in LTCC are discussed. After characterizing the DuPont (sup trademark) 9K7 green tape, different designs are proposed to improve signal integrity for high-speed digital data. The full-wave simulations and experimental data validate the presented designs over a broad frequency band from Direct Current to 50 gigahertz and beyond.

Full-tape-thickness feature; LTCC 9K7 interconnect↗
NASA NTRS1979

Prototype solar-heating system design package

Design package for complete residential solar-heating system is given. Includes documents and drawings describing performance design, verification standards, and analysis of system with sufficient information to assemble working system.

Source record↗
NASA NTRS1979

Prototype residential solar-energy system-design package

Compilation includes documents and drawings for complete solar-heating system. It discussed system installed in residential building at Veterns' Administration Hospital in Togus, Maine. System can be adapted to other buildings without changing design.

Source record↗
NASA NTRS1987

Auxiliary propulsion system flight package

Hughes Aircraft Company developed qualified and integrated flight, a flight test Ion Auxiliary Propulsion System (IAPS), on an Air Force technology satellite. The IAPS Flight Package consists of two identical Thruster Subsystems and a Diagnostic Subsystem. Each thruster subsystem (TSS) is comprised of an 8-cm ion Thruster-Gimbal-Beam Shield Unit (TGBSU); Power Electronics Unit; Digital Controller and Interface Unit (DCIU); and Propellant Tank, Valve and Feed Unit (PTVFU) plus the requisite cables. The Diagnostic Subsystem (DSS) includes four types of sensors for measuring the effect of the ion thrusters on the spacecraft and the surrounding plasma. Flight qualifications of IAPS, prior to installation on the spacecraft, consisted of performance, vibration and thermal-vacuum testing at the unit level, and thermal-vacuum testing at the subsystem level. Mutual compatibility between IAPS and the host spacecraft was demonstrated during a series of performance and environmental tests after the IAPS Flight Package was installed on the spacecraft. After a spacecraft acoustic test, performance of the ion thrusters was reverified by removing the TGBSUs for a thorough performance test at Hughes Research Laboratories (HRL). The TGBSUs were then reinstalled on the spacecraft. The IAPS Flight Package is ready for flight testing when Shuttle flights are resumed.

Collett, C. R.↗
NASA NTRS1992

Long Duration Exposure Facility (LDEF) low-temperature heat pipe experiment package power system results

An overview of a self-contained Direct Energy Transfer Power System which was developed to provide power to the Long Duration Exposure Facility (LDEF) Low-Temperature Heat Pipe Experiment Package is presented. The power system operated successfully for the entire mission. Data recorded by the onboard recorder shows that the system operated within design specifications. Other than unanticipated overcharging of the battery, the power system operated as expected for nearly 32,000 low earth orbit cycles, and was still operational when tested after the LDEF recovery. Some physical damage was sustained by the solar array panels due to micrometeoroid hits, but there were not electrical failures.

Tiller, Smith E.↗
NASA NTRS1979

Power Extension Package (PEP) system definition extension, orbital service module systems analysis study. Volume 12: PEP data item descriptions

Contractor information requirements necessary to support the power extension package project of the space shuttle program are specified for the following categories of data: project management; configuration management; systems engineering and test; manufacturing; reliability, quality assurance and safety; logistics; training; and operations.

Source record↗
NASA NTRS1979

Power Extension Package (PEP) system definition extension, orbital service module systems analysis study. Volume 5: PEP environmental specification

This specification establishes the natural and induced environments to which the power extension package may be exposed during ground operations and space operations with the shuttle system. Space induced environments are applicable at the Orbiter attach point interface location. All probable environments are systematically listed according to each ground and mission phase.

Source record↗
NASA NTRS1974

Apollo experience report: A use of network simulation techniques in the design of the Apollo lunar surface experiments package support system

A case study of data-communications network modeling and simulation is presented. The applicability of simulation techniques in early system design phases is demonstrated, and the ease with which model parameters can be changed and comprehensive statistics gathered is shown. The discussion of the model design and application also yields an insight into the design and implementation of the Apollo lunar surface experiments package ground-support system.

Gustafson, R. A.↗