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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2014

Flight Avionics Hardware Roadmap

The Avionics Technology Roadmap takes an 80% approach to technology investment in spacecraft avionics. It delineates a suite of technologies covering foundational, component, and subsystem-levels, which directly support 80% of future NASA space mission needs. The roadmap eschews high cost, limited utility technologies in favor of lower cost, and broadly applicable technologies with high return on investment. The roadmap is also phased to support future NASA mission needs and desires, with a view towards creating an optimized investment portfolio that matures specific, high impact technologies on a schedule that matches optimum insertion points of these technologies into NASA missions. The roadmap looks out over 15+ years and covers some 114 technologies, 58 of which are targeted for TRL6 within 5 years, with 23 additional technologies to be at TRL6 by 2020. Of that number, only a few are recommended for near term investment: 1. Rad Hard High Performance Computing 2. Extreme temperature capable electronics and packaging 3. RFID/SAW-based spacecraft sensors and instruments 4. Lightweight, low power 2D displays suitable for crewed missions 5. Radiation tolerant Graphics Processing Unit to drive crew displays 6. Distributed/reconfigurable, extreme temperature and radiation tolerant, spacecraft sensor controller and sensor modules 7. Spacecraft to spacecraft, long link data communication protocols 8. High performance and extreme temperature capable C&DH subsystem In addition, the roadmap team recommends several other activities that it believes are necessary to advance avionics technology across NASA: center dot Engage the OCT roadmap teams to coordinate avionics technology advances and infusion into these roadmaps and their mission set center dot Charter a team to develop a set of use cases for future avionics capabilities in order to decouple this roadmap from specific missions center dot Partner with the Software Steering Committee to coordinate computing hardware and software technology roadmaps and investment recommendations center dot Continue monitoring foundational technologies upon which future avionics technologies will be dependent, e.g., RHBD and COTS semiconductor technologies

Some, Raphael↗
NASA NTRS1971

The Advanced On-board Processor (AOP)

The goal of the Advanced On-Board Processor (AOP) development program is to design, build, and flight qualify a highly reliable, moderately priced, digital computer for application on a variety of spacecraft. Included in this development program is the preparation of a complete support software package which consists of an assembler, simulator, loader, system diagnostic, operational executive, and many useful subroutines. The AOP hardware/software system is an extension of the On-Board Processor (OBP) which was developed for general purpose use on earth orbiting spacecraft with its initial application being on-board the fourth Orbiting Astronomical Observatory (OAO-C). Although the OBP possesses the significant features that are required for space application, however, when operating at 100% duty cycle the OBP is too power-consuming for use on many smaller spacecraft. Computer volume will be minimized by implementing the processor and input/output portions of the machine with large scale integrated circuits. Power consumption will be reduced through the use of plated wire and, in some cases, semiconductor memory elements.

Hartenstein, R. G.↗
DOE OSTI2022

Power Electronics Materials and Bonded Interfaces - Reliability and Lifetime

Wide-bandgap devices have pushed the operational limit of semiconductor devices in automotive power electronics packages to higher temperatures (>200 C). While a higher efficiency can be achieved through the use of wide-bandgap devices, the entire package must be re-designed with components that can withstand the higher temperature limits. Sintered silver and transient liquid phase bonds are potential candidates as bonded materials for use in higher temperatures however, the underlying mechanics of deformation under thermal loads and the resulting failure mechanisms in these materials are not well understood. Accelerated experiments conducted at NREL reveal that high-lead solder joints have better reliability than sintered silver under extreme thermal cycling conditions. Furthermore, efforts to develop a crack propagation model for the high-temperature materials are described.

ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2023

Power Electronics Thermal Management

The 2017 Electrical and Electronics Technical Team Roadmap [1] proposes aggressive research and development targets aimed at improving power electronics technology to enable the mass-market penetration of electric-drive vehicles. Achieving these aggressive targets will require a decrease in cost (year 2025 cost target: $2.70/kW) and an increase in power density (year 2025 power density target: 100 kW/L) as compared with current on-road technology. Replacing traditional silicon device-based components with more efficient and higher-temperature wide-bandgap (WBG) semiconductor device-based components will enable increased power density. However, meeting the power density target will also require innovative thermal management solutions to increase the heat fluxes dissipated and allow for compact electronics packaging. This project conducts research to develop new power electronics thermal management technologies to increase power density, enable high WBG temperature operation, and decrease cost. The performance (e.g., thermal resistance, pumping power) of the power electronics cooling technologies developed in this project are compared to the performance of current, on-road technology. One of the main challenges to achieving high power densities is associated with packaging high-temperature (up to 250 degrees C) WBG devices near lower-temperature-rated components (e.g., electrical boards and capacitors).

ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2022

High Temperature Optocoupler for 3D High Density Power Modules

The goal of this proposed research is to develop a reliable high-temperature optocouplers, which can operate at 250°C with at least ten-year lifetime, and replace isolation transforms as the galvanic isolation solution for the 3D integration of high density power modules. The electrification of future transportations (i.e., electric vehicles) will continuously drive the demand for high density power modules. Optocouplers (i.e., packaged light emitter and detector) as a promising candidate to replace bulky isolation transformers are highly desirable to facilitate the continuous scale-down of gate driver circuitry that will lead to 3D high density power modules and achieve disruptive performance in terms of thermal management, power density, power efficiency, reliability and operating environments. However, regular semiconductor optoelectronic materials and devices have significant difficulty functioning in the harsh environments designated for high density power module usage (such as operation at high temperatures). Ultimately, it is not the intrinsic properties of power devices that prevent their use at higher temperatures, but rather the low voltage electronics needed to drive them and the packaging that surrounds them. The typical operating temperature for optocouplers is only up to 100°C, due to the limitations of light emitting diode (LED) devices inside and packaging materials. A systematic characterization methodology will be developed to analyze the performance, lifetime and reliability of LED devices and distinguish multiple failure mechanisms at high temperatures. An original methodology of “design for reliability” will be developed to design the optoelectronic devices with high reliability and long lifetime at high temperatures. A new architecture of high temperature high reliable optocouplers will be developed, fabricated and demonstrated with continuous operating at 250°C. The development of efficient, reliable high density 3D power modules is the foundation for energy efficiency and energy reliability. Enabled with advanced 3D integration and packaging technologies, high density power module solutions can achieve much more superior performance over the conventional discrete solutions in terms of efficiency, thermal management and power density. The proposed concept of high temperature optocouplers as the galvanic isolation solution for high density power modules will bring together interdisciplinary research involving the wide bandgap materials, optoelectronics, high reliable device design, electronics packaging and power modules. A streamline of skilled personnel would be trained including graduate and undergraduate students, local engineers and scientists which are in great demand to both academia and optoelectronics industry. The proposed research topics, such as, solid state lighting and high temperature device reliability, are currently of major interest at the Department of Energy, in particular, Sandia National Laboratories. This project can enhance collaborations between the University of Arkansas (UA) and Sandia National Laboratories. The findings of the proposed research are expected to be integrated into high density 3-D power modules at the Engineering Research Center for Power Optimization for Electro-Thermal Systems (POETS).

42 ENGINEERING↗
NASA NTRS1997

Analysis of Technology for Solid State Coherent Lidar

Over the past few years, considerable advances have been made in the areas of the diode-pumped, eye-safe, solid state lasers, wide bandwidth, semiconductor detectors operating in the near-infrared region. These advances have created new possibilities for the development of low-cost, reliable, and compact coherent lidar systems for measurements of atmospheric winds and aerosol backscattering from a space-based platform. The work performed by the UAH personnel concentrated on design and analyses of solid state pulsed coherent lidar systems capable of measuring atmospheric winds from space, and design and perform laboratory experiments and measurements in support of solid state laser radar remote sensing systems which are to be designed, deployed, and used by NASA to measure atmospheric processes and constituents. A lidar testbed system was designed and analyzed by considering the major space operational and environmental requirements, and its associated physical constraints. The lidar optical system includes a wedge scanner and the compact telescope designed by the UAH personnel. The other major optical components included in the design and analyses were: polarizing beam splitter, routing mirrors, wave plates, signal beam derotator, and lag angle compensator. The testbed lidar optical train was designed and analyzed, and different design options for mounting and packaging the lidar subsystems and components and support structure were investigated. All the optical components are to be mounted in a stress-free and stable manner to allow easy integration and alignment, and long term stability. This lidar system is also intended to be used for evaluating the performance of various lidar subsystems and components that are to be integrated into a flight unit and for demonstrating the integrity of the signal processing algorithms by performing actual atmospheric measurements from a ground station.

Amzajerdian, Farzin↗
NASA NTRS2018

Challenges and Opportunities in Gen3 Embedded Cooling with High-Quality Microgap Flow

Gen3, Embedded Cooling, promises to revolutionize thermal management of advanced microelectronic systems by eliminating the sequential conductive and interfacial thermal resistances which dominate the present 'remote cooling' paradigm. Single-phase interchip microfluidic flow with high thermal conductivity chips and substrates has been used successfully to cool single transistors dissipating more than 40kW/sq cm, but efficient heat removal from transistor arrays, larger chips, and chip stacks operating at these prodigious heat fluxes would require the use of high vapor fraction (quality), two-phase cooling in intra- and inter-chip microgap channels. The motivation, as well as the challenges and opportunities associated with evaporative embedded cooling in realistic form factors, is the focus of this paper. The paper will begin with a brief review of the history of thermal packaging, reflecting the 70-year 'inward migration' of cooling technology from the computer-room, to the rack, and then to the single chip and multichip module with 'remote' or attached air- and liquid-cooled coldplates. Discussion of the limitations of this approach and recent results from single-phase embedded cooling will follow. This will set the stage for discussion of the development challenges associated with application of this Gen3 thermal management paradigm to commercial semiconductor hardware, including dealing with the effects of channel length, orientation, and manifold-driven centrifugal acceleration on the governing behavior.

microchannel↗
NASA NTRS2012

Low SWaP Semiconductor Laser Transmitter Modules For ASCENDS Mission Applications

The National Research Council's (NRC) Decadal Survey (DS) of Earth Science and Applications from Space has identified the Active Sensing of CO2 Emissions over Nights, Days, and Seasons (ASCENDS) as an important atmospheric science mission. NASA Langley Research Center, working with its partners, is developing fiber laser architecture based intensity modulated CW laser absorption spectrometer for measuring XCO2 in the 1571 nm spectral band. In support of this measurement, remote sensing of O2 in the 1260 nm spectral band for surface pressure measurements is also being developed. In this paper, we will present recent progress made in the development of advanced transmitter modules for CO2 and O2 sensing. Advanced DFB seed laser modules incorporating low-noise variable laser bias current supply and low-noise variable temperature control circuit have been developed. The 1571 nm modules operate at >80 mW and could be tuned continuously over the wavelength range of 1569-1574nm at a rate of 2 pm/mV. Fine tuning was demonstrated by adjusting the laser drive at a rate of 0.7 pm/mV. Heterodyne linewidth measurements have been performed showing linewidth ~200 kHz and frequency jitter ~75 MHz. In the case of 1260 nm DFB laser modules, we have shown continuous tuning over a range of 1261.4 - 1262.6 nm by changing chip operating temperature and 1261.0 - 1262.0 nm by changing the laser diode drive level. In addition, we have created a new laser package configuration which has been shown to improve the TEC coefficient of performance by a factor of 5 and improved the overall efficiency of the laser module by a factor of 2.

Prasad, Narasimha S.↗
DOE OSTI2021

Packaging of an 8-kV Silicon Carbide Diode Module with Double-Side Cooling and Sintered-Silver Joints

Packaging innovations are needed for medium-voltage wide bandgap power semiconductor modules to enable their adaptation in grid applications. A unique challenge for packaging medium-voltage power modules is managing the trade-off between insulation demand and heat dissipation. The focus of this work was on developing a packaging innovation that improves the module heat dissipation and offers more flexibility to its insulation design. Two strategies were explored for the packaging of an 8-kV SiC diode rectifier module:(1) double-side cooling and (2) sintered-silver bonding. Double-side cooling was realized by using short metal posts rather than long and thin wire bonds for device interconnection, forming a low-profile package with devices sandwiched between two insulated metal substrates. Sintered-silver bonding enabled the devices to function reliably at over 250 °C. Simulations of the packaged module showed a low interconnect inductance of 2.67 nH and a 50% less heat transfer coefficient required to cool the chips. Prototypes of the module were fabricated, and preliminary electrical testing results validated the package design.

27 ARPA - Advanced Research Projects Agency-Energy↗
NASA NTRS1999

The Biolink Implantable Telemetry System

Most biotelemetry applications deal with the moderated data rates of biological signals. Few people have studied the problem of transcutaneous data transmission at the rates required by NASA's Life Sciences-Advanced BioTelemetry System (LS-ABTS). Implanted telemetry eliminate the problems associated with wire breaking the skin, and permits experiments with awake and unrestrained subjects. Our goal is to build a low-power 174-216MHz Radio Frequency (RF) transmitter suitable for short range biosensor and implantable use. The BioLink Implantable Telemetry System (BITS) is composed of three major units: an Analog Data Module (ADM), a Telemetry Transmitter Module (TTM), and a Command Receiver Module (CRM). BioLink incorporates novel low-power techniques to implement a monolithic digital RF transmitter operating at 100kbps, using quadrature phase shift keying (QPSK) modulation in the 174-216MHz ISM band. As the ADM will be specific for each application, we focused on solving the problems associated with a monolithic implementation of the TTM and CRM, and this is the emphasis of this report. A system architecture based on a Frequency-Locked Loop (FLL) Frequency Synthesizer is presented, and a novel differential frequency that eliminates the need for a frequency divider is also shown. A self sizing phase modulation scheme suitable for low power implementation was also developed. A full system-level simulation of the FLL was performed and loop filter parameters were determined. The implantable antenna has been designed, simulated and constructed. An implant package compatible with the ABTS requirements is also being proposed. Extensive work performed at 200MHz in 0.5um complementary metal oxide semiconductors (CMOS) showed the feasibility of integrating the RF transmitter circuits in a single chip. The Hajimiri phase noise model was used to optimize the Voltage Controlled Oscillator (VCO) for minimum power consumption. Two test chips were fabricated in a 0.5pm, 3V CMOS process. Measured phase noise for a 1.5mW, 200MHz ring oscillator VCO is -80dBc/Hz at 100KHZ offset, showing good agreement with the theory. We also propose a novel superregenerative receiver architecture for implementing the command receiver. The superregenerative receiver's simplicity, low cost, and low power consumption has made it the receiver of choice for short-distance data communications, remote control and home automation. We present the design of a superregenerative AM receiver implemented in a 0.5um CMOS technology that operates at 433.92MHz and dissipates only 300uW. Further work entails detailed transistor-level design of the FLL and superregenerative receiver and a monolithic implementation of an implantable transceiver in 0.5um CMOS technology.

Betancourt-Zamora, Rafael J.↗
NASA NTRS1997

A Novel Silicon Micromachined Integrated MCM Thermal Management System

"Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high heat flux applications, respectively. The high heat load application of particular interest in mind is the motor controller developed by Martin Marietta for Nasa to control the thruster's directional actuators on space vechicles. Work is also proposed to develop highly advanced and improved porous wick structures for use in advanced heat loops. The porous wick will be micromachined from silicon using MEMS technology, thus permitting far superior control of pore size and pore distribution (over wicks made from sintered n-ietals), which in turn is expected to led to significantly improved heat loop performance.

Kazmierczak, M. J.↗
DOE OSTI2020

Highly Integrated WBG Power Module for Next Generation Plug-In Vehicles

Current inverter technologies used in electric vehicles (EVs) are bulky, heavy, and expensive. The performance of the inverter is also limited by the traditional Si-based semiconductor and packaging technology. These constraints are responsible for extra weight and volume in the vehicle that reduces the driving range along with usable space within the vehicle. Moreover, operating temperature restrictions, and boundaries on the inverter location within the vehicle drastically reduces the inverter performance. Thus an improved inverter design is required for next generation electric vehicles. The objective of this project was to research, develop and demonstrate a highly integrated WBG power module targeting the next generation of plugin hybrid electric vehicles (PHEVs). This power module needed to be functionally and mechanically optimized for General Motors (GM) traction inverter architecture. General Motors was the prime contractor, led the project, and oversaw the design, build, and test of the integrated power module. Virginia Polytechnic Institute and State University (VT) performed modeling and simulation tasks as well as power module design support. Monolith Semiconductor, Inc provided SiC dies and consulted on devices for the inverter. Oak Ridge National Laboratory (ORNL) performed power module technology evaluations, design evaluations of interconnect options, and performed material analysis and cross-sectioning of die activities.

33 ADVANCED PROPULSION SYSTEMS↗
NASA NTRS2005

A Ka-Band Wide-Bandgap Solid-State Power Amplifier: Architecture Performance Estimates

Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solidstate power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents the results of a study to investigate power-combining technology and SSPA architectures that can enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results of the study indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. The proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This corresponds to MMIC requirements of 5- to 10-W output power and >48 percent PAE. For the three proposed architectures [1], detailed analysis and design of the power combiner are presented. The first architecture studied is based on a 16-way septum combiner that offers low loss and high isolation over the design band of 31 to 36 GHz. Analysis of a 2-way prototype septum combiner had an input match >25 dB, output match >30 dB, insertion loss <0.02 dB, and isolation >30 dB over the design band. A 16-way design, based on cascading this combiner in a binary fashion, is documented. The second architecture is based on a 24-way waveguide radial combiner. A prototype 24-way radial base was analyzed to have an input match >30 dB (under equal excitation of all input ports). The match of the mode transducer that forms the output of a radial combiner was found to be >27 dB. The functional bandwidth of the radial base and mode transducer, which together will form a radial combiner/divider, exceeded the design band. The third architecture employs a 32-way, parallel-plate radial combiner. Simulation results indicated an input match >24 dB, output match >22 dB, insertion loss <0.23 dB, and adjacent port isolation >20 dB over the design band. All three architectures utilize a low-loss MMIC amplifier module based on commercial MMIC packaging and a custom microstrip-to-rectangular-waveguide transition. The insertion loss of the module is expected to be 0.45 dB over the design band.

Epp, L.↗
NASA NTRS2007

SiC Multi-Chip Power Modules as Power-System Building Blocks

The term "SiC MCPMs" (wherein "MCPM" signifies "multi-chip power module") denotes electronic power-supply modules containing multiple silicon carbide power devices and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking. Moreover, the higher-temperature capabilities of SiC MCPMs could enable operation in environments hotter than Si-based power systems can withstand. The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules. In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications: typical functions could include regulating voltages, storing energy, and driving motors. Because identical SiC MCPM building blocks could be utilized in a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. Several prototype DC-to-DC power-converter modules containing SiC power-switching devices were designed and built to demonstrate the feasibility of the SiC MCPM concept. In anticipation of a future need for operation at high temperature, the circuitry in the modules includes high-temperature inductors and capacitors. These modules were designed to be stacked to construct a system of four modules electrically connected in series and/or parallel. The packaging of the modules is designed to satisfy requirements for series and parallel interconnection among modules, high power density, high thermal efficiency, small size, and light weight. Each module includes four output power connectors two for serial and two for parallel output power connections among the modules. Each module also includes two signal connectors, electrically isolated from the power connectors, that afford four zones for signal interconnections among the SOI controllers. Finally, each module includes two input power connectors, through which it receives power from an in-line power bus. This design feature is included in anticipation of a custom-designed power bus incorporating sockets compatible with snap-on type connectors to enable rapid replacement of failed modules.

Lostetter, Alexander↗
NASA NTRS2008

Update on Development of SiC Multi-Chip Power Modules

Progress has been made in a continuing effort to develop multi-chip power modules (SiC MCPMs). This effort at an earlier stage was reported in 'SiC Multi-Chip Power Modules as Power-System Building Blocks' (LEW-18008-1), NASA Tech Briefs, Vol. 31, No. 2 (February 2007), page 28. The following recapitulation of information from the cited prior article is prerequisite to a meaningful summary of the progress made since then: 1) SiC MCPMs are, more specifically, electronic power-supply modules containing multiple silicon carbide power integrated-circuit chips and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking; 2) The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules; and, 3) In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications. Because identical SiC MCPM building blocks could be utilized in such a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. This concludes the information from the cited prior article. The main activity since the previously reported stage of development was the design, fabrication, and testing a 120- VDC-to-28-VDC modular power-converter system composed of eight SiC MCPMs in a 4 (parallel)-by-2 (series) matrix configuration, with normally-off controllable power switches. The SiC MCPM power modules include closed-loop control subsystems and are capable of operating at high power density or high temperature. The system was tested under various configurations, load conditions, load-transient conditions, and failure-recovery conditions. Planned future work includes refinement of the demonstrated modular system concept and development of a new converter hardware topology that would enable sharing of currents without the need for communication among modules. Toward these ends, it is also planned to develop a new converter control algorithm that would provide for improved sharing of current and power under all conditions, and to implement advanced packaging concepts that would enable operation at higher power density.

Lostetter, Alexander↗