Accelerating Codesign in Emerging Computing
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Prevailing mainstream ocean wave energy converter (WEC) archetypes are often relatively large monolithic rigid bodies with singular means of power take-off (e.g., relative motion between rigid bodies) and solo prime mover mechanisms (e.g. a rotary generator, a hydraulic piston). These mainstream WEC archetypes have existed for decades with some having histories spanning more than a century of significant investments and interests. As an alternative to the domain of mainstream WEC archetypes is the domain of distributed embedded energy converter technologies (also known as DEEC-Tec). Use of DEEC-Tec to create WECs - often called flexWECs - is a nascent domain of research and development that centers itself upon the interconnection of many relatively small energy converters - very small energy transducers - that interconnect and combine to create a much larger, overall, energy converting structure. The DEEC-Tec domain enables promising possibilities such as: direct in situ ocean wave energy harvesting and conversion throughout the volume of an entire flexWEC; inherent broad-banded ocean wave energy capture and conversion arising from near semi-continuous structural degrees of freedom; an innate absence of focusing and concentrating of ocean wave energy into a single prime mover and/or transmission system; and built-in implicit redundancy. As such, the DEEC-Tec domain could revolutionize how we conceptualize ocean wave energy conversion - both in terms of ocean wave energy converter design and what we view as viable environments and circumstances for ocean wave energy conversion. The research and development opportunities for the DEEC-Tec domain, therefore, are vast compared to the prevailing mainstream ocean wave energy converter domain. Correspondingly, there are ample opportunities to invest time and money into the DEEC-Tec domain with an aim to enable a paradigm shift in how ocean waves can be utilized as a more viable form of renewable energy. To that end, two seedling efforts have been enacted providing a very cursory investigation into the DEEC-Tec domain: (1) a preliminary simple fabrication/prototyping effort and (2) a preliminary co-design effort. The prototype seedling centers upon the design of a fabrication and evaluation rig for individual DEEC-Tec transducers; e.g., dielectric elastomer generators. The co-design seedling centers upon the analysis of those methods suitable for DEEC-Tec, ocean wave energy conversion, and fluid-structure interaction co-design efforts.
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Recently, the U.S. Department of Energy (DOE), Office of Science, Biological and Environmental Research (BER), and Advanced Scientific Computing Research (ASCR) programs organized and held the Artificial Intelligence for Earth System Predictability (AI4ESP) workshop series. From this workshop, a critical conclusion that the DOE BER and ASCR community came to is the requirement to develop a new paradigm for Earth system predictability focused on enabling artificial intelligence (AI) across the field, laboratory, modeling, and analysis activities, called model experimentation (ModEx). BER’s ModEx is an iterative approach that enables process models to generate hypotheses. The developed hypotheses inform field and laboratory efforts to collect measurement and observation data, which are subsequently used to parameterize, drive, and test model (e.g., process based) predictions. A total of 17 technical sessions were held in this AI4ESP workshop series. This paper discusses the topic of the AI Architectures and Codesign session and associated outcomes. The AI Architectures and Codesign session included two invited talks, two plenary discussion panels, and three breakout rooms that covered specific topics, including 1) DOE high-performance computing (HPC) systems, 2) cloud HPC systems, and 3) edge computing and Internet of Things (IoT). We also provide forward-looking ideas and perspectives on potential research in this codesign area that can be achieved by synergies with the other 16 session topics. These ideas include topics such as 1) reimagining codesign, 2) data acquisition to distribution, 3) heterogeneous HPC solutions for integration of AI/ML and other data analytics like uncertainty quantification with Earth system modeling and simulation, and 4) AI-enabled sensor integration into Earth system measurements and observations. Such perspectives are a distinguishing aspect of this paper.
As Moore’s Law and Dennard Scaling come to an end, it is becoming increasingly important to develop non-von Neumann computing architectures that can perform low-power computing in the domains of scientific computing, artificial intelligence, embedded systems, and edge computing. Next-generation computing technologies, such as neuromorphic computing and quantum computing, have the potential to revolutionize computing. However, in order to make progress in these fields, it is necessary to fundamentally change the current computing paradigm by codesigning systems across all system level, from materials to software. Because skilled labor is limited in the field of next-generation computing, we are developing artificial intelligence-enhanced tools to automate the codesign and co-discovery of next-generation computers. Here, we develop a method called Modular and Multi-level MAchine Learning (MAMMAL) which is able to perform analog codesign and co-discovery across multiple system levels, spanning devices to circuits. We prototype MAMMAL by using it to design simple passive analog low-pass filters. We also explore methods to incorporate uncertainty quantification into MAMMAL and to accelerate MAMMAL by using emerging technologies, such as crossbar arrays. Ultimately, we believe that MAMMAL will enable rapid progress in developing next-generation computers by automating the codesign and co-discovery of electronic systems.
Science applications preparing for the exascale era are increasingly exploring in situ computations comprising of simulation-analysis-reduction pipelines coupled in-memory. Efficient composition and execution of such complex pipelines for a target platform is a codesign process that evaluates the impact and tradeoffs of various application- and system-specific parameters. In this article, we describe a toolset for automating performance studies of composed HPC applications that perform online data reduction and analysis. We describe Cheetah, a new framework for composing parametric studies on coupled applications, and Savanna, a runtime engine for orchestrating and executing campaigns of codesign experiments. Furthermore, this toolset facilitates understanding the impact of various factors such as process placement, synchronicity of algorithms, and storage versus compute requirements for online analysis of large data. Ultimately, we aim to create a catalog of performance results that can help scientists understand tradeoffs when designing next-generation simulations that make use of online processing techniques. We illustrate the design of Cheetah and Savanna, and present application examples that use this framework to conduct codesign studies on small clusters as well as leadership class supercomputers.
This paper presents the formulation and results for a control-aware optimization of the combined geometric and structural design of an energy-harvesting underwater kite. Because kite-based energy-harvesting systems, both airborne and underwater, possess strong coupling between closed-loop flight control, geometric design, and structural design, consideration of all three facets of the design within a single codesign framework is highly desirable. However, while prior literature has addressed one or two attributes of the design at a time, this work constitutes the first comprehensive effort aimed at addressing all three. In particular, focusing on the goals of power maximization and mass minimization, we present a codesign formulation that fuses a geometric optimization tool, structural optimization tool, and closed-loop flight efficiency map. The resulting integrated codesign tool is used to address two mathematical optimization formulations that exhibit subtle differences: a Pareto optimal formulation and a dual-objective formulation that focuses on a weighted power-to-mass ratio as the techno-economic metric of merit. Further, based on the resulting geometric and structural designs, using a mediumfidelity closed-loop simulation tool, the proposed formulation is shown to achieve more than three times the powerto-mass ratio of a previously published, unoptimized benchmark design.
The advantage of a membrane/catalyst system in oxidative coupling of methane (OCM) compared to conventional reactive systems is that by introducing oxygen to the OCM catalytic sites through a membrane, parasitic gas phase reactions of O 2 (g), responsible for lowering product selectivity, can be avoided. The design and fabrication of membrane/catalyst systems has, however, been hampered by low volumetric chemical conversion rates, high capital cost, and difficulties in codesigning membrane and catalyst properties to optimize the performance. We solve these issues by developing a dual-layer additive manufacturing process, based on phase inversion, to design, fabricate and optimize a hollow fiber membrane/catalyst system for OCM. We demonstrate the approach though a case study using BaCe 0.8 Gd 0.2 O 3-δ (BCG) as the basis of both the catalyst and separation layers. We show that by using the manufacturing approach we can codesign the membrane thickness and catalyst surface area so that the flux of oxygen transport through the membrane and methane activation rates in the catalyst layer match each other. Here, we demonstrate that this “rate matching” is critical for maximizing the performance, with the membrane/catalyst system significantly overperforming conventional reactor designs under identical conditions.
Here this paper presents the hardware, software, and power codesign of an ultra-efficient data storage server with differential power processing (DPP). DPP can reduce the power conversion stress, improve the efficiency, and enhance the functionality of modular power electronics systems. The power inputs of a large number of hard disk drives (HDDs) were connected in series and supported by a multiport ac-coupled differential power processing (MAC-DPP) converter through a multiwinding transformer. Methods for controlling the multi-input multi-output power flow in the multiwinding transformer while avoiding core saturation were investigated. A ten-port MAC-DPP prototype with 700-W/in 3 power density was built to support a 450-W HDD storage system with ten series-stacked voltage domains. The prototype was tested on a 50-HDD server testbench, and the overall system loss is below 1 W (99.77% system efficiency). The server was able to maintain high-speed reading and writing operation of all 50 HDDs against the worst hot-swapping scenarios. A variety of hardware/software configurations and many cloud storage techniques were tested on the fully functioning server. Experimental results show that the energy efficiency of large-scale information systems (CPU/GPU clusters, memory banks, HDD arrays, etc.) can be greatly improved by software, hardware, and power codesign.
Deep neural networks use skip connections to improve training convergence. However, these skip connections are costly in hardware, requiring extra buffers and increasing on- and off-chip memory utilization and bandwidth requirements. In this article, we show that skip connections can be optimized for hardware when tackled with a hardware-software codesign approach. We argue that while a network’s skip connections are needed for the network to learn, they can later be removed or shortened to provide a more hardware-efficient implementation with minimal to no accuracy loss. We introduceTailor, a codesign tool whose hardware-aware training algorithm gradually removes or shortens a fully trained network’s skip connections to lower the hardware cost.Tailorimproves resource utilization by up to 34% for block random access memories (BRAMs), 13% for flip-flops (FFs), and 16% for look-up tables (LUTs) for on-chip, dataflow-style architectures.Tailorincreases performance by 30% and reduces memory bandwidth by 45% for a two-dimensional processing element array architecture.