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Results for “fault-tolerant design”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Peer-to-Peer Communication Trade-Offs for Smart Grid Applications: Preprint

Peer-to-peer energy management systems for smart grids require developers to consider the trade-offs between the amount of communication traffic generated and the quality and speed of convergence of the control algorithms that are deployed. Employing a fully connected communication causes messages to scale exponentially with the number of nodes, while using a sparse connectivity causes less information dissemination leading to degradation of the algorithm performance. The best communication topology for a particular application lies somewhere in between and often requires empirical evaluation by application designers. Existing methods do not put focus on the needs for smart grid applications, which is information dissemination throughout the network and they do not provide a flexible solution for application developers to prototype and deploy different topologies without modifying the application code. This paper introduces a configurable virtual communication topology framework TopLinkMgr, allowing users to specify any chosen communication topology and deploy peer-to-peer applications using it. It also introduces a self-adaptive, fault-tolerant topology management algorithm, Bounded Path Dissemination that can ensure the dissemination of information to all peers within a specified threshold for a sparsely connected topology. Experiments show that the algorithm improves on convergence speed and accuracy over state-of-the-art methods and is also robust against node failures. The results indicate the possibility of achieving a close-to optimal convergence without overloading the network allowing the realization of peer-to-peer control platforms covering larger and more complex power systems.

Bounded Path Dissemination↗
DOE OSTI2020

LandRAY Final Report

The overarching Project objective is to demonstrate the feasibility of using an innovative Power Take-Off (PTO) Module, to be used in the Columbia Power Technologies, Inc. (C·Power) utility-scale wave energy converter (WEC). The PTO Module uniquely combines a large-diameter, direct-drive, rotary permanent magnet generator; a patent-pending rail-bearing system; and a corrosion-resistant fiber-reinforced-plastic structure. The rail bearing system allows for: • A flexible non-rigid and low-cost generator frame as compared to conventional machines. • A reduction of air gap and consequently lower cost electromagnetic design • Ability to reduce costs by increasing diameter to much larger dimensions, while maintaining the small air gap. • A direct drive electro-mechanical solution that is the fastest and most precise approach for responding to the dynamic variability of forces from wave energy. The land-based test of the PTO Module (DDP1) will provide an important risk reduction phase, to demonstrate the reliability and feasibility of a large-diameter, small air-gap generator that is capable of delivering high efficiency, fault-tolerance and relatively simple "at-sea" maintenance capabilities – qualities that are essential for cost-effective wave energy devices. This is the first known test of such a system.

16 TIDAL AND WAVE POWER↗
DOE OSTI2023

HetArch: Heterogeneous Microarchitectures for Superconducting Quantum Systems

Noisy Intermediate-Scale Quantum Computing (NISQ) has dominated headlines in recent years, with the longer-term vision of Fault-Tolerant Quantum Computation (FTQC) offering significant potential but at currently intractable resource costs and quantum error correction (QEC) overheads. For problems of interest, FTQC will require millions of physical qubits with long coherence times, high-fidelity gates, and compact sizes to surpass classical systems. Just as heterogeneous specialization has offered scaling benefits in classical computing, it is likewise gaining interest in FTQC. However, systematic use of heterogeneity in either hardware or software elements of FTQC systems remains a serious challenge due to the vast design space and the variable physical constraints. This paper meets the challenge of making heterogeneous FTQC design practical by introducing HetArch, a toolbox for designing heterogeneous quantum systems, and using it to explore heterogeneous design scenarios. Using a hierarchical approach, we successively break quantum algorithms into smaller operations (akin to classical application kernels), thus greatly simplifying the design space and resulting tradeoffs. Specializing to superconducting systems, we then design optimized heterogeneous hardware composed of varied superconducting devices, abstracting physical constraints into design rules that enable devices to be assembled into standard cells optimized for specific operations, which, in turn, form heterogeneous modules optimized for quantum subroutines. Finally, we provide a heterogeneous design space exploration framework which reduces the simulation burden by a factor of 10^4 or more and allows us to characterize optimal design points. We use these techniques to design superconducting quantum modules for entanglement distillation, error correction, and code teleportation, reducing error rates by 2.6×, 10.7×, and 3.4× compared to homogeneous systems.

Quantum Computing, Quantum Physics, Computer Archi↗
DOE OSTI2024

Modular Quantum Processor with an All-to-All Reconfigurable Router

Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to only a few neighboring qubits. Achieving longer-range and more flexible connectivity, which is particularly appealing in light of recent developments in error-correcting codes, however, usually involves complex multilayer packaging and external cabling, which is resource intensive and can impose fidelity limitations. Here, we propose and realize a high-speed on-chip quantum processor that supports reconfigurable all-to-all coupling with a large on-off ratio. We implement the design in a four-node quantum processor, built with a modular design comprising a wiring substrate coupled to two separate qubit-bearing substrates, each including two single-qubit nodes. We use this device to demonstrate reconfigurable controlled-𝑍 gates across all qubit pairs, with a benchmarked average fidelity of 96.00% ± 0.08% and best fidelity of 97.14% ± 0.07%, limited mainly by dephasing in the qubits. We also generate multiqubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with fidelities of 88.15% ± 0.24% and 75.18% ± 0.11%, respectively. This approach promises efficient scaling to larger-scale quantum circuits and offers a pathway for implementing quantum algorithms and error-correction schemes that benefit from enhanced qubit connectivity.

Quantum circuits↗
DOE OSTI2026

ML–Enabled FPGA Framework for Fast Quantum State Discrimination in Mid-Circuit Measurement Regimes

Accurate and low-latency quantum state discrimination is essential for protocols involving mid-circuit measurement (MCM) and conditional feed-forward. In superconducting quantum systems, conventional readout pipelines transfer measurement data to host processors for post-processing, introducing millisecond-scale delays that far exceed qubit coherence times. To overcome this bottleneck, we present an in-situ machine learning (ML) inference engine implemented on an FPGA for real-time quantum state discrimination. Our design performs inference directly on digitized readout signals with 40 ns latency, supports both qubit and qutrit readout, and enables conditional operations without host-side intervention. This capability is critical for MCM and for feedback-driven protocols such as quantum error correction. We validate the system on superconducting transmon hardware, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. We further demonstrate conditional qutrit logic driven by FPGA-resident classification, highlighting the potential of low-latency ML-on-FPGA control for NISQ applications and scalable fault-tolerant quantum computing.

Vora, Neel [Lawrence Berkeley National Laboratory ↗
DOE OSTI2021

Multiscale System Modeling of Single-Event-Induced Faults in Advanced Node Processors

Integration-technology feature shrink increases computing-system susceptibility to single-event effects (SEE). While modeling SEE faults will be critical, an integrated processor’s scope makes physically correct modeling computationally intractable. Without useful models, presilicon evaluation of fault-tolerance approaches becomes impossible. To incorporate accurate transistor-level effects at a system scope, we present a multiscale simulation framework. Charge collection at the 1) device level determines 2) circuit-level transient duration and state-upset likelihood. Circuit effects, in turn, impact 3) register-transfer-level architecture-state corruption visible at 4) the system level. Furthermore, the physically accurate effects of SEEs in large-scale systems, executed on a high-performance computing (HPC) simulator, could be used to drive cross-layer radiation hardening by design. We demonstrate the capabilities of this model with two case studies. First, we determine a D flip-flop’s sensitivity at the transistor level on 14-nm FinFet technology, validating the model against published cross sections. Second, we track and estimate faults in a microprocessor without interlocked pipelined stages (MIPS) processor for Adams 90% worst case environment in an isotropic space environment.

42 ENGINEERING↗
DOE OSTI2025

Visual Analytics of Crosstalk in Quantum Hardware

Crosstalk remains a major obstacle to building scalable and fault-tolerant quantum computers. Conventional diagnostic techniques-often based on numerical simulation or statistical modeling-struggle to scale with hardware complexity and offer limited interpretability. In this work, we present a visual analytics framework for diagnosing qubit crosstalk using lightweight, circuit-based models integrated with an interactive user interface. Our approach quantifies correlations between active and idle qubits under parameterized single- and twoqubit operations, enabling detection of both spatial and gateinduced crosstalk. The system incorporates qubit topology and gate performance data to support sector-based exploration and correlation mapping. This tool assists users in identifying correlated error sources, informing qubit placement strategies, and guiding noise-aware circuit design.

Chae, Junghoon [ORNL] (ORCID:0000000206016746)↗
DOE OSTI2025

Systematic input scheme for many-boson Hamiltonians with applications to the two-dimensional 𝜙 4 theory

We develop a novel, systematic input scheme for many-boson Hamiltonians in order to solve field theory problems within the light-front Hamiltonian formalism via quantum computing. We present our discussion of this input scheme based on the light-front Hamiltonian of the two-dimensional ϕ 4 theory. In our input scheme, we employ a set of quantum registers, where each register encodes the occupation of a distinct boson mode as binaries. We squeeze the boson operators of each mode and present the Hamiltonian in terms of unique combinations of the squeezed-boson operators. We design the circuit modules for these unique combinations. Based on these circuit modules, we block encode the many-boson Hamiltonian utilizing the idea of quantum walk. For demonstration purposes, we present the spectral calculations of the Hamiltonian utilizing the hybrid quantum-classical symmetry-adapted quantum Krylov subspace diagonalization algorithm based on our input scheme, where the quantum computations are performed with the IBM Qiskit quantum simulator. The results of the hybrid calculations agree with exact results. Here, we can incorporate the input scheme in this work with the input scheme for many-fermion Hamiltonians; they jointly offer new pathways to solving the structure and dynamics of more general field theory problems on future fault-tolerant quantum computers.

Ab initio calculations↗
DOE OSTI2025

A fault-tolerant neutral-atom architecture for universal quantum computation

Quantum error correction (QEC) is essential for the realization of large-scale quantum computers. However, owing to the complexity of operating on the encoded ‘logical’ qubits, understanding the physical principles for building fault-tolerant quantum devices and combining them into efficient architectures is an outstanding scientific challenge. Here we use reconfigurable arrays of up to 448 neutral atoms to implement the key elements of a universal, fault-tolerant quantum processing architecture and experimentally explore their underlying working mechanisms. We first use surface codes to study how repeated QEC suppresses errors, demonstrating 2.14(13)x below-threshold performance in a four-round characterization circuit by leveraging atom loss detection and machine learning decoding. We then investigate logical entanglement using transversal gates and lattice surgery and extend it to universal logic through transversal teleportation with three-dimensional [[15,1,3]] codes, enabling arbitrary-angle synthesis with polylogarithmic overhead. Finally, we develop mid-circuit qubit reuse16, increasing experimental cycle rates by two orders of magnitude and enabling deep-circuit protocols with dozens of logical qubits and hundreds of logical teleportations with [[7,1,3]] and high-rate [[16,6,4]] codes while maintaining constant internal entropy. Our experiments show key principles for efficient architecture design, involving the interplay between quantum logic and entropy removal, judiciously using physical entanglement in logic gates and magic state generation, and leveraging teleportations for universality and physical qubit reset. These results establish foundations for scalable, universal error-corrected processing and its practical implementation in neutral atom systems.

atomic and molecular physics↗
DOE OSTI2025

Disentangling the impact of quasiparticles and two-level systems on the statistics of superconducting-qubit lifetime

Temporal fluctuations in the superconducting qubit lifetime, T 1 , present additional challenges in the pursuit of fault-tolerant quantum computing. Although the exact mechanisms remain unclear, T 1 fluctuations are generally attributed to strong coupling between the qubit and a few near-resonant two-level systems (TLSs), which can exchange energy with an ensemble of thermally fluctuating two-level fluctuators (TLFs) at low frequencies. Here, we report T 1 measurements of qubits with varying geometrical footprints and surface dielectrics as a function of temperature. By analyzing the noise spectrum of the qubit depolarization rate, Γ 1 = 1 / T 1 , we disentangle the contributions of TLSs, nonequilibrium quasiparticles (QPs), and equilibrium (thermally excited) QPs to the variance in Γ 1 . We find that the Γ 1 variance in qubits with smaller footprints is more susceptible to QP and TLS fluctuations than that in larger-footprint qubits. Furthermore, the QP-induced variances in all qubits align with the theoretical framework of QP diffusion and fluctuation. These findings offer valuable insights for future qubit design and engineering optimization.

Zhu, Shaojiang [Fermilab] (ORCID:0000000293180092)↗
DOE OSTI2025

Quantum Computing Strategy 2026

Quantum computing (QC) is a rapidly maturing technology with the potential for revolutionary impacts on stockpile stewardship science and national security. Recent developments in fault-tolerant architectures have compressed vendor roadmaps, and predictions of a production-ready quantum computer by the mid-2030s are becoming increasingly credible. This strategy provides a roadmap for integrating QC into the Advanced Simulation and Computing (ASC) program by investing in four strategic focus areas: 1. Develop Capabilities in Mission-Relevant Quantum Applications: ASC will prioritize developing quantum-ready applications in mission areas that have shown significant promise for quantum advantage, including simulations of materials in extreme environments, nuclear dynamics, solving linear and nonlinear partial differential equations, and uncertainty quantification. These applications directly support stockpile stewardship science and modernization objectives. 2. Conduct R&D in Algorithms, Software, and Hardware: Sustained research into quantum algorithms, robust software tools, and quantum hardware is essential. ASC will develop efficient quantum algorithms; invest in quantum compilers, debuggers, and performance tools; and explore specialized quantum hardware tailored to NNSA’s unique requirements. 3. Engage with Vendors and Partners: Early and active collaboration with commercial quantum hardware vendors and academic partners is critical. Through testbeds, co-design agreements, and quantum demonstration facilities, ASC will influence hardware design, gain early access to emerging technologies, and ensure that quantum platforms evolve to meet mission needs. 4. Build Knowledge, Experience, and Workforce: Expanding and upskilling the quantum-trained workforce is essential to long-term success. This includes hiring, internal training, university outreach, and postdoctoral support to ensure ASC maintains the expertise required to operate, program, and integrate quantum systems as they become available. While quantum computing will never replace classical computing, it has the potential to solve certain problems with speed and accuracy that would be unachievable using any conceivable classical high-performance computing (HPC) system. By investing strategically in QC, ASC will help propel the emergent QC industry, maintain U.S. technological leadership, ensure mission readiness, and position itself to rapidly adopt quantum technologies as they mature.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Fault isolation and fault-tolerant control for nonlinear stochastic distribution control systems with multiplicative faults

Here, in this paper, a fault isolation, diagnosis and fault tolerant control algorithm is proposed for nonlinear multiple multiplicative faults stochastic distribution control systems employing Takagi–Sugeno fuzzy system. To obtain the detailed fault information, a fault detection algorithm is introduced to discover the fault occurrence time. Then a fault isolation observer is built to produce the residual, and the error system is separated to subsystems affected only by disturbance and multiplicative faults. Moreover, a fault estimation scheme is presented to obtain the fault magnitude information. When faults occur, the system output probability density function will deviate from the desired distribution. So the model predictive control fault tolerant control scheme is needed to minimize the impact of faults as much as possible to make sure that the post fault output probability density function track the desired probability density function. The validity of the designed algorithm is demonstrated through a simulation example, where the fault tolerant control algorithm ensures that the system output probability density function still track the given output probability density function despite the complex case of multiple multiplicative faults occurring simultaneously.

42 ENGINEERING↗
DOE OSTI2022

WBG-Enabled Current-Source Inverters for Integrated PM Motor Drives

This project takes advantage of the special capabilities of wide-bandgap (WBG) power semiconductor devices to develop innovative power electronics in the form of new current-source inverters (CSIs) that offer promising advantages over the dominant voltage-source inverter (VSI) topology. These CSIs, in turn, are extremely well-suited for integration into the housings of permanent magnet synchronous machines (PMSMs) to form integrated motor drives (IMDs). These new IMDs offer great promise for achieving major energy savings in a wide variety of applications that benefit from adjustable-speed control, including air conditioners, laundry appliances, industrial pumps/compressors, electric vehicles, and aerospace drives. WBG devices play a critical enabling role in these new IMDs because of their transformative features including much higher switching frequencies, lower losses, and compatibility with high operating temperatures. When incorporated into new CSI-based IMDs with PM machines, these WBG switches open the door to achieving major increases in power density, drive system efficiency, and fault tolerance, as well as substantial reductions in electromagnetic interference (EMI), manufacturing cost, and temperature-induced failures. The higher operating temperature capability of WBG devices compared to conventional silicon power devices is very appealing in IMD applications because the power electronics is mounted in close proximity to the motors which typically operate at temperatures well above the maximum limits of today’s silicon-based power electronics. This project has succeeded in designing, building, and testing multiple prototype versions of this CSI-IMD that have overcome many technical challenges in order to demonstrate the impressive performance improvements that can be achieved by the WBG-enabled CSI-IMD. The preliminary demo and bench-top versions of the current-source inverter developed during the first two years of the project were critical to laying the technical foundations for the 3 kW prototype CSI-IMD unit that was successfully built and tested during the third year. This prototype CSI-IMD unit was designed to fit within the housing envelope of the original permanent magnet (PM) synchronous machine in order to meet the demanding power density requirements that were set at the beginning of the project. All of the remaining performance objectives set for the prototype CSI-IMD unit including efficiency and electromagnetic interference (EMI) were also met. The last 18 months of the project were devoted to developing further enhancements of the WBG-enabled CSI-IMD technology that better prepare it for commercial production. More specifically, an upgraded version of the prototype CSI-IMD unit was developed that moved the power electronics into the same machine housing chamber as the motor, substantially raising the thermal demands on the power electronics. Tests with five different combinations of motor enclosure types and air cooling configurations were evaluated. Importantly, this work confirmed that the power electronics can deliver its full rated power and still operate well within its maximum temperature limits even for worst-case conditions when the housing is “totally-enclosed” without any openings for air to enter or exit the enclosure, and no blower/fan is provided to blow air over the outside surface of the enclosure. Reaching the full performance and energy-savings potential of this disruptive CSI-IMD motor drive technology is highly consistent with ARPA-E’s stated mission to “enhance the economic and energy security of the United States” while also supporting its commitment to “ensure that the U.S. maintains a technological lead in developing and deploying advanced energy technologies”. Follow-on projects are under way to explore the scalability of WBG-enabled CSI-IMD technology to 100 kW (peak) electric vehicle traction drives and fault-tolerant modular motor drives for future electrified aircraft propulsion applications.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2021

Fault isolation and fault-tolerant control for Takagi-Sugeno fuzzy time-varying delay stochastic distribution systems

A fault isolation, estimation, and fault-tolerant control (FTC) scheme for nonlinear time-varying delay stochastic distribution control systems was presented in this paper. The Takagi-Sugeno fuzzy model was adopted to approach the nonlinear dynamics of time-varying delay systems. According to the output equivalence principle and Laplace transformation, an augmented state vector was given to solve the time-varying delay problem. When multiple actuator faults and interference occur simultaneously, fault detection, isolation and fault estimation was designed to obtained the fault information. To decouple faults and obtain the value and location information of the fault, the system was separated into two parts through the designed multiple conversion matrices, in which one subsystem was only affected by one actuator fault. This has simplified the design of fault isolation and estimation. A adaptive observer for fault estimation was given. Then, fault information such as the time, location, and size was determined. The observer gain matrices were calculated using linear matrix inequality (LMI). When a fault was detected and diagnosed, a FTC algorithm was devised using the proportional-integral control scheme to compensate the fault as much as possible. It has been shown that even if multiple faults actuator occurred simultaneously, the FTC controller still ensured the output probability density function of the system traced the desired probability density function when a fault occurred. Finally, the expected results were obtained through the simulation example, which confirmed the effectiveness of the method.

42 ENGINEERING↗
DOE OSTI2022

Oak Ridge National Laboratory Pilot Demonstration of an Attestation and Anomaly Detection Framework using Distributed Ledger Technology for Power Grid Infrastructure

This report summarizes the design and pilot demonstration of a framework called Grid Guard that was created to provide increased data and device trustworthiness to electric grid devices by leveraging distributed ledger technology (DLT), specifically blockchain. Grid Guard contains a combination of core cryptographic methods such as the secure hash algorithm (SHA), and asymmetric cryptography, private permissioned blockchain, baselining configuration data, consensus algorithm (Raft) and the Hyperledger Fabric (HLF) framework. The system implements a low energy, fast, and robust enhancement to system trustworthiness within and across electric grid systems such as substations, control centers and metering infrastructures. Blockchain is a distributed database structured that provides a practically unalterable (immutable) timeline of stored transactions. By relying on hashing and the Raft consensus algorithm, if an entity tries to illegitimately alter a record at one instance of the database the other ledger nodes are not altered. They work to cross-reference each other and easily locate any incorrectly added data and remove it. The bulk raw data is stored in an off-chain storage (outside of the blockchain ledger) and a hash of this baseline data is stored in the Blockchain ledger via hashing windows of time-series and configuration data, after aggregation and filtering. The bulk off-chain data repository is then considered to be trust-anchored using the hashes stored in the blockchain. To secure the electric grid testbed devices and data, device configuration baselines were compared to those baselines that had been previously stored in the ledger. Statistical baselines for device configurations, network communication patterns, and high-speed sensor data are calculated and then stored off-chain and hashes stored in the ledger. Measurements such as three-phase voltage and current, frequency, breaker status, protection scheme settings, network configuration settings (and other device configuration artifacts) and network traffic features (packet interarrival times) are compared every minute or other selected time windows. During phase 1 of the Grid Guard DLT project different DLT technologies were studies, and an assessment was performed on DLT technology vulnerabilities, uses, and key characteristics. DLT consensus protocols were studies (e.g., RAFT, named after Reliable, Replicated, Redundant, And Fault-Tolerant). Also, cryptography, public, private and permissioned or permissionless systems were assessed. Grid Guard implements a permissioned private DLT. Consensus algorithm selection and choice of DLT implementation depended heavily on the use-case. For this use-case, parameters were selected to measure performance and existing tools for assessment. Benchmarking was performed theoretically and practically. During phase 2 hashed transactions/blocks were inserted into the ledger every second. During phase 2 of the Grid Guard DLT project, a prototype framework was developed and demonstrated for attestation of critical substation devices and data using precision timing systems that use PTP and IRIG-B protocols) on a testbed of operational devices that emulated a distribution substation, control center, and power metering infrastructure using real Operational Technology (OT). The testbed includes OT devices such as protective relays, human machine interfaces (HMI), and power meters. To determine when to collect and compare system and network baselines, an initial examination of an anomaly detection capability to identify malicious manipulation of data streams was conducted. The resulting anomaly detection was demonstrated in a set of experiments and leveraged to trigger device artifact attestation checks. Attestation checks occur against device configuration baselines when compared with the immutable blockchain-stored baselines, which provided a cryptographically supported means by which to store baselines. The electrical substation-grid testbed was created to test the Grid Guard framework. The testbed emulates the operations of a portion of a power grid and SCADA systems as closely as possible. The testbed integrates real protocols, mainly IEC 61850 standard protocols, such as the Sampled Value (SV) and the GOOSE protocols. The testbed also supports DNP3 and other layer 2 and layer 3 protocols such as Telnet, SSH, SFTP/FTP and other proprietary protocols needed to connect to industrial control system equipment. The testbed emulates real power conditions using the OpalRT hardware-in-the-loop (HIL) device which can create fault situations that cannot be easily tested on real systems. The electrical substation-grid testbed was created using real measurement, communication, and protection devices that electrical utilities commonly use.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2025

Geometric Structure and Transversal Logic of Quantum Reed–Muller Codes

Designing efficient and noise-tolerant quantum computation protocols generally begins with an understanding of quantum error-correcting codes and their native logical operations. The simplest class of native operations are transversal gates, which are naturally fault-tolerant. Here, in this paper, we aim to characterize the transversal gates of quantum Reed–Muller (RM) codes by exploiting the well-studied properties of their classical counterparts. We start our work by establishing a new geometric characterization of quantum RM codes via the Boolean hypercube and its associated subcube complex. More specifically, a set of stabilizer generators for a quantum RM code can be described via transversal X and Z operators acting on subcubes of particular dimensions. This characterization leads us to define subcube operators composed of single-qubit π/2 k Z -rotations that act on subcubes of given dimensions. We first characterize the action of subcube operators on the code space: depending on the dimension of the subcube, these operators either (1) act as a logical identity on the code space, (2) implement non-trivial logic, or (3) rotate a state away from the code space. Second, and more remarkably, we uncover that the logic implemented by these operators corresponds to circuits of multi-controlled-Z gates that have an explicit and simple combinatorial description. Overall, this suite of results yields a comprehensive understanding of a class of natural transversal operators for quantum RM codes.

Reed–Muller (RM) codes↗
DOE OSTI2021

Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions

Addressing the increasing demand for high- efficiency and high-power-density converters, the flying-capacitor multilevel converter has shown itself as a promising topology. A key advantage of this topology is the reduced voltage rating of the switches, though also makes it vulnerable to device failure during short-circuit conditions. Despite large interest in fault-tolerant operation of these converters, alongside detailed descriptions of flying capacitor balancing, little research has focused on the converter short-circuit fault analysis, which may cause a switch failure if not properly designed for. Therefore, this work presents a comprehensive model describing the large- signal short-circuit switching behavior of a general N -level flying- capacitor multilevel converter. Highly simplified models used to predict the evolution of the switch current and voltage stress during the fault are proposed, targeted at practicing engineers for conservative design guidelines. These models are used to determine the critical time for remedial action of the converter before reaching some predefined maximum conditions. A 2-to-10- level fully-configurable flying-capacitor multilevel converter and a fault circuit hardware prototype are used to experimentally perform different short-circuit tests that show a good match to the measured behavior.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2022

Ion Coulomb Crystals in Storage Rings for Quantum Information Science

Quantum information science is a growing field that promises to take computing into a new age of higher performance and larger scale computing as well as being capable of solving problems classical computers are incapable of solving. The outstanding issue in practical quantum computing today is scaling up the system while maintaining interconnectivity of the qubits and low error rates in qubit operations to be able to implement error correction and fault-tolerant operations. Trapped ion qubits offer long coherence times that allow error correction. However, error correction algorithms require large numbers of qubits to work properly. We can potentially create many thousands (or more) of qubits with long coherence states in a storage ring. For example, a circular radio-frequency quadrupole, which acts as a large circular ion trap and could enable larger scale quantum computing. Such a Storage Ring Quantum Computer (SRQC) would be a scalable and fault tolerant quantum information system, composed of qubits with very long coherence lifetimes. With computing demands potentially outpacing the supply of high-performance systems, quantum computing could bring innovation and scientific advances to particle physics and other DOE supported programs. Increased support of R$\&$D in large scale ion trap quantum computers would allow the timely exploration of this exciting new scalable quantum computer. The R$\&$D program could start immediately at existing facilities and would include the design and construction of a prototype SRQC. We invite feedback from and collaboration with the particle physics and quantum information science communities.

43 PARTICLE ACCELERATORS↗