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At least 55 records · Page 3

The human respiratory gate

Respiratory activity phasically alters membrane potentials of preganglionic vagal and sympathetic motoneurones and continuously modulates their responsiveness to stimulatory inputs. The most obvious manifestation of this 'respiratory gating' is respiratory sinus arrhythmia, the rhythmic fluctuations of electrocardiographic R-R intervals observed in healthy resting humans. Phasic autonomic motoneurone firing, reflecting the throughput of the system, depends importantly on the intensity of stimulatory inputs, such that when levels of stimulation are low (as with high arterial pressure and sympathetic activity, or low arterial pressure and vagal activity), respiratory fluctuations of sympathetic or vagal firing are also low. The respiratory gate has a finite capacity, and high levels of stimulation override the ability of respiration to gate autonomic responsiveness. Autonomic throughput also depends importantly on other factors, including especially, the frequency of breathing, the rate at which the gate opens and closes. Respiratory sinus arrhythmia is small at rapid, and large at slow breathing rates. The strong correlation between systolic pressure and R-R intervals at respiratory frequencies reflects the influence of respiration on these two measures, rather than arterial baroreflex physiology. A wide range of evidence suggests that respiratory activity gates the timing of autonomic motoneurone firing, but does not influence its tonic level. I propose that the most enduring significance of respiratory gating is its use as a precisely controlled experimental tool to tease out and better understand otherwise inaccessible human autonomic neurophysiological mechanisms.

Review

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

Phillips, Thomas A.

Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

Phillips, Thomas A.

Radiation-Insensitive Inverse Majority Gates

To help satisfy a need for high-density logic circuits insensitive to radiation, it has been proposed to realize inverse majority gates as microscopic vacuum electronic devices. In comparison with solid-state electronic devices ordinarily used in logic circuits, vacuum electronic devices are inherently much less adversely affected by radiation and extreme temperatures. The proposed development would involve state-of-the-art micromachining and recent advances in the fabrication of carbon-nanotube-based field emitters. A representative three-input inverse majority gate would be a monolithic, integrated structure that would include three gate electrodes, six bundles of carbon nanotubes (serving as electron emitters) at suitable positions between the gate electrodes, and an overhanging anode. The bundles of carbon nanotubes would be grown on degenerately doped silicon substrates that would be parts of the monolithic structure. The gate electrodes would be fabricated as parts of the monolithic structure by means of a double-silicon-on-insulator process developed at NASA's Jet Propulsion Laboratory. The tops of the bundles of carbon nanotubes would lie below the plane of the tops of the gate electrodes. The particular choice of shapes, dimensions, and relative positions of the electrodes and bundles of carbon nanotubes would provide for both field emission of electrons from the bundles of carbon nanotubes and control of the electron current to obtain the inverse majority function, which is described in the paper.

Manohara, Harish

Frame-Transfer Gating Raman Spectroscopy for Time-Resolved Multiscalar Combustion Diagnostics

Accurate experimental measurement of spatially and temporally resolved variations in chemical composition (species concentrations) and temperature in turbulent flames is vital for characterizing the complex phenomena occurring in most practical combustion systems. These diagnostic measurements are called multiscalar because they are capable of acquiring multiple scalar quantities simultaneously. Multiscalar diagnostics also play a critical role in the area of computational code validation. In order to improve the design of combustion devices, computational codes for modeling turbulent combustion are often used to speed up and optimize the development process. The experimental validation of these codes is a critical step in accepting their predictions for engine performance in the absence of cost-prohibitive testing. One of the most critical aspects of setting up a time-resolved stimulated Raman scattering (SRS) diagnostic system is the temporal optical gating scheme. A short optical gate is necessary in order for weak SRS signals to be detected with a good signal- to-noise ratio (SNR) in the presence of strong background optical emissions. This time-synchronized optical gating is a classical problem even to other spectroscopic techniques such as laser-induced fluorescence (LIF) or laser-induced breakdown spectroscopy (LIBS). Traditionally, experimenters have had basically two options for gating: (1) an electronic means of gating using an image intensifier before the charge-coupled-device (CCD), or (2) a mechanical optical shutter (a rotary chopper/mechanical shutter combination). A new diagnostic technology has been developed at the NASA Glenn Research Center that utilizes a frame-transfer CCD sensor, in conjunction with a pulsed laser and multiplex optical fiber collection, to realize time-resolved Raman spectroscopy of turbulent flames that is free from optical background noise (interference). The technology permits not only shorter temporal optical gating (down to <1 s, in principle), but also higher optical throughput, thus resulting in a substantial increase in measurement SNR.

Nguyen, Quang-Viet

An Integrated Gate Turnaround Management Concept Leveraging Big Data/Analytics for NAS Performance Improvements

The Integrated Gate Turnaround Management (IGTM) concept was developed to improve the gate turnaround performance at the airport by leveraging relevant historical data to support optimization of airport gate operations, which include: taxi to the gate, gate services, push back, taxi to the runway, and takeoff, based on available resources, constraints, and uncertainties. By analyzing events of gate operations, primary performance dependent attributes of these events were identified for the historical data analysis such that performance models can be developed based on uncertainties to support descriptive, predictive, and prescriptive functions. A system architecture was developed to examine system requirements in support of such a concept. An IGTM prototype was developed to demonstrate the concept using a distributed network and collaborative decision tools for stakeholders to meet on time pushback performance under uncertainties.

Big Data and Net-enabled ATM

System and Method for Scan Range Gating

A system for scanning light to define a range gated signal includes a pulsed coherent light source that directs light into the atmosphere, a light gathering instrument that receives the light modified by atmospheric backscatter and transfers the light onto an image plane, a scanner that scans collimated light from the image plane to form a range gated signal from the light modified by atmospheric backscatter, a control circuit that coordinates timing of a scan rate of the scanner and a pulse rate of the pulsed coherent light source so that the range gated signal is formed according to a desired range gate, an optical device onto which an image of the range gated signal is scanned, and an interferometer to which the image of the range gated signal is directed by the optical device. The interferometer is configured to modify the image according to a desired analysis.

Zuk, David M.

Modeling and Simulating Airport Surface Operations with Gate Conflicts

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASAs Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglas International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling hardstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departure are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

Zelinski, Shannon

Modeling and Simulating Airport Surface Operations with Gate Conflicts

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASA's Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglass International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling harsdstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departures are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

Zelinski, Shannon

A Nanoscale Vacuum Field Emission Gated Diode with an Umbrella Cathode

A nanoscale field emission vacuum channel gated diode structure is proposed and a tungsten cathode with an umbrella-like geometry and sharp vertical edge is fabricated. The edge of the suspended cathode becomes the field emission surface. Unlike in the traditional transistor with the gate typically located between the source and the drain, the bottom silicon plate becomes the gate here and the anode terminal is located between the umbrella cathode and the gate. The fabricated devices show excellent diode characteristics and the gated diode structure is attractive for extremely low gate leakage.

Vacuum field emission diode

Primitive Quantum Gates for an $SU(3)$ Discrete Subgroup: $Σ(72\times3)$

We construct a primitive gate set for the digital quantum simulation of a discrete subgroup of $SU(3)$: the 216-element $Σ(72\times3)$. The necessary primitives are the inversion gate, the group multiplication gate, the trace gate, and the group Fourier transform, for which we provide qubit decompositions. The resulting fault-tolerant T gate costs for a fiducial calculation of shear viscosity would require about $10^{12}$ T gates which compares favorably to other modern estimates.

Perez, Sebastian Osorio [Fermilab; Maryland U.]

Ion Transport in Carbon Nanotube Porins with a pH-Switchable Entrance Gate

Molecular transport in nanofluidic channels often differs drastically from conventional bulk transport. Strong confinement in those channels amplifies the roles of surface transport, surface defects, and molecular gates. Here, in this study, we introduce a chemical functionality at the nanotube rim that acts as a pH-triggered molecular gate by forming a movable lid that blocks the pore entrance. We use ion and proton transport measurements to show that these sub-1 nm diameter fluorescent ultrashort carbon nanotube porins (FUNPs) modulate ion transport by switching between the “open” and “closed” conformations of this gate. Specifically, at neutral pH the channel lid is open, allowing unimpeded ion transport through the gate, whereas at acidic pH values the lid forms a “closed” conformation that blocks transport through the nanotube. We also report first-principles MD simulations that confirm this gating mechanism and reveal molecular details of the ion and proton transport processes in these functional nanopores.

Carbon nanotubes

Reconfigurable Magnetotransport in MnBi 2 Te 4 via Gate and Magnetic Field Tuning

The intrinsic magnetic topological insulator MnBi 2 Te 4 is a promising platform for exploring quantum phases with nontrivial band topology and for enabling electrical control over coupled magnetic and electronic phase transitions. In-plane magnetic fields, in particular, offer a distinct means of tuning these properties by strengthening quantized Hall effects, enhancing surface energy gaps, and driving spin reorientation transitions. However, a systematic understanding of how such fields affect magnetotransport is limited. Here, the magnetotransport behavior of few-layer MnBi 2 Te 4 as a function of gate voltage, temperature, and magnetic field angle, with a primary focus on in-plane field effects, are investigated. A gate-tunable crossover in magnetoresistance is observed from positive to negative values under in-plane magnetic fields as the gate voltage is swept below the charge neutrality point at temperatures below the Néel temperature. The in-plane field drives a transition from the antiferromagnetic ground state to a ferromagnetic configuration with spins aligned in-plane, while simultaneously altering the electronic structure, as revealed by gate-dependent transport features. The angle-dependent measurements reveal strongly gate-tunable magnetotransport anisotropy. These results establish in-plane magnetic fields as an effective tuning parameter for modulating spin and charge transport in MnBi 2 Te 4 , advancing prospects for reconfigurable spintronic and topological devices.

MnBi 2 Te 4

Tunable 3D Aerosol Jet Printing of Low‐Power Redox‐Gated Transistors with Multicomponent Inks

Printed hybrid electronics (PHE) offer a promising alternative for microelectronics fabrication, addressing some limitations of traditional subtractive manufacturing. Despite the versatility of PHE, particularly in the customization of printing inks, these devices have not yet matched the performance of silicon-based electronics due to challenges in gating mechanisms and operational stability. However, the potential of low-voltage redox-gating to achieve significant carrier modulations in correlated metal oxides remains unexplored in PHE. This study systematically investigates vanadium dioxide (VO 2 ) nanoparticles and redox inks, linking their organization in solution to their morphology, phase state, and properties in solid films and multilayered structures. Using an aerosol jet printer (AJP), a solid-state VO 2 transistor is fabricated, operating at just 0.4 V gating voltage. The printed VO 2 films demonstrate redox-modulated conductivity and consistent transistor behavior. The solid-state redox gating materials also provide long-term stability, with the device maintaining performance over 6000 cycles without degradation. These results highlight the potential of redox gating to enhance the application of functional nanoparticles in printed hybrid microelectronics, especially for flexible, low-voltage, and energy-efficient devices.

36 MATERIALS SCIENCE

The gating mechanism of the large mechanosensitive channel MscL

The mechanosensitive channel of large conductance, MscL, is a ubiquitous membrane-embedded valve involved in turgor regulation in bacteria. The crystal structure of MscL from Mycobacterium tuberculosis provides a starting point for analysing molecular mechanisms of tension-dependent channel gating. Here we develop structural models in which a cytoplasmic gate is formed by a bundle of five amino-terminal helices (S1), previously unresolved in the crystal structure. When membrane tension is applied, the transmembrane barrel expands and pulls the gate apart through the S1-M1 linker. We tested these models by substituting cysteines for residues predicted to be near each other only in either the closed or open conformation. Our results demonstrate that S1 segments form the bundle when the channel is closed, and crosslinking between S1 segments prevents opening. S1 segments interact with M2 when the channel is open, and crosslinking of S1 to M2 impedes channel closing. Gating is affected by the length of the S1-M1 linker in a manner consistent with the model, revealing critical spatial relationships between the domains that transmit force from the lipid bilayer to the channel gate.

Non-NASA Center

Fast Z Z free entangling gates for superconducting qubits assisted by a driven resonator

Engineering high-fidelity two-qubit gates is an indispensable step toward practical quantum computing. For superconducting quantum platforms, one important setback is the stray interaction between qubits, which causes significant coherent errors. For transmon qubits, protocols for mitigating such errors usually involve fine-tuning the hardware parameters or introducing usually noisy flux-tunable couplers. In this work, we propose a simple scheme to cancel these stray interactions. The coupler used for such cancelation is a driven high-coherence resonator, where the amplitude and frequency of the drive serve as control knobs. Through the resonator-induced-phase interaction, the static Z Z coupling can be entirely neutralized. We numerically show that such a scheme can enable short and high-fidelity entangling gates, including cross-resonance controlled-not (cnot) gates within 40 ns and adiabatic controlled- Z gates within 140 ns. Our architecture is not only Z Z -free, but also contains no extra noisy components, such that it preserves the coherence times of fixed-frequency transmon qubits. With the state-of-the-art coherence times, the error of our cross-resonance cnot gate can be reduced to below 10 − 4 .

Huang, Ziwen

GaAs dual-gate FET for operation up to K-band

A high-frequency equivalent-circuit model of a GaAs dual-gate FET and analytical expressions for the input/output impedances, transconductance, unilateral gain, and stability factor are presented. It is found that the gain of a dual-gate FET is higher than of a single-gate FET at low frequency but decreases faster as frequency increases because of the capacitive shunting effect of the second gate. A dual-gate power FET suitable for variable-gain-amplifier applications up to K-band has been developed. At 10 GHz, a 1.2-mm-gatewidth device has achieved an output power of 1.1 W with 10.5-dB gain and 31-percent power-added efficiency. At 20 GHz, the same device delivered an output power of 340 mW with 5.3-dB gain. At K-band, a dynamic-gain control range of up to 45 dB was obtained with an insertion phase change of no more than + or 2 degrees for the first 10 dB of gain control.

Kim, B.

Characteristics of 0.8- and 0.2-microns gate length In(x)Ga(1-x) As/In(0.52)Al(0.48)As/InP (0.53 less than or equal to x less than or equal to 0.70) modulation-doped field-effect transistors at cryogenic temperatures

The performance characteristics of InP-based In(x)Ga(1-x)As/In(0.52)Al(0.48)As (0.53 is less than or equal to x is less than or equal to 0.70) pseudomorphic modulation-doped field-effect transistors (MODFET's) as a function of strain in the channel, gate, length, and temperature were investigated analytically and experimentally. The strain in the channel was varied by varying the In composition x. The temperature was varied in the range of 40-300 K and the devices have gate lengths L(sub g) of 0.8 and 0.2 microns. Analysis of the device was done using a one-dimensional self consistent solution of the Poisson and Schroedinger equations in the channel, a two-dimensional Poisson solver to obtain the channel electric field, and a Monte Carlo simulation to estimate the carrier transit times in the channel. An increase in the value of the cutoff frequency is predicted for an increase in In composition, a decrease in temperature, and a decrease in gate length. The improvements seen with decreasing temperature, decreasing gate length, and increased In composition were smaller than those predicted by analysis. The experimental results on pseudomorphic InGaAs/InAlAs MODFET's showed that there is a 15-30 percent improvement in cutoff frequency in both the 0.8- and 0.2-micron gate length devices when the temperature is lowered from 300 to 40 K.

Lai, Richard