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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3

The pollution reduction technology program for can-annular combustor engines - Description and results

Pollutant reduction and performance characteristics were determined for three successively more advanced combustor concepts. Program Element I consisted of minor modifications to the current production JT8D combustor and fuel system to evaluate means of improved fuel preparation and changes to the basic airflow distribution. Element II addressed versions of the two-staged Vorbix (vortex burning and mixing) combustor and represented a moderate increase in hardware complexity and difficulty of development. The concept selected for Element III employed vaporized fuel as a means of achieving minimum emission levels and represented the greatest difficulty of development and adaptation to the JT8D engine. Test results indicate that the Element I single-stage combustors were capable of dramatic improvement in idle pollutants. The multistage combustors evaluated in Program Elements II and III simultaneously reduced CO, THC and NOx emissions, but were unable to satisfy the current 1979 EPA standards.

Roberts, R.↗

Design of a digital compression technique for shuttle television

The determination of the performance and hardware complexity of data compression algorithms applicable to color television signals, were studied to assess the feasibility of digital compression techniques for shuttle communications applications. For return link communications, it is shown that a nonadaptive two dimensional DPCM technique compresses the bandwidth of field-sequential color TV to about 13 MBPS and requires less than 60 watts of secondary power. For forward link communications, a facsimile coding technique is recommended which provides high resolution slow scan television on a 144 KBPS channel. The onboard decoder requires about 19 watts of secondary power.

Habibi, A.↗

Pollution reduction technology program for small jet aircraft engines, phase 1

A series of combustor pressure rig screening tests was conducted on three combustor concepts applied to the TFE731-2 turbofan engine combustion system for the purpose of evaluating their relative emissions reduction potential consistent with prescribed performance, durability, and envelope contraints. The three concepts and their modifications represented increasing potential for reducing emission levels with the penalty of increased hardware complexity and operational risk. Concept 1 entailed advanced modifications to the present production TFE731-2 combustion system. Concept 2 was based on the incorporation of an axial air-assisted airblast fuel injection system. Concept 3 was a staged premix/prevaporizing combustion system. Significant emissions reductions were achieved in all three concepts, consistent with acceptable combustion system performance. Concepts 2 and 3 were identified as having the greatest achievable emissions reduction potential, and were selected to undergo refinement to prepare for ultimate incorporation within an engine.

Bruce, T. W.↗

The realization of arithmetic processors for delta modulation encoded signals

The design and realization of digital devices which add or multiply delta modulation (DM) encoded signals are presented. These systems operate directly on the DM bit stream. It is shown that the devices can be constructed using standard digital hardware and that the hardware complexity needed to add or multiply the two DM encoded signals is equivalent to that needed for pulse code modulation (PCM) signals. Experimental results are presented showing the operation of these systems. The results obtained by adding or multiplying DM encoded signals are compared with those obtained using PCM encoded signals on the basis of signal-to-noise ratio (SNR). A spectral-analysis technique applicable to a DM encoded signal is developed to obtain SNR curves.

Locicero, J. L.↗

Packet communications in satellites with multiple-beam antennas and signal processing

A communication satellite with a multiple-beam antenna and onboard signal processing is considered for use in a 'message-switched' data relay system. The signal processor may incorporate demodulation, routing, storage, and remodulation of the data. A system user model is established and key functional elements for the signal processing are identified. With the throughput and delay requirements as the controlled variables, the hardware complexity, operational discipline, occupied bandwidth, and overall user end-to-end cost are estimated for (1) random-access packet switching; and (2) reservation-access packet switching. Other aspects of this network (eg, the adaptability to channel switched traffic requirements) are examined. For the given requirements and constraints, the reservation system appears to be the most attractive protocol.

Davies, R.↗

Capacity and cutoff rate of (M+1)-ary decision rules for noisy M-ary optical PPM channel

The channel capacity C and the cutoff rate R sub o of two (M + 1)-ary decision rules for noisy M slots/symbol optical pulse position modulation (PPM) with ideal photon counting are computed and compared. Also the values of the optimum thresholds needed to minimize the signal requirements are given. With a minor increase in hardware complexity, the symbol by symbol threshold decision rule is shown to be superior to the slot by slot threshold detection and decision rule in two aspects: first, it saves more than 0.5 dB in signal energy for the very noisy cases of more than one noise photon per slot (for low noise cases it also saves signal energy, but a negligibly small amount). Second, it is more robust to variations in the noise level.

Lee, P. J.↗

High-speed digital signal normalization for feature identification

A design approach for high speed normalization of digital signals was developed. A reciprocal look up table technique is employed, where a digital value is mapped to its reciprocal via a high speed memory. This reciprocal is then multiplied with an input signal to obtain the normalized result. Normalization improves considerably the accuracy of certain feature identification algorithms. By using the concept of pipelining the multispectral sensor data processing rate is limited only by the speed of the multiplier. The breadboard system was found to operate at an execution rate of five million normalizations per second. This design features high precision, a reduced hardware complexity, high flexibility, and expandability which are very important considerations for spaceborne applications. It also accomplishes a high speed normalization rate essential for real time data processing.

Ortiz, J. A.↗

Radar backscatter measurement accuracies using digital Doppler processors in spaceborne scatterometers

The normalized standard deviation, Kp, of radar backscatter measurements using digital Doppler processors in spaceborne scatterometers is derived. The Kp expression for analog Doppler filter processors, such as that used in the Seasat scatterometer is shown to be a special case of the derived Kp expression. A connection to Welch's (1967) power spectrum estimation rsults is also made. Tradeoff studies in digital filter design such as hardware complexity, computational speed, and system performance can be performed based on this Kp expression. A current application in the design of the NASA scatterometer to be flown in 1990 is discussed. This derivation should be useful for system design and analysis of other radar remote-sensing instruments.

Chi, C.-Y.↗

Design and validation of fault-tolerant flight systems

Flight systems must be validated to show that they are consistent with the requirements of their intended applications. While high reliability is difficult to validate, the additional complexity of fault tolerance further compounds the validation problem. The objective of NASA’s research is to develop a methodology for designing validatable fault-tolerant systems. Under the design-for-validation philosophy, emphasis is placed on developing validation methods that can be incorporated into the design process right from the start and design methods and guidance which, while incorporating fault tolerance, can assure validatability. This paper examines the statistical issues of validating highly reliable, fault tolerant system. There are many problems associated with traditional methods of designing and validating these potentially complex hardware and software systems. Useful design-for-validation methods, which include structured specification and design methodologies, mathematical proof techniques, analytical modeling, simulation and emulation, and physical testing, are discussed. Important design issues associated with fault tolerance are presented along with the related validation concerns which must be addressed. Experience has shown that synchronization and Byzantine resilience must accompany fault tolerance. Other design attributes associated with fault tolerance may be used by a designer on the basis of cost, weight, performance, and validation considerations.

Computer systems↗

Adaptive control experiment with a large flexible structure

A large space antenna-like ground experiment structure has been developed for conducting research and validation of advanced control technology. A set of proof-of-concept adaptive control experiments for transient and initial deflection regulation with a small set of sensors and actuators were conducted. Very limited knowledge of the plant dynamics and its environment was used in the design of the adaptive controller so that performance could be demonstrated under conditions of gross underlying uncertainties. High performance has been observed under such stringent conditions. These experiments have established a baseline for future studies involving more complex hardware and environmental conditions, and utilizing additional sets of sensors and actuators.

Ih, Che-Hang Charles↗

Quantization effects in Viterbi decoding rate 1/n convolutional codes

A Viterbi decoder's performance loss due to quantizing data from the additive white Gaussian noise (AWGN) channel is studied. An optimal quantization scheme and branch metric calculation method are presented. The uniformly quantized channel capacity C(sub u)(q) is used to determine the smallest number of quantization bits q that does not cause a significant loss. The quantizer stepsize which maximizes C(sub u)(q) almost minimizes the decoder bit error rate (BER). However, a slightly larger stepsize is better, like the value that minimizes the Bhattacharyya bound. The range and renormalization of state metrics is analyzed, in particular for K = 15 decoders such as the Big Viterbi Decoder (BVD) for the Galileo mission. These results are required to design reduced hardware complexity Viterbi decoders with a negligible quantization loss.

Onyszchuk, I. M.↗

On decoding of multi-level MPSK modulation codes

The decoding problem of multi-level block modulation codes is investigated. The hardware design of soft-decision Viterbi decoder for some short length 8-PSK block modulation codes is presented. An effective way to reduce the hardware complexity of the decoder by reducing the branch metric and path metric, using a non-uniform floating-point to integer mapping scheme, is proposed and discussed. The simulation results of the design are presented. The multi-stage decoding (MSD) of multi-level modulation codes is also investigated. The cases of soft-decision and hard-decision MSD are considered and their performance are evaluated for several codes of different lengths and different minimum squared Euclidean distances. It is shown that the soft-decision MSD reduces the decoding complexity drastically and it is suboptimum. The hard-decision MSD further simplifies the decoding while still maintaining a reasonable coding gain over the uncoded system, if the component codes are chosen properly. Finally, some basic 3-level 8-PSK modulation codes using BCH codes as component codes are constructed and their coding gains are found for hard decision multistage decoding.

Lin, Shu↗

Digital avionics: A cornerstone of aviation

Digital avionics is continually expanding its role in communication (HF and VHF, satellite, data links), navigation (ground-based systems, inertial and satellite-based systems), and flight-by-wire control. Examples of electronic flight control system architecture, pitch, roll, and yaw control are presented. Modeling of complex hardware systems, electromagnetic interference, and software are discussed.

Spitzer, Cary R.↗

High performance network and channel-based storage

In the traditional mainframe-centered view of a computer system, storage devices are coupled to the system through complex hardware subsystems called input/output (I/O) channels. With the dramatic shift towards workstation-based computing, and its associated client/server model of computation, storage facilities are now found attached to file servers and distributed throughout the network. We discuss the underlying technology trends that are leading to high performance network-based storage, namely advances in networks, storage devices, and I/O controller and server architectures. We review several commercial systems and research prototypes that are leading to a new approach to high performance computing based on network-attached storage.

Katz, Randy H.↗

Enhanced spectral efficiency using bandwidth switchable SAW filtering for mobile satellite communications systems

Currently proposed mobile satellite communications systems require a high degree of flexibility in assignment of spectral capacity to different geographic locations. Conventionally this results in poor spectral efficiency which may be overcome by the use of bandwidth switchable filtering. Surface acoustic wave (SAW) technology makes it possible to provide banks of filters whose responses may be contiguously combined to form variable bandwidth filters with constant amplitude and phase responses across the entire band. The high selectivity possible with SAW filters, combined with the variable bandwidth capability, makes it possible to achieve spectral efficiencies over the allocated bandwidths of greater than 90 percent, while retaining full system flexibility. Bandwidth switchable SAW filtering (BSSF) achieves these gains with a negligible increase in hardware complexity.

Peach, Robert↗

Architecture, performance, and implementation of the tandem banyan fast packet switch

The authors propose a space-division fast packet switch architecture based on banyan interconnection networks, called the tandem banyan switching fabric. It consists of placing banyan networks in tandem, offering multiple paths from each input to each output, thus overcoming in a very simple way the effect of conflicts among packets (to which banyan networks are prone) and achieving output buffering. From a hardware implementation perspective, this architecture is simple in that it consists of several instances of only two VLSI chips, one implementing the banyan network and the other implementing the output buffer function. The basic structure and operation of the tandem banyan switching fabric are described, and its performance is discussed. The authors propose a modification to the basic structure which decreases the hardware complexity of the switch while maintaining its performance. An implementation of the banyan network using a high-performance BiCMOS sea-of-gates on 0.8-micron technology is reported.

Tobagi, Fouad A.↗

An analysis of I/O efficient order-statistic-based techniques for noise power estimation in the HRMS sky survey's operational system

Noise power estimation in the High-Resolution Microwave Survey (HRMS) sky survey element is considered as an example of a constant false alarm rate (CFAR) signal detection problem. Order-statistic-based noise power estimators for CFAR detection are considered in terms of required estimator accuracy and estimator dynamic range. By limiting the dynamic range of the value to be estimated, the performance of an order-statistic estimator can be achieved by simpler techniques requiring only a single pass of the data. Simple threshold-and-count techniques are examined, and it is shown how several parallel threshold-and-count estimation devices can be used to expand the dynamic range to meet HRMS system requirements with minimal hardware complexity. An input/output (I/O) efficient limited-precision order-statistic estimator with wide but limited dynamic range is also examined.

Zimmerman, G. A.↗

High-performance network and channel based storage

In the traditional mainframe-centered view of a computer system, storage devices are coupled to the system through complex hardware subsystems called I/O channels. With the dramatic shift toward workstation-based computing, and its associated client/server model of computation, storage facilities are now found attached to file servers and distributed throughout the network. In this paper, we discuss the underlying technology trends that are leading to high-performance network-based storage, namely advances in networks, storage devices, and I/O controller and server architectures. We review several commercial systems and research prototypes that are leading to a new approach to high-performance computing based on network-attached storage.

Katz, Randy H.↗