Results for “microcontroller” — Page 3

NASA NTRS2007

A One Chip Hardened Solution for High Speed SpaceWire System Implementations. Session: Components

An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASIC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a router with 4 SpaceWire ports and two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, and a memory controller for additional external memory use. The SpaceWire cores are also reused in other ASICs under development. The SpaceWire ASIC is planned for use on the Geostationary Operational Environmental Satellites (GOES)-R, the Lunar Reconnaissance Orbiter (LRO) and other missions. Engineering and flight parts have been delivered to programs and users. This paper reviews the SpaceWire protocol and those elements of it that have been built into the current and next SpaceWire reusable cores and features within the core that go beyond the current standard and can be enabled or disabled by the user. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be reviewed and highlighted. Optional configurations within user systems and test boards will be shown. The physical implementation of the design will be described and test results from the hardware will be discussed. Application of this ASIC and other ASICs containing the SpaceWire cores and embedded microcontroller to Plug and Play and reconfigurable implementations will be described. Finally, the BAE Systems roadmap for SpaceWire developments will be updated, including some products already in design as well as longer term plans.

Marshall, Joseph R.↗

NASA NTRS2010

Smart Power Supply for Battery-Powered Systems

A power supply for battery-powered systems has been designed with an embedded controller that is capable of monitoring and maintaining batteries, charging hardware, while maintaining output power. The power supply is primarily designed for rovers and other remote science and engineering vehicles, but it can be used in any battery alone, or battery and charging source applications. The supply can function autonomously, or can be connected to a host processor through a serial communications link. It can be programmed a priori or on the fly to return current and voltage readings to a host. It has two output power busses: a constant 24-V direct current nominal bus, and a programmable bus for output from approximately 24 up to approximately 50 V. The programmable bus voltage level, and its output power limit, can be changed on the fly as well. The power supply also offers options to reduce the programmable bus to 24 V when the set power limit is reached, limiting output power in the case of a system fault detected in the system. The smart power supply is based on an embedded 8051-type single-chip microcontroller. This choice was made in that a credible progression to flight (radiation hard, high reliability) can be assumed as many 8051 processors or gate arrays capable of accepting 8051-type core presently exist and will continue to do so for some time. To solve the problem of centralized control, this innovation moves an embedded microcontroller to the power supply and assigns it the task of overseeing the operation and charging of the power supply assets. This embedded processor is connected to the application central processor via a serial data link such that the central processor can request updates of various parameters within the supply, such as battery current, bus voltage, remaining power in battery estimations, etc. This supply has a direct connection to the battery bus for common (quiescent) power application. Because components from multiple vendors may have differing power needs, this supply also has a secondary power bus, which can be programmed a priori or on-the-fly to boost the primary battery voltage level from 24 to 50 V to accommodate various loads as they are brought on line. Through voltage and current monitoring, the device can also shield the charging source from overloads, keep it within safe operating modes, and can meter available power to the application and maintain safe operations.

Krasowski, Michael J.↗

NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗

NASA NTRS2010

High-Altitude Hydration System

Three methods are being developed for keeping water from freezing during high-altitude climbs so that mountaineers can remain hydrated. Three strategies have been developed. At the time of this reporting two needed to be tested in the field and one was conceptual. The first method is Passive Thermal Control Using Aerogels. This involves mounting the fluid reservoir of the climber s canteen to an inner layer of clothing for better heat retention. For the field test, bottles were mounted to the inner fleece layer of clothing, and then aerogel insulation was placed on the outside of the bottle, and circumferentially around the drink straw. When climbers need to drink, they can pull up the insulated straw from underneath the down suit, take a sip, and then put it back into the relative warmth of the suit. For the field test, a data logger assessed the temperatures of the water reservoir, as well as near the tip of the drink straw. The second method is Passive Thermal Control with Copper-Shielded Drink Straw and Aerogels, also mounted to inner layers of clothing for better heat retention. Braided wire emanates from the inside of the fleece jacket layer, and continues up and around the drink straw in order to use body heat to keep the system-critical drink straw warm enough to keep water in the liquid state. For the field test, a data logger will be used to compare this with the above concept. The third, and still conceptual, method is Active Thermal Control with Microcontroller. If the above methods do not work, microcontrollers and tape heaters have been identified that could keep the drink straw warm even under extremely cold conditions. Power requirements are not yet determined because the thermal environment inside the down suit relative to the external environment has not been established. A data logger will be used to track both the external and internal temperatures of the suit on a summit day.

Parazynski, Scott E.↗

NASA NTRS2004

Eight-Channel Continuous Timer

A custom laboratory electronic timer circuit measures the durations of successive cycles of nominally highly stable input clock signals in as many as eight channels, for the purpose of statistically quantifying the small instabilities of these signals. The measurement data generated by this timer are sent to a personal computer running software that integrates the measurements to form a phase residual for each channel and uses the phase residuals to compute Allan variances for each channel. (The Allan variance is a standard statistical measure of instability of a clock signal.) Like other laboratory clock-cycle-measuring circuits, this timer utilizes an externally generated reference clock signal having a known frequency (100 MHz) much higher than the frequencies of the input clock signals (between 100 and 120 Hz). It counts the number of reference-clock cycles that occur between successive rising edges of each input clock signal of interest, thereby affording a measurement of the input clock-signal period to within the duration (10 ns) of one reference clock cycle. Unlike typical prior laboratory clock-cycle-measuring circuits, this timer does not skip some cycles of the input clock signals. The non-cycle-skipping feature is an important advantage because in applications that involve integration of measurements over long times for characterizing nominally highly stable clock signals, skipping cycles can degrade accuracy. The timer includes a field-programmable gate array that functions as a 20-bit counter running at the reference clock rate of 100 MHz. The timer also includes eight 20-bit latching circuits - one for each channel - at the output terminals of the counter. Each transition of an input signal from low to high causes the corresponding latching circuit to latch the count at that instant. Each such transition also sets a status flip-flop circuit to indicate the presence of the latched count. A microcontroller reads the values of all eight status flipflops and then reads the latched count for each channel for which the flip-flop indicates the presence of a count. Reading the count for each channel automatically causes the flipflop of that channel to be reset. The microcontroller places the counts in time order, identifies the channel number for each count, and transmits these data to the personal computer.

Cole, Steven↗

NASA NTRS2012

Human grasp assist device and method of use

A grasp assist device includes a glove portion having phalange rings, contact sensors for measuring a grasping force applied by an operator wearing the glove portion, and a tendon drive system (TDS). The device has flexible tendons connected to the phalange rings for moving the rings in response to feedback signals from the sensors. The TDS is connected to each of the tendons, and applies an augmenting tensile force thereto via a microcontroller adapted for determining the augmenting tensile force as a function of the grasping force. A method of augmenting a grasping force of an operator includes measuring the grasping force using the sensors, encoding the grasping force as the feedback signals, and calculating the augmenting tensile force as a function of the feedback signals using the microcontroller. The method includes energizing at least one actuator of a tendon drive system (TDS) to thereby apply the augmenting tensile force.

Linn, Douglas Martin↗

NASA NTRS2012

Modular Integrated Stackable Layers (MISL) 1.1 Design Specification

This document establishes the design guideline of the Modular Instrumentation Data Acquisition (MI‐DAQ) system in utilization of several designs available in EV. The MI‐ DAQ provides the options to the customers depending on their system requirements i.e. a 28V interface power supply, a low power battery operated system, a low power microcontroller, a higher performance microcontroller, a USB interface, a Ethernet interface, a wireless communication, various sensor interfaces, etc. Depending on customer's requirements, the each functional board can be stacked up from a bottom level of power supply to a higher level of stack to provide user interfaces. The stack up of boards are accomplished by a predefined and standardized power bus and data bus connections which are included in this document along with other physical and electrical guidelines. This guideline also provides information for a new design options. This specification is the product of a collaboration between NASA/JSC/EV and Texas A&M University. The goal of the collaboration is to open source the specification and allow outside entities to design, build, and market modules that are compatible with the specification. NASA has designed and is using numerous modules that are compatible to this specification. A limited number of these modules will also be released as open source designs to support the collaboration. The released designs are listed in the Applicable Documents.

Yim, Hester J.↗

NASA NTRS2013

Small Payload Launch Integrated Testing Services (SPLITS) - SPSDL

My experience working on the Small Payload Launch Integrated Testing Services project has been both educational and rewarding. I have been given the opportunity to work on and experiment with a number of exciting projects and initiatives, each offering different challenges and opportunities for teamwork and collaboration. One of my assignments is to aid in the design and construction of a small-scale two stage rocket as part of a Rocket University initiative. My duties include programming a microcontroller to control the various sensors on the rocket as well as process and transmit data. Additionally, I am writing a graphical user interface application for the ground station that will receive the transmitted data from the rocket and display the information on screen along with a 3D rendering displaying the rocket orientation. Another project I am working on is to design and develop the avionics that will be used to control a high altitude balloon flight that will test a sensor called a Micro Dosimeter that will measure the total ionizing dose absorbed by electrical components during a flight. This includes assembling and soldering the various sensors and components, programming a microcontroller to input and process data from the Micro Dosimeter, and transmitting the data down to a ground station as well as save the data to an on-board SD card. Additionally, I am aiding in the setup and development of ITOS (Integrated Test and Operations System) capability in the SPSDL (Spaceport Processing System Development Lab).

Intern↗

NASA NTRS2016

Usable Translational Hand Controllers for NASA's Habitability Design Center

This summer I was given the opportunity to work at the Habitability Design Center (HDC). NASA Johnson Space Center's HDC is currently developing Cislunar and Mars spacecraft mockups. I contributed to this effort by designing from scratch low cost, functional translational hand controllers (THCs) that will be used in spacecraft mission simulation in low to medium fidelity exploration spacecraft mockups. This project fell under the category of mechatronics, a combination of mechanical, electrical, and computer engineering. Being an aerospace engineering student, I was out of my comfort zone. And that was a wonderful thing. The autonomy that my mentor, Dr. Robert Howard, allowed me gave me the opportunity to learn by trying, failing, and trying again. This project was not only a professional success for me, but a significant learning experience. I appreciated the freedom that I had to take the time to learn new things for myself rather than blindly follow instructions. I was the sole person working on this project, and was required to work independently to solve the many hardware and software challenges that the project entailed. I researched THCs that have been used on the ISS, the Space Shuttle, and the Orion MPVC and based my design off of these. I worked through many redesigns before finding an optimal configuration of the necessary mechanisms and electrical components for the THC. Once I had a functional hardware design, I dove into the challenge of getting an Arduino Uno, an extremely low cost and easily programmable microcontroller, to behave as a human interface device. The THCs I built needed to be able to integrate to a mission simulation designed by NASA's Graphics and Visualization Lab. This proved to be the most challenging aspect of the project. To accomplish this I learned how to change the firmware of the USB serial converter microcontroller. The process was very complicated as it involved multiple software programs and manual flashing of pins on the Arduino itself. When I successfully achieved the goal I wrote an instructions manual for the process so that the HDC will be able to do this easily in the future for any human interface device they may want to create. I also created a detailed CAD model of my THC design with construction instructions. My THC utilizes three ultrasonic sensors, one for each axis of motion. I wrote a code that stimulates these sensors continuously and feeds back values from each axis ranging from -%100 to %100 of the min/max position in relation to the neutral position of each axis. This was the data that the Graphics and Visualization Lab required to interface with their simulation. I truly enjoyed working in the HDC surrounded by passionate, proactive, and brilliantly creative people. I felt valued and respected as a part of their team. I was given the time and support of my mentor whenever I asked for it. Beyond my positive project experience, I was fortunate enough to be able to take advantage of many of the extra activities that JSC has to offer. I took Russian Phase One during my lunch break every day and can now read Russian and accomplish basic verbal communication. I was heavily involved with the co-tern music video, which led to numerous incredible experiences and friendships. I saw every facility, attended every lecture, and met everyone that I could. I had coffee with Lauri Hansen. I played on an intern volleyball team at the Gilruth. I traveled to Michoud, Stennis, NOLA, and Big Bend National Park. I had the time of my life and I fell in love with JSC. In the next month I will return to Maryland and start my senior year of my undergraduate degree. As I work through it I will remember that all of the studying I do, all of the concentration I give, and all of the sacrifices that I make for school are so that I can work at a place like JSC where I am proud and excited to go into work every day. This internship was an invaluable experience for me, both professionally and personally.

Westbrook, Kimberly↗

NASA NTRS2017

Advanced Wireless Sensor Nodes - MSFC

NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.

Varnavas, Kosta↗

NASA NTRS2017

IMAPS Device Packaging Conference 2017 - Engineered Micro Systems & Devices Track

NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.

Varnavas, Kosta↗

NASA NTRS2023

Development of Two High-Energy Bus ‘Cores’ for Rapid Support of Low-TRL and Educational Payloads: A Software-Configured EPS Combined with Flexible C&DH

For several years the TechEdSat flight series (TES-n), developed by the Nano Orbital Workshop (NOW) group at NASA Ames, has relied upon an in-house developed unit to serve both EPS (Electrical Power System) and C&DH (Command and Data Handling) roles along with low data-rate telemetry functions, i.e., serving as the ‘core’ of the spacecraft bus. This ‘core’ has a considerable task given the rapid cadence of the TES program and the typically low-TRL of payloads; configurability and compatibility are key to prevent mission-specific hardware. However, at only 15 watts the current core has become insufficient to support the program’s growing missions and increasingly demanding payloads. To this end, the NOW program is developing new cores to support two TES mission classes: a single-PCB ‘MiniCore’ designed to support 80-watt missions 6U or smaller in LEO, and a three-PCB, radiation-tolerant ‘StackCore’ designed to support 6U and larger missions over 500 watts in LEO and beyond. The ‘MiniCore’ design consists of three main segments: a processor-agnostic C&DH, a software-configured EPS, and a backup low data-rate radio. The design philosophy was to enable rapid-manufacture in a turbulent supply chain, hence the design consists of COTS parts with a focus on those able to be drop-in replaced with radiation-tolerant versions when demanded by the mission. As a single PC-104 sized circuit board, power density and ease of integration also dominated design, demanding the use of modern features such as single-point USB-C for easy charging and monitoring of the spacecraft on the ground. The ‘MiniCore’ can support 80 watts of load, 140 watt-hours of storage, and over 20 watts of optimized solar generation with extensive power monitoring throughout. The ‘MiniCore’ supports one battery pack, six solar-panels, six loads, five actuators, Iridium SBD, and an internal 802.15.4 network. Additionally, the processor-agnostic design can accept any PJRC Teensy 3.x or Adafruit Feather microcontroller unit to enable processor scaling with mission requirements or environment. It is expected a development unit of this design will be completed before conference. The ‘StackCore’ design consists of three stacked PC-104 sized circuit boards: one dedicated to power generation and storage, one dedicated to power distribution, and one dedicated to C&DH tasks. This delineation is necessary to support the transition from highly integrated ICs to discrete analog circuitry, enabling a primarily analog control power system able to operate without software in a radiation environment with finer monitoring compared to the ‘MiniCore’ design. The planned base architecture supports over 500 watts of load, 250 watt-hours of storage, and over 80 watts of optimized solar generation. The power distribution board allows for the use of daughter cards hosting custom converters or interfaces for payloads, in addition to the software-configured supplies used on the ‘MiniCore’. This core stack will be managed by a Vorago ARM M4 microcontroller and support the same wireless communications as the ‘MiniCore’, with optional integration of a NOW S-band radio and attitude determination sensors for ‘black box’ functionality. It is expected the prototype will still be in development during conference.

Spacecraft↗

NASA NTRSDate not supplied

Development of Two High-Energy Bus ‘Cores’ for Rapid Support of Low-TRL and Educational Payloads: A Software-Configured EPS Combined with Flexible C&DH

For several years the TechEdSat flight series (TES-n), developed by the Nano Orbital Workshop (NOW) group at NASA Ames, has relied upon an in-house developed unit to serve both EPS (Electrical Power System) and C&DH (Command and Data Handling) roles along with low data-rate telemetry functions, i.e., serving as the ‘core’ of the spacecraft bus. This ‘core’ has a considerable task given the rapid cadence of the TES program and the typically low-TRL of payloads; configurability and compatibility are key to prevent mission-specific hardware. However, at only 15 watts the current core has become insufficient to support the program’s growing missions and increasingly demanding payloads. To this end, the NOW program is developing new cores to support two TES mission classes: a single-PCB ‘MiniCore’ designed to support 80-watt missions 6U or smaller in LEO, and a three-PCB, radiation-tolerant ‘StackCore’ designed to support 6U and larger missions over 500 watts in LEO and beyond. The ‘MiniCore’ design consists of three main segments: a processor-agnostic C&DH, a software-configured EPS, and a backup low data-rate radio. The design philosophy was to enable rapid-manufacture in a turbulent supply chain, hence the design consists of COTS parts with a focus on those able to be drop-in replaced with radiation-tolerant versions when demanded by the mission. As a single PC-104 sized circuit board, power density and ease of integration also dominated design, demanding the use of modern features such as single-point USB-C for easy charging and monitoring of the spacecraft on the ground. The ‘MiniCore’ can support 80 watts of load, 140 watt-hours of storage, and over 20 watts of optimized solar generation with extensive power monitoring throughout. The ‘MiniCore’ supports one battery pack, six solar-panels, six loads, five actuators, Iridium SBD, and an internal 802.15.4 network. Additionally, the processor-agnostic design can accept any PJRC Teensy 3.x or Adafruit Feather microcontroller unit to enable processor scaling with mission requirements or environment. It is expected a development unit of this design will be completed before conference. The ‘StackCore’ design consists of three stacked PC-104 sized circuit boards: one dedicated to power generation and storage, one dedicated to power distribution, and one dedicated to C&DH tasks. This delineation is necessary to support the transition from highly integrated ICs to discrete analog circuitry, enabling a primarily analog control power system able to operate without software in a radiation environment with finer monitoring compared to the ‘MiniCore’ design. The planned base architecture supports over 500 watts of load, 250 watt-hours of storage, and over 80 watts of optimized solar generation. The power distribution board allows for the use of daughter cards hosting custom converters or interfaces for payloads, in addition to the software-configured supplies used on the ‘MiniCore’. This core stack will be managed by a Vorago ARM M4 microcontroller and support the same wireless communications as the ‘MiniCore’, with optional integration of a NOW S-band radio and attitude determination sensors for ‘black box’ functionality. It is expected the prototype will still be in development during conference.

Spacecraft↗

NASA NTRS2022

Power Converter Design for the Europa Lander Motor Controller

This paper will outline the design and test results for the Europa Lander motor controller’s Power Conversion Slice. Europa Lander is a proposed NASA mission concept to send a stationary spacecraft to Jupiter’s Icy Moon, Europa, to search for subsurface biosignatures. The Power Conversion Card is one of the many technologies designed for this mission. The Power Conversion Card’s primary function is to convert the power supplied by the spacecraft battery to usable power for use within the motor controller. In addition, this card provides power system telemetry to the spacecraft computer. This card tolerates Europa’s harsh radiation environment within a protected vault to enable it to survive the external temperatures which can be as low as -184°C during the three-week mission. This design makes use of multiple commercially available radiation hardened electronics, including Cobham’s UT32M0R500 Arm Microcontroller along with VPT’s DC-DC Converters for power conversion. The microcontroller is used to collect local power system telemetry and assess card health autonomously without intervention from the spacecraft’s main computer. This paper will showcase the design behind the prototype and electrical testing results.

Lias, Malcolm↗

NASA NTRSDate not supplied

Development of Two High-Energy Bus ‘Cores’

For several years the TechEdSat flight series (TES-n), developed by the Nano Orbital Workshop (NOW) group at NASA Ames, has relied upon an in-house developed unit to serve both EPS (Electrical Power System) and C&DH (Command and Data Handling) roles along with low data-rate telemetry functions, i.e., serving as the ‘core’ of the spacecraft bus. This ‘core’ has a considerable task given the rapid cadence of the TES program and the typically low-TRL of payloads; configurability and compatibility are key to prevent mission-specific hardware. However, at only 15 watts the current core has become insufficient to support the program’s growing missions and increasingly demanding payloads. To this end, the NOW program is developing new cores to support two TES mission classes: a single-PCB ‘MiniCore’ designed to support 80-watt missions 6U or smaller in LEO, and a three-PCB, radiation-tolerant ‘StackCore’ designed to support 6U and larger missions over 500 watts in LEO and beyond. The ‘MiniCore’ design consists of three main segments: a processor-agnostic C&DH, a software-configured EPS, and a backup low data-rate radio. The design philosophy was to enable rapid-manufacture in a turbulent supply chain, hence the design consists of COTS parts with a focus on those able to be drop-in replaced with radiation-tolerant versions when demanded by the mission. As a single PC-104 sized circuit board, power density and ease of integration also dominated design, demanding the use of modern features such as single-point USB-C for easy charging and monitoring of the spacecraft on the ground. The ‘MiniCore’ can support 80 watts of load, 140 watt-hours of storage, and over 20 watts of optimized solar generation with extensive power monitoring throughout. The ‘MiniCore’ supports one battery pack, six solar-panels, six loads, five actuators, Iridium SBD, and an internal 802.15.4 network. Additionally, the processor-agnostic design can accept any PJRC Teensy 3.x or Adafruit Feather microcontroller unit to enable processor scaling with mission requirements or environment. It is expected a development unit of this design will be completed before conference. The ‘StackCore’ design consists of three stacked PC-104 sized circuit boards: one dedicated to power generation and storage, one dedicated to power distribution, and one dedicated to C&DH tasks. This delineation is necessary to support the transition from highly integrated ICs to discrete analog circuitry, enabling a primarily analog control power system able to operate without software in a radiation environment with finer monitoring compared to the ‘MiniCore’ design. The planned base architecture supports over 500 watts of load, 250 watt-hours of storage, and over 80 watts of optimized solar generation. The power distribution board allows for the use of daughter cards hosting custom converters or interfaces for payloads, in addition to the software-configured supplies used on the ‘MiniCore’. This core stack will be managed by a Vorago ARM M4 microcontroller and support the same wireless communications as the ‘MiniCore’, with optional integration of a NOW S-band radio and attitude determination sensors for ‘black box’ functionality. It is expected the prototype will still be in development during conference.

Avery Brock↗

DOE OSTI2026

Graphical User Interface for a Biasing Board for the PSEC6

The PSEC6 is an application-specific integrated circuit (ASIC) designed for a readout system for a large area picosecond photodetector (LAPPD). The PSEC6 is currently in fabrication and pending testing. The testing system for the PSEC5, the previous iteration of the ASIC, required expensive and non-portable equipment, because the ASIC needs twelve adjustable reference voltages. The new testing system consists of an low-cost, open-source, cross-platform graphical user interface (GUI), a digital system, and a biasing board. The digital system is the interface between the GUI and biasing board, and can be implemented on a microcontroller or field-programmable gate array (FPGA). The biasing board contains twelve digital-to-analog converters (DACs) that are configurable via the GUI, which gives users the ability to write voltage values to all or specific DACs. The GUI was developed in C on Linux using the widget library GTK4 and cross-compiled for Windows compatibility. I2C and SPI protocols were implemented on an Adafruit Feather ESP32-S3 microcontroller to write commands to the DACs and PSEC6. A hardware implementation of the I2C protocol is in development on an FPGA. Since LAPPDs will be used by the Accelerator Neutrino Neutron Interaction Experiment (ANNIE) at Fermilab, the PSEC6 testing system in this internship project can potentially benefit future neutrino research. The project is relevant to the Department of Energy’s microelectronics mission, because the PSEC6 is an ASIC that will handle fast time signals arriving from the detector for readout. It also provided experience with building a cross-platform user interface, practicing digital design and implementation in hardware description language (HDL), and using simulations to inform new design iterations.

Guerrero, Sasha Camila [North Central Coll.]↗

DOE OSTI2026

Flashlamp drive system for a high-energy 10–100 kHz pulse-burst Nd:YAG laser

We present the design of the flashlamp drive system for the NG100 laser, a 1 J/pulse, 10–100 kHz, pulse-burst Nd:YAG laser system being developed for application in a Thomson scattering plasma diagnostic. This flashlamp drive system is under active development, with a prototype now being constructed. The flashlamp drive system is modular, with each module capable of driving a series pair of linear flashlamps. Each drive module contains and is controlled by a dedicated Analog Regulator Controller. Thus each module is independently operable and controllable. This modular approach imposes no intrinsic limit to the number of modules that may be applied to drive the flashlamp pairs in a laser system. Each flashlamp drive module has a switch-regulated topology. An 1800 V main capacitor bank provides 25 kJ of energy storage, while a lower voltage output capacitor bank provides filtering and the initial energy delivered to the flashlamps at the start of the drive pulse. The main bank is recharged after each flashlamp drive pulse. As energy is drawn from the output bank by the flashlamps, an IGBT switching regulator feeds current from the main bank through an inductor to replenish the output capacitor bank. The rate of replenishment is feedback-controlled to maintain a regulated supply of power to the flashlamp load, with a setpoint range of 0.07 to 1.65 MW. An Analog Regulator Controller produces two-state variable pulse width feedback switching of the regulator IGBT. The switching frequency is ≤ 20 kHz, dynamically adjusted to limit ripple of the flashlamp power to ±3% statistical standard deviation of mean. For development or troubleshooting, each module is operable independent of the laser digital control system (microcontroller and FPGA).

Plasma diagnostics - interferometry↗

DOE OSTI2025

A High-Current Pulsed Prototype Power Supply

The Accelerator Controls Operations Research Network (ACORN) project aims to modernize the accelerator control system and replace aging power supplies at Fermilab. As part of this effort, outdated RF ferrite bias power supplies will be redesigned. These power supplies are essential for tuning the resonant frequency of RF cavities by delivering programmable current outputs of up to 2500 A and voltages ranging from −10 V to +35 V. They operate at a repetition rate of 15 Hz in the Booster ring, and 1 Hz at the Main Injector ring. The power supplies utilize a bank of transistors in the linear region, connected in parallel with the load, to actively regulate the output current from a 12-pulse SCR bridge. To support this upgrade, a new bias power supply topology was developed as proof of concept. The design utilizes an IGBT Hbridge operating in Pulse Width Modulation (PWM) mode, controlled by a microcontroller. A prototype, constructed using spare components, successfully delivered an output current of 500 A at a repetition rate of 15 Hz during initial testing. The circuit's bandwidth was measured at 480 Hz, highlighting opportunities for further optimization in the controller design to achieve the target bandwidth of 2 kHz.

Bullman, Austin [ORNL]↗