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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2008

Fault-Tolerant, Multiple-Zone Temperature Control

A computer program has been written as an essential part of an electronic temperature control system for a spaceborne instrument that contains several zones. The system was developed because the temperature and the rate of change of temperature in each zone are required to be maintained to within limits that amount to degrees of precision thought to be unattainable by use of simple bimetallic thermostats. The software collects temperature readings from six platinum resistance thermometers, calculates temperature errors from the readings, and implements a proportional + integral + derivative (PID) control algorithm that adjusts heater power levels. The software accepts, via a serial port, commands to change its operational parameters. The software attempts to detect and mitigate a host of potential faults. It is robust to many kinds of faults in that it can maintain PID control in the presence of those faults.

Granger, James↗
NASA NTRS1990

Measurement and analysis of workload effects on fault latency in real-time systems

The authors demonstrate the need to address fault latency in highly reliable real-time control computer systems. It is noted that the effectiveness of all known recovery mechanisms is greatly reduced in the presence of multiple latent faults. The presence of multiple latent faults increases the possibility of multiple errors, which could result in coverage failure. The authors present experimental evidence indicating that the duration of fault latency is dependent on workload. A synthetic workload generator is used to vary the workload, and a hardware fault injector is applied to inject transient faults of varying durations. This method makes it possible to derive the distribution of fault latency duration. Experimental results obtained from the fault-tolerant multiprocessor at the NASA Airlab are presented and discussed.

Woodbury, Michael H.↗
NASA NTRS2005

Multiple Embedded Processors for Fault-Tolerant Computing

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

Bolotin, Gary↗
NASA NTRS1989

Investigation of display issues relevant to the presentation of aircraft fault information

This research, performed as a part of NASA Langley's Faultfinder project, investigated display implementation issues related to the introduction of real time fault diagnostic systems into next generation commercial aircraft. Three major issues were investigated: visual display styles for presenting fault related information to the crew, the form the output from the expert system should take, and methods for filtering fault related information for presentation to the crew. Twenty-four flight familiar male volunteers participated as subjects. Five subjects were NASA test pilots, six were Commercial Airline Pilots, seven were Air Force Lear Jet pilots, and six were NASA personnel familiar with flight (non-pilots). Subjects were presented with aircraft subsystem information on a CRT screen. They were required to identify the subsystems presented in a display and to remember the state (normal or abnormal) of subsystem parameter information contained in the display. The results of the study indicated that in the simpler experimental test cases (i.e., those involving single subsystem failures and composite hypothesis displays) subjects' performance did not differ across the different display formats. However, for the more complex cases (i.e., those involving multiple subsystem faults and multiple hypotheses displays), subjects' performance was superior in the text- and picture-based display formats compared to the symbol-based format. In addition, the findings suggest that a layered approached to information display is appropriate.

Allen, Donald M.↗
NASA NTRS1990

Study on fault-tolerant processors for advanced launch system

Issues related to the reliability of a redundant system with large main memory are addressed. The Fault-Tolerant Processor (FTP) for the Advanced Launch System (ALS) is used as a basis for the presentation. When the system is free of latent faults, the probability of system crash due to multiple channel faults is shown to be insignificant even when voting on the outputs of computing channels is infrequent. Using channel error maskers (CEMs) is shown to improve reliability more effectively than increasing redundancy or the number of channels for applications with long mission times. Even without using a voter, most memory errors can be immediately corrected by those CEMs implemented with conventional coding techniques. In addition to their ability to enhance system reliability, CEMs (with a very low hardware overhead) can be used to dramatically reduce not only the need of memory realignment, but also the time required to realign channel memories in case, albeit rare, such a need arises. Using CEMs, two different schemes were developed to solve the memory realignment problem. In both schemes, most errors are corrected by CEMs, and the remaining errors are masked by a voter.

Shin, Kang G.↗
NASA NTRS1980

Test vectors development and optimization for a microprocessor

This paper describes a method for generating and optimizing test vectors for a microprocessor, with the aid of a fault simulator implemented entirely by hardware. The development and optimization of test vectors has been done on a tester, with the fault simulator plugged directly into the test head. The fault simulator is capable of automatically injecting over a thousand single or multiple stuck faults in the sequential and combinatorial parts of the microprocessor. The test vectors developed by a programmer working interactively with the tester were applied through the tester to the fault simulator, and the percent of faults detected was measured. The vectors were developed and optimized for the 1802 microprocessor, with the objective of detecting 100% of the single stuck faults with a minimum set of vectors. Experimental results show that 99.7% of the single stuck faults are being detected with approximately 14,000 vectors.

Timoc, C. C.↗
NASA NTRS1977

Potential damage to DC superconducting magnets due to the high frequency electromagnetic waves

Experimental data are presented in support of the hypothesis that a dc superconducting magnet coil does not behave strictly as an inductor, but as a complicated electrodynamic device capable of supporting electromagnetic waves. Travel times of nanosecond pulses and evidence of sinusoidal standing waves were observed on a prototype four-layer solenoidal coil at room temperature. Ringing observed during switching transients appears as a sequence of multiple reflected square pulses whose durations are related to the layer lengths. With sinusoidal excitation of the coil, the voltage amplitude between a pair of points on the coil exhibits maxima at those frequencies such that the distance between these points is an odd multiple of half wavelength in free space. Evidence indicates that any disturbance, such as that resulting from switching or sudden fault, initiates multiple reflections between layers, thus raising the possibility for sufficiently high voltages to cause breakdown.

Gabriel, G. J.↗
NASA NTRS1990

Health Monitoring System for the SSME-fault detection algorithms

A Health Monitoring System (HMS) Framework for the Space Shuttle Main Engine (SSME) has been developed by United Technologies Corporation (UTC) for the NASA Lewis Research Center. As part of this effort, fault detection algorithms have been developed to detect the SSME faults with sufficient time to shutdown the engine. These algorithms have been designed to provide monitoring coverage during the startup, mainstage and shutdown phases of the SSME operation. The algorithms have the capability to detect multiple SSME faults, and are based on time series, regression and clustering techniques. This paper presents a discussion of candidate algorithms suitable for fault detection followed by a description of the algorithms selected for implementation in the HMS and the results of testing these algorithms with the SSME test stand data.

Tulpule, S.↗
NASA NTRS1990

Empirically based analysis of failures in software systems

An empirical analysis of software-system failures is used to study several specific issues in software testing, reliability analysis, and reuse. Failure data from a large software manufacturer and a NASA production environment were collected and analyzed. The systems ranged in size from 30,000 to over 100,000 lines. The results show that (1) the first 15 percent of the test cases detected 67 percent of the high-severity failures and 50 percent of all failures; (2) multiple fault-detection and testing phases may result in a significant increase in reliability or none at all; (3) composite measures of system reliability did not adequately reflect reliability at the function or component level; (4) developers were biased toward portions of systems that would be heavily tested; (5) fault-proneness of reused or modified components was 74 percent less than that of newly developed components; and (6) systems with more reused software had lower component development effort, but not lower component fault-proneness.

Selby, Richard W.↗
NASA NTRS1990

System control module diagnostic Expert Assistant

The Orbiter EXperiments (OEX) Program was established by NASA's Office of Aeronautics and Space Technology (OAST) to accomplish the precise data collection necessary to support a complete and accurate assessment of Space Transportation System (STS) Orbiter performance during all phases of a mission. During a mission, data generated by the various experiments are conveyed to the OEX System Control Module (SCM) which arranges for and monitors storage of the data on the OEX tape recorder. The SCM Diagnostic Expert Assistant (DEA) is an expert system which provides on demand advice to technicians performing repairs of a malfunctioning SCM. The DEA is a self-contained, data-driven knowledge-based system written in the 'C' Language Production System (CLIPS) for a portable micro-computer of the IBM PC/XT class. The DEA reasons about SCM hardware faults at multiple levels; the most detailed layer of encoded knowledge of the SCM is a representation of individual components and layouts of the custom-designed component boards.

Flores, Luis M.↗
NASA NTRS2011

Autonomous Dynamically Self-Organizing and Self-Healing Distributed Hardware Architecture - the eDNA Concept

This paper presents the current state of the autonomous dynamically self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application is implemented on the eDNA architecture.

self-healing hardware↗
NASA NTRS2014

Review and Analysis of Algorithmic Approaches Developed for Prognostics on CMAPSS Dataset

Benchmarking of prognostic algorithms has been challenging due to limited availability of common datasets suitable for prognostics. In an attempt to alleviate this problem several benchmarking datasets have been collected by NASA's prognostic center of excellence and made available to the Prognostics and Health Management (PHM) community to allow evaluation and comparison of prognostics algorithms. Among those datasets are five C-MAPSS datasets that have been extremely popular due to their unique characteristics making them suitable for prognostics. The C-MAPSS datasets pose several challenges that have been tackled by different methods in the PHM literature. In particular, management of high variability due to sensor noise, effects of operating conditions, and presence of multiple simultaneous fault modes are some factors that have great impact on the generalization capabilities of prognostics algorithms. More than 70 publications have used the C-MAPSS datasets for developing data-driven prognostic algorithms. The C-MAPSS datasets are also shown to be well-suited for development of new machine learning and pattern recognition tools for several key preprocessing steps such as feature extraction and selection, failure mode assessment, operating conditions assessment, health status estimation, uncertainty management, and prognostics performance evaluation. This paper summarizes a comprehensive literature review of publications using C-MAPSS datasets and provides guidelines and references to further usage of these datasets in a manner that allows clear and consistent comparison between different approaches.

Uncertainty↗
NASA NTRS2006

Fault Management Techniques in Human Spaceflight Operations

This paper discusses human spaceflight fault management operations. Fault detection and response capabilities available in current US human spaceflight programs Space Shuttle and International Space Station are described while emphasizing system design impacts on operational techniques and constraints. Preflight and inflight processes along with products used to anticipate, mitigate and respond to failures are introduced. Examples of operational products used to support failure responses are presented. Possible improvements in the state of the art, as well as prioritization and success criteria for their implementation are proposed. This paper describes how the architecture of a command and control system impacts operations in areas such as the required fault response times, automated vs. manual fault responses, use of workarounds, etc. The architecture includes the use of redundancy at the system and software function level, software capabilities, use of intelligent or autonomous systems, number and severity of software defects, etc. This in turn drives which Caution and Warning (C&W) events should be annunciated, C&W event classification, operator display designs, crew training, flight control team training, and procedure development. Other factors impacting operations are the complexity of a system, skills needed to understand and operate a system, and the use of commonality vs. optimized solutions for software and responses. Fault detection, annunciation, safing responses, and recovery capabilities are explored using real examples to uncover underlying philosophies and constraints. These factors directly impact operations in that the crew and flight control team need to understand what happened, why it happened, what the system is doing, and what, if any, corrective actions they need to perform. If a fault results in multiple C&W events, or if several faults occur simultaneously, the root cause(s) of the fault(s), as well as their vehicle-wide impacts, must be determined in order to maintain situational awareness. This allows both automated and manual recovery operations to focus on the real cause of the fault(s). An appropriate balance must be struck between correcting the root cause failure and addressing the impacts of that fault on other vehicle components. Lastly, this paper presents a strategy for using lessons learned to improve the software, displays, and procedures in addition to determining what is a candidate for automation. Enabling technologies and techniques are identified to promote system evolution from one that requires manual fault responses to one that uses automation and autonomy where they are most effective. These considerations include the value in correcting software defects in a timely manner, automation of repetitive tasks, making time critical responses autonomous, etc. The paper recommends the appropriate use of intelligent systems to determine the root causes of faults and correctly identify separate unrelated faults.

O'Hagan, Brian↗
NASA NTRS1990

Reports on block rotations, fault domains and crustal deformation

Studies of block rotations, fault domains and crustal deformation in the western United States, Israel, and China are discussed. Topics include a three-dimensional model of crustal fracture by distributed fault sets, distributed deformation and block rotation in 3D, stress field rotation, and multiple strike slip fault sets.

Nur, Amos↗
NASA NTRS1986

Investigation of advanced fault insertion and simulator methods

The cooperative agreement partly supported research leading to the open-literature publication cited. Additional efforts under the agreement included research into fault modeling of semiconductor devices. Results of this research are presented in this report which is summarized in the following paragraphs. As a result of the cited research, it appears that semiconductor failure mechanism data is abundant but of little use in developing pin-level device models. Failure mode data on the other hand does exist but is too sparse to be of any statistical use in developing fault models. What is significant in the failure mode data is that, unlike classical logic, MSI and LSI devices do exhibit more than 'stuck-at' and open/short failure modes. Specifically they are dominated by parametric failures and functional anomalies that can include intermittent faults and multiple-pin failures. The report discusses methods of developing composite pin-level models based on extrapolation of semiconductor device failure mechanisms, failure modes, results of temperature stress testing and functional modeling. Limitations of this model particularly with regard to determination of fault detection coverage and latency time measurement are discussed. Indicated research directions are presented.

Dunn, W. R.↗
NASA NTRS2011

Cable Tester Box

Cables are very important electrical devices that carry power and signals across multiple instruments. Any fault in a cable can easily result in a catastrophic outcome. Therefore, verifying that all cables are built to spec is a very important part of Electrical Integration Procedures. Currently, there are two methods used in lab for verifying cable connectivity. (1) Using a Break-Out Box and an ohmmeter this method is time-consuming but effective for custom cables and (2) Commercial Automated Cable Tester Boxes this method is fast, but to test custom cables often requires pre-programmed configuration files, and cables used on spacecraft are often uniquely designed for specific purposes. The idea is to develop a semi-automatic continuity tester that reduces human effort in cable testing, speeds up the electrical integration process, and ensures system safety. The JPL-Cable Tester Box is developed to check every single possible electrical connection in a cable in parallel. This system indicates connectivity through LED (light emitting diode) circuits. Users can choose to test any pin/shell (test node) with a single push of a button, and any other nodes that are shorted to the test node, even if they are in the same connector, will light up with the test node. The JPL-Cable Tester Boxes offers the following advantages: 1. Easy to use: The architecture is simple enough that it only takes 5 minutes for anyone to learn how operate the Cable Tester Box. No pre-programming and calibration are required, since this box only checks continuity. 2. Fast: The cable tester box checks all the possible electrical connections in parallel at a push of a button. If a cable normally takes half an hour to test, using the Cable Tester Box will improve the speed to as little as 60 seconds to complete. 3. Versatile: Multiple cable tester boxes can be used together. As long as all the boxes share the same electrical potential, any number of connectors can be tested together.

Lee, Jason H.↗
NASA NTRS1990

Monitoring and control of spacecraft systems using procedural reasoning

Research concerned with automating the monitoring and control of spacecraft systems is discussed. In particular, the application of SRI's Procedural Reasoning System (PRS) to the handling of malfunctions in the Reaction Control System (RCS) of NASA's Space Shuttle is examined. Unlike traditional monitoring and control systems, PRS is able to reason about and perform complex tasks in a very flexible and robust manner, somewhat in the manner of a human assistant. Using various RCS malfunctions as examples (including sensor faults, leaking components, multiple alarms, and regulator and jet failures), it is shown how PRS manages to combine both goal-directed reasoning and the ability to react rapidly to unanticipated changes in its environment. In conclusion, some important issues in the design of PRS are reviewed and future enhancements are indicated.

Georgeff, Michael P.↗