Phase-locked loop with sideband rejecting properties Patent
Phase locked loop with sideband rejecting properties in continuous wave tracking radar
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Phase locked loop with sideband rejecting properties in continuous wave tracking radar
Optimum signals for phase locked or delay locked loops determined as function of signal to noise ratio
Multiple-input servosystem in which a primary phase-locked loop is controlled by combined signals of fm and pm communication system
Reproducible magnetic field sweep consisting of phase-locked system with digital frequency synthesizer
Unified carrier, range tracking and communications system using phase-locked loop techniques for coherent spacecraft-to-Earth communications
Rapid synchronization of phase-locked oscillators is best achieved by the swept-frequency acquisition technique, wherein the Voltage-Controlled Oscillator /VCO/ is linearly swept through the uncertainty band. The theoretically predicted sweep rates of this technique and the observed experimental results differ by less than seven percent.
Phase-locked oscillator system employing solid state components acts as a single-sideband modulator to accurately reproduce phase information in 2-Mc signals. This system is useful in telemetry, aircraft communications and position-finding stations, and VHF test circuitry.
Phase-locked loop used as frequency control system for ultrasonic transducer
Phase-locked loops and signal processing techniques employed in vehicle tracking receiver
Wideband modulation techniques and phase-locked loop studies for airborne range and orbit determination system
Phase-locking scheme for frequency-stabilized gas laser oscillators
Probability distribution of time to first loss of lock investigated by second order phase-locked loop - spacecraft telemetry and command
Intermodulation distortion of phase-locked loop demodulator as influenced by system parameters
Phase-locked loop operation in multipath environment and multipath effect on detection for Mars probe
A phase-locked loop designed with all-digital circuitry which avoids certain problems, and a digital voltage controlled oscillator algorithm are described. The system operates synchronously and performs all required digital calculations within one sampling period, thereby performing as a real-time special-purpose computer. The SNR ratio is computed for frequency offsets and sinusoidal modulation, and experimental results verify the theoretical calculations.
Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.
An interconnection algorithm is presented for achieving clock synchronization in a multiprocessor system. The system is assumed to be maliciously faulty, i.e., some processors are out of synchronization and lie about their clock state to other intragroup or intergroup processors. A phase-locked clock network design is proposed which groups the clocks in the system into diverse clusters. The clusters are then treated as single clock units from the perspective of the network. The algorithm minimizes the number of interconnections while permitting synchronization of large multiprocessor systems controlling time-critical applications such as aircraft, nuclear reactors and industrial processes.