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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Improved Double Pulse Test for Accurate Dynamic Characterization of Medium Voltage SiC Devices

This article presents an improved double pulse test (DPT) for accurate dynamic characterization of the medium voltage (MV) silicon carbide device. The difference between low voltage (LV) and MV DPT setup grounding is first introduced, which results in different measurement considerations. Then, parasitic capacitances in the DPT and their impact on the DPT are discussed considering different grounding points and device connections. Approaches are proposed to minimize the impact of parasitic capacitances on DPT results. In addition, the impact of switching V-I timing alignment on the testing results is discussed, compared to that in the LV DPT; a V-I alignment approach is introduced for the MV DPT. A 10 kV/20 A SiC mosfet -based DPT is taken as an example of the improved DPT, and test results show that it can minimize the impact from parasitic and improve the accuracy of the device switching loss estimation.

42 ENGINEERING↗
DOE OSTI2025

Electronic Melting of Silicon in Nanostructures using X-ray Forbidden Bragg Reflections

Abstract We carried out a short beamtime at the Pohang Accelerator Laboratory x-ray Free Electron Laser to perform a pump-probe (PP) laser excitation diffraction experiment on the silicon (222) forbidden Bragg peak. To limit the x-ray penetration, we used a “device layer” silicon film wafer bonded to a silicon substrate. The sample, specially fabricated by MEMC Electronic Materials, had a Si(100) substrate bonded to a 170 nm Si(100) film rotated at 45° for crystallographic isolation. A second sample was reactive-ion-etched down to 52 nm thickness. In the silicon lattice, the covalent bonds are seen exclusively at the 222 reflection. Upon laser excitation, these electrons are expected to be excited to the valence band on femtosecond electronic time scales. The Si(222) reflection is therefore expected to be extinguished on this fast time scale, while the electron–phonon coupled acoustic response is determined by the lattice dynamics. The latter is determined by the speed of sound over the device thickness, which is in the mid-picosecond range.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2024

Nanomanufacturing of Nanophononic Devices: Ultra-high ZT Thermoelectrics for Efficient Conversion of Waste Heat

Fabrication and Characterization Summary: For this program, the team fabricated and tested silicon thermoelectric test structures that experimentally demonstrated record thermal conductivity reduction (> 85 %) without changes in electrical properties (conductivity and Seebeck coefficient). We also demonstrated the highest ever reported energy conversion efficiency for silicon thermoelectric devices. The team developed a design for 1 cm 2 die with thousands of nanophononic metamaterial structures in the form of nanowalled membranes but were unable to solve all fabrication challenges before the end of the program. Multiple aspects of the design were submitted for patent protection. Primary challenges were related to silicon-on-insulator material quality and high-aspect-ratio etching.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2020

Busbar Design and Optimization for Voltage Overshoot Mitigation of a Silicon Carbide High-Power Three-Phase T-Type Inverter

The silicon carbide (SiC) devices have faster switching speed than that of the conventional silicon (Si) devices, which however may cause excessive device voltage overshoot. Larger gate resistance can help to restrain the overshoot, it however slows down the switching speed and increases switching losses. There are other methods that can mitigate the voltage overshoot, e.g., using low-inductance busbars, adding snubber circuits, etc. In this article, the busbar design for a 250-kW SiC three-level T-type inverter is investigated. The current commutation loops (CCLs) are first analyzed using a single-phase equivalent circuit. Then the detailed busbar design methods, especially a 3-D busbar design concept, are proposed to select the optimal stacking order for the multilayer laminated busbar and to address constraints posed by the physical terminal arrangements of SiC modules and dc-link capacitors. The stray inductance in each CCL is extracted via a finite element analysis and validated on the actual inverter busbar prototypes using an impedance analyzer. To further minimize the busbar stray inductance, a hybrid busbar structure with printed circuit board based buffer circuit using high-frequency decoupling capacitors is designed and evaluated in this article. Lastly, the effectiveness of the designed busbars as well as the buffer circuit are validated using experimental studies.

42 ENGINEERING↗
DOE OSTI2021

Study of an Integration Platform Based on an Adiabatic Active-Layer Waveguide Connection for InP Photonic Device Integration Mirroring That of Heterogeneous Integration on Silicon

In this work, a photonic device integration platform capable of integration of active-passive InP-based photonic devices without the use of material regrowth is introduced. The platform makes use of an adiabatic active-layer waveguide connection (ALWC) to move an optical beam between active and passive devices. The performance of this platform is analyzed using an example made up of four main sections: (1) a fiber coupling section for enabling vertical beam coupling from optical fiber into the photonic chip using a mode-matched surface grating with apodized duty cycles; (2) a transparent waveguide section for realizing passive photonic devices; (3) an adiabatic mode connection structure for moving the optical beam between passive and active device sections; and (4) an active device section for realizing active photonic devices. It is shown that the coupled surface grating, when added with a bottom gold reflector, can achieve a high chip-to-fiber coupling efficiency (CE) of 88.3% at 1550 nm. The adiabatic active-layer mode connection structure has an optical loss of lower than 1% (CE > 99%). The active device section can achieve an optical gain of 20 dB/mm with the use of only 3 quantum wells. The optimized structural parameters of the entire waveguide module are analyzed and discussed.

42 ENGINEERING↗
DOE OSTI2021

Wake-up and fatigue mechanisms in ferroelectric Hf 0.5 Zr 0.5 O 2 films with symmetric RuO 2 electrodes

In this work, the mechanisms leading to wake-up and fatigue in ferroelectric hafnium zirconium oxide thin film devices with symmetric RuO 2 electrodes are investigated via polarization, relative permittivity, dielectric nonlinearity, pyroelectric coefficient, and microfocus X-ray diffraction (XRD) measurements. The devices are observed to wake-up for up to 10 3 bipolar pulsed field cycles, after which fatigue occurs with the polarization approaching zero following 10 8 cycles. Wake-up is accompanied by a decrease in both high-field permittivity and hysteresis loop pinching and an increase in pyroelectric coefficient, indicating that the wake-up process involves a combination of transformations from the tetragonal to the orthorhombic phase and domain depinning from defect redistribution. Fatigue is observed to coincide with an increase in irreversible domain wall motion and a decrease in pyroelectric coefficient. Finite pyroelectric coefficients are measured on fully fatigued devices, indicating that domain pinning is a strong contributor to fatigue and that fatigued devices contain domain structures that are unable to switch under the fields applied for measurement. Microfocus XRD patterns measured on each device reveal that the phase constitution is qualitatively unaffected by the field cycling and resultant polarization fatigue. This data indicates that the wake-up process has contributions from both phase transformations and domain depinning, whereas the fatigue process is driven primarily by domain pinning, and the near-zero measured switchable polarization is actually a poled device with immobile domains. These observations provide insight into the physical changes occurring during field cycling of HfO 2 -based ferroelectrics while examining a possible oxide electrode material for silicon CMOS device implementation.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2024

Materials for Ultra‐Coherent, Mobile, Electron‐Spin Qubits

This research project has had the goal of gaining a better understanding of the physics of electrons bound to the surface of superfluid helium from both experimental and theoretical perspectives. It has particularly been aimed at two areas which had not been well studied: the relaxation and decoherence of the spin of the electrons on the helium surface and how the properties of underlying metallic layers affect the behavior of the electrons when the helium covering the metal is thin. This work is motivated in part by interest in using the spin of these electrons as a quantum bit, or qubit. Low levels of decoherence are advantageous for qubits, and moving the electrons, as one might do in a quantum processor, will be easiest if thin helium films can be employed. It had been suggested that spin decoherence should be very weak for electrons bound to superfluid He, but before this work there have been no quantitative studies of spin relaxation and decoherence. It is especially important to know how moving the electrons across the helium surface would affect their spin coherence. Calculations performed as part of this project show that the Rashba effective magnetic field, the mechanism which limits the spin coherence of mobile electrons in silicon-based devices (an actively pursued qubit technology), is exceptionally weak for electrons bound to helium. This project has identified other decoherence mechanisms which are stronger, but still weak compared to analogous silicon-based structures. Calculated spin coherence times for mobile electrons approach one day, as compared to microseconds in silicon. With coherence times of this magnitude, the spin qubit errors on helium will be completely dominated by errors in the quantum gates. In related work, the possibility of using an artificial spin-orbit interaction (a gradient magnetic field) for quantum operations on the electrons spins was considered. The calculations show that a moderate gradient field, small enough to be generated by a narrow superconducting wire, will enable high-fidelity quantum operations on electrons held in lithographically-defined quantum dots by driving them with a microwave electric field. The spin and motional coherence of the electrons is sufficient to allow high-fidelity 2-qubit quantum operations between electrons in neighboring quantum dots. As an outgrowth of experiments aiming to measure electron spin coherence it was discovered that very high densities of electrons can be stably supported on thin helium films coating ultra-smooth amorphous metallic layers. The measured densities are high enough that the electron system has almost certainly transitioned from an ordered array of electrons, known as a Wigner crystal (ordered by the electrons’ mutual repulsion), to a quantum fluid known as a Fermi liquid. This transition has been a subject of intense interest for over 40 years, since the electron Wigner crystal was first observed with electrons bound to superfluid helium, but it has never been unambiguously observed. Experiments are still underway in these new structures to definitively determine whether true quantum melting of the Wigner crystal has been demonstrated. This work has also catalyzed the development of a new approach for measuring the transport of electrons across very thin helium films, as will be needed for some of the quantum computing applications. The high electron density experiments as well as experiments with electrons bound in quantum dots have led to new techniques which may enable spin coherence measurements.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2024

Heterogeneous Integration Technologies for High-temperature, High-density, Low-profile Power Modules of Wide Bandgap Devices in Electric Drive Applications (Final Technical Report)

The goal of this project is to develop packaging technologies for making high-temperature, high-density, and low-profile wide-bandgap (WBG) power electronics modules for electric drives. These modules are aimed at enabling the DOE’s University Consortium to reach its 2025 inverter targets of ≥ 100 kW/L and ≤ 2.7 $/kW. The specific objectives are to: design and fabricate SiC half-bridge power modules with double-sided cooling and parasitic inductances < 5 nH, heat flux density > 400 W/cm 2 , and working junction temperature of 200 o C; design, fabricate, and deliver a gate driver with double-sided cooled modules for the construction of a 100 kW/L inverter at Oak Ridge National Lab; and design and prototype intelligent gate drivers with integrated current sensor and a low-profile DC-DC power supply with air-core transformer for testing power modules at 200 o C junction temperature. We followed an iterative technical approach of design, simulation, fabrication, and testing of various versions of modules, current sensors, and power supply. The state-of-the-art silicon carbide devices rated at 1.2 kV and 149 A were packaged by sintered-silver bonding on an aluminum nitride direct-bond-copper substrate for high thermal conductivity, high working temperature, and high joint reliability. Porous silver posts were used to interconnect the device’s source pads to the other direct-bond-copper substrate for low mechanical stresses, ease of manufacturing, and double-sided cooling. A current sensor based on package parasitic inductance was developed to measure switching current. A dynamic feedback scheme was developed to compensate the effect of parasitic resistance and temperature variation. A constant-current class-E dc-dc converter with air-core transformer was developed. Air-core transformer was used due to the unavailability of magnetic core at high temperatures. Gate driver and power supply were integrated with the double-side cooled, high temperature SiC power modules for testing the modules at 200 o C junction temperature. Double-pulse and continuous testing of the integrated technologies validated the design and fabrication of the three component technologies. Throughout the project, we overcame the challenge for design verification caused by low prototyping yield, which then helped train the graduate students, the future workforce, to learn the engineering know-how for low-cost manufacturing of reliable products. Below is a summary of the major accomplishments of this project: development of a prototyping process for fabricating double-side cooled (1200 V, 149 A) SiC phase-leg modules capable of working to 200 o C Tj; simulation and experimental verification of the improvement of thermo-mechanical reliability of the double-side cooled SiC phase-leg module by using rigid encapsulant; design and experimental validation of a current sensor based on package parasitic inductance and a compensation solution for eliminating the effect of parasitic resistance; design and experimental validation of a low-profile power supply with six-output air-core transformer for gate driver; functional demonstration of a SiC phase-leg module integrated with its gate driver, current sensor, and an air-core power supply at 200 o C Tj in a double-pulse switching test setup and Buck converter continuous test setup; successful completion of six PhD and two MS students who are or will work at Apple Inc., Tesla Inc., Wolfspeed Inc., Microchip Inc., Monolithic Power Systems Inc., and LG Magna Inc.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2020

Nonuniform Charge Collection in SiOx-Based Passivated-Contact Silicon Solar Cells

In this contribution, we report on the charge-collection characteristics of silicon photovoltaic devices using passivated contacts based on the c-Si/SiO x /poly-Si structure. Using electron-beam induced current (EBIC) imaging in plan-view and cross-section orientations, we find that charge collection in a device with a 1.5-nm-thick SiO x layer is fairly uniform in the p-n junction region and does not appear to be influenced by pyramidal surface texture. In contrast, a device with a 2.2-nm-thick oxide layer shows significant spatial variation in the charge-collection signal. The apexes of the pyramids exhibit reduced EBIC signal whereas the valleys between adjacent pyramids show the strongest collection. Our results indicate that charge collection in c-Si/SiO x /poly-Si structures can be influenced by both the properties of the SiO x layer and surface texture.

14 SOLAR ENERGY↗
DOE OSTI2020

Reactive ion etched, self-aligned, selective area poly-Si/SiO 2 passivated contacts

Front/back poly-Si/SiO 2 contact devices suffer from low short-circuit current density, J sc , due to parasitic optical absorption in the front poly-Si layer. Thin poly-Si (~20 nm) allows for high J sc but is not compatible with screen-printed fire-through contacts. We therefore study the effects of post-deposition etching of a thick poly-Si (200 nm) front layer by reactive ion etching (RIE) using the metal grid lines as a self-aligned mask. We show that passivation is maintained in the device during RIE and that J sc is increased by a gain in the blue quantum efficiency response. However, our specific etching parameters cause non-uniform etching of the poly-Si leading to premature loss of passivation without optimal gain in J sc . Etched, unpassivated layers can be re-passivated with a H-containing dielectric layer leading to a gain in Jsc, open circuit voltage, V oc , Fill-Factor, FF, and efficiency.

14 SOLAR ENERGY↗
DOE OSTI2020

Revealing the Nano-Scale Structure and Properties of Pinholes in SiOx Layers for POLO Contacts

In this contribution, we report on the charge collection characteristics of silicon photovoltaic devices with passivated contacts based on the c-Si/SiOx /poly-Si structure. Using electron-beam induced current (EBIC) imaging in plan-view and cross-section orientations, we find that charge collection in a device with a 1.5-nm-thick SiOx layer is fairly uniform in the p-n junction region and does not appear to be influenced by pyramidal surface texture. In contrast, a device with a 2.2-nm-thick oxide layer shows significant spatial variation in the charge-collection signal. The locations where we observe preferential collection of excess carriers is very sensitive to the processing conditions used to grow and breakup the SiOx passivation layer. In some cases the apexes of the pyramids exhibit reduced EBIC signal as the valleys between adjacent pyramids show the strongest collection. Other conditions yield enhanced charge collection at well defined spots on pyramid faces with no observable collection in the valleys.

EBIC↗
DOE OSTI2025

Low-Cost, Screen-Printed Silver Metal Complex Inks for Silicon Heterojunction Solar Cells

Screen printing using metal particle pastes, the current photovoltaic industry metallization standard, provides fast and reliable metal grids for silicon solar cells. Recently, metal complex or reactive metal inks are attracting research interest due to their significantly low cost and higher performance compared to traditional nanoparticle silver pastes. In this work, we demonstrate, for the first time, screen-printed high-efficiency silicon heterojunction solar cells metallized by silver metal complex inks on industrial G1-size (158.75 x 158.75 mm2) wafers. We demonstrate screen-printed Ag metal complex ink grid patterns with continuous fingers ~100-120 ..mu..m wide. The printed Ag grid is very thin (~1 ..mu..m), which is an order of magnitude thinner than the current ~20-30 ..mu..m fingers printed with low-temperature nanoparticle-based pastes. Double printing allows silicon heterojunction devices with efficiencies >20%. This is the highest efficiency so far, to our knowledge, of industrial solar cell precursors using this metallization technology. Simulation results suggested that increasing the thickness of the metal film does not significantly improve efficiency due to the dense, highly conductive films. So, a single print of ~1 ..mu..m finger would be enough to produce cells that perform similarly to a ~20 ..mu..m thick nanoparticle paste printed cells. Additionally, solar cells printed on G1 wafers with silver metal complex ink required more than 10 times less silver (~0.03 g) compared to those using silver/copper nanoparticle paste (~0.4 g of Ag). These results indicate that metal complex inks are a very promising replacement for silver nanoparticle pastes for industrial-scale metallization in an age of resource scarcity and high costs of noble metals.

14 SOLAR ENERGY↗
DOE OSTI2025

Schrödinger cat states of a nuclear spin qudit in silicon

High-dimensional quantum systems are a valuable resource for quantum information processing. They can be used to encode error-correctable logical qubits, which has been demonstrated using continuous-variable states in microwave cavities or the motional modes of trapped ions. For example, high-dimensional systems can be used to realize ‘Schrödinger cat’ states, which are superpositions of widely displaced coherent states that can be used to illustrate quantum effects at large scales. Recent proposals have suggested encoding qubits in high-spin atomic nuclei, which are finite-dimensional systems that can host hardware-efficient versions of continuous-variable codes. Here, in this study, we demonstrate the creation and manipulation of Schrödinger cat states using the spin-7/2 nucleus of an antimony atom embedded in a silicon nanoelectronic device. We use a multi-frequency control scheme to produce spin rotations that preserve the symmetry of the qudit, and we constitute logical Pauli operations for qubits encoded in the Schrödinger cat states. Our work demonstrates the ability to prepare and control non-classical resource states, which is a prerequisite for applications in quantum information processing and quantum error correction, using our scalable, manufacturable semiconductor platform.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Perovskite-driven solar C 2 hydrocarbon synthesis from CO 2

Photoelectrochemistry (PEC) presents a direct pathway to solar fuel synthesis by integrating light absorption and catalysis into compact electrodes. Yet, PEC hydrocarbon production remains elusive due to high catalytic overpotentials and insufficient semiconductor photovoltage. Here we demonstrate ethane and ethylene synthesis by interfacing lead halide perovskite photoabsorbers with suitable copper nanoflower electrocatalysts. The resulting perovskite photocathodes attain a 9.8% Faradaic yield towards C 2 hydrocarbon production at 0 V against the reversible hydrogen electrode. The catalyst and perovskite geometric surface areas strongly influence C 2 photocathode selectivity, which indicates a role of local current density in product distribution. The thermodynamic limitations of water oxidation are overcome by coupling the photocathodes to Si nanowire photoanodes for glycerol oxidation. These unassisted perovskite–silicon PEC devices attain partial C 2 hydrocarbon photocurrent densities of 155 µA cm -2 , 200-fold higher than conventional perovskite–BiVO 4 artificial leaves for water and CO 2 splitting. These insights establish perovskite semiconductors as a versatile platform towards PEC multicarbon synthesis.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2023

Automated Design-for-Reliability of a Power Electronics Module

The design of a power electronics module is a multiphysics problem and involves electrical, thermal, and reliability targets and constraints. Although the electrical and thermal design consider multiple aspects such as materials, geometry, and energy losses, reliability design is often limited to the selection of the attachment materials and electrical interconnect types. In this paper, we incorporate reliability metrics in the design phase by investigating the impact of package geometry on the thermomechanical behavior of the die-attachment material. To this end, we conducted thermal and power cycling simulations of a commercial six-pack power module with silicon carbide devices to compute junction temperature and strain energy density per cycle, respectively. We performed multiple simulations with different geometric dimensions and established a correlation between input features and output variables using subspace-based dimension reduction. The machine learning-based dimension reduction method serves as a surrogate model, which can be employed to identify the optimal module design from a thermal and reliability standpoint.

design-for-reliability↗
DOE OSTI2022

Single-Phase Dielectric Fluid Thermal Management for Power-Dense Automotive Power Electronics

This paper describes the design and performance of a dielectric fluid cooling concept for automotive power electronics. The concept combines a low-thermal-resistance package (which eliminates metalized ceramic substrates) with a high-performance convective cooling strategy (slot jets impinging on finned surfaces). Modeling was first used to design the cooling system to maximize thermal performance and minimize pumping power. Additionally, a prototype was then fabricated, and experiments were conducted to validate the model predictions using three fluids at various fluid flow rates (16.7 cm 3 /s [1 L/min] to 68.3 cm 3 /s [4.1 L/min]) and inlet temperatures (30C and 70C). The final design was compact (120-cm 3 total volume, including heat exchanger and conceptual power modules) and cooled 12 devices (e.g., silicon carbide). The validated model was then used to predict the junction-to-fluid thermal resistance and pumping power for various conditions, including 40C fluid temperature. The results predict thermal resistance values as low as 19 mm 2 K/W are possible using the dielectric fluid cooling approach. The dielectric fluid cooling system is predicted to provide thermal resistance and pumping power values that are approximately 56% and 90% lower, respectively, compared to an automotive power electronics cooling system.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2023

PCB-on-DBC GaN Power Module Design with High-Density Integration and Double-Sided Cooling

Lateral gallium nitride (GaN) high-electron-mobility transistors (HEMTs) present better electrical characteristics compared to silicon or silicon carbide devices such as high switching speed and low gate charge, but also present additional challenges on the module design. Here, this paper discusses a high-density GaN power module with double-sided cooling, low inductance, on-package decoupling capacitors, and integrated gate drivers. The GaN dies as well as the gate drive are sandwiched between the printed circuit board (PCB) and direct bonded copper (DBC) substrate to achieve compact loop and double-sided cooling effect. Design considerations and thermal performance are analyzed. A module assembly procedure is presented utilizing the layer-by-layer attachment process. Finally, a 2.7 cm x 1.8 cm half-bridge GaN power module is fabricated and tested, achieving a low power-loop inductance of 1.03 nH, and the overshoot voltage of the switching waveform is less than 5% under a 400-V/25-A double-pulse test. The thermal resistance is 0.32 K/W, verified by simulation and experimental results. The design and assembly process can be generalized and applied to high power applications to achieve high power density and high performance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗