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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗

Real-time quantum calculations of phase shifts using wave packet time delays

We present a method to extract the phase shift of a scattering process using the real-time evolution in the early and intermediate stages of the collision in order to estimate the time delay of a wave packet. This procedure is convenient when using noisy quantum computers for which the asymptotic out-state behavior is unreachable. We demonstrate that the challenging Fourier transforms involved in the state preparation and measurements can be implemented in 1+1 dimensions with current trapped ion devices and IBM quantum computers. We compare quantum computations of the time delays obtained in the one-particle quantum mechanics limit and the scalable quantum field theory formulation with accurate numerical results. We discuss the finite volume effects in the Wigner formula connecting time delays to phase shifts. The results reported involve two- and four-qubit calculations, and we discuss the possibility of larger scale computations in the near future.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Review of Teleoperator Research

A predictor display to overcome time lag problems with remote control systems is discussed. The video picture is a (necessarily) time-delayed picture from the remote location, generated as a coherent frame (snapshot) so that all picture elements in a single scan are delayed the same. The computer-generated graphics is a line drawing of the present configuration of the manipulator arm, vehicle or other device. The latter is generated by using the same control signals which are sent to the remote manipulator (device) to drive a computer model of it. The computer model is drawn on the video display in exactly the same location as where it will actually be after a one-way time delay and where it will be seen to be on the video after one round-trip time delay. If one waits at least one round-trip delay without moving, both the graphics model and the video picture of the manipulator (device) are seen to coincide. The predictor technque proved to work well and was shown for time delays in the 1-3 second range to reduce completion times for a variety of manipulation tasks by 50-150 percent reliably.

Sheridan, T. B.↗

Solid state variable time delay

Variable time delay line does not require use of a magnetic field to control a time delay, and can both amplify and delay a signal. Device is inexpensive and space saving, it does not require mecanically moving components, eliminating detrimental vibrations in a sensitive environment.

Fitzgerald, T. M.↗

A Method for Measuring the Effective Throughput Time Delay in Simulated Displays Involving Manual Control

The advent and widespread use of the computer-generated image (CGI) device to simulate visual cues has a mixed impact on the realism and fidelity of flight simulators. On the plus side, CGIs provide greater flexibility in scene content than terrain boards and closed circuit television based visual systems, and they have the potential for a greater field of view. However, on the minus side, CGIs introduce into the visual simulation relatively long time delays. In many CGIs, this delay is as much as 200 ms, which is comparable to the inherent delay time of the pilot. Because most GCIs use multiloop processing and smoothing algorithms and are linked to a multiloop host computer, it is seldom possible to identify a unique throughput time delay, and it is therefore difficult to quantify the performance of the closed loop pilot simulator system relative to the real world task. A method to address these issues using the critical task tester is described. Some empirical results from applying the method are presented, and a novel technique for improving the performance of GCIs is discussed.

Jewell, W. F.↗

Toward Integrated Operator Interface for Advanced Teleoperation under Time-Delay

This paper briefly describes an Advanced Teleoperator (ATOP) system and its control station where a variety of computer-based operator interface devices and techniques are integrated into a functional setting, accommodating a primary operator and secondary operators. Computer graphics is a key operator interface component in the control station where new types of manual interface devices also are employed. The results of some generic and applications task experiments are summarized, including the performance of a simulated remote satellite servicing task, carried out under four to eight seconds communications time delay, using satellite TV and Internet computer communication links. In conclusion, the paper highlights the lessons learned so far,.

remote control communications delay automation↗

Methods of measurement for semiconductor materials, process control, and devices

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Topics investigated include: measurements of transistor delay time; application of the infrared response technique to the study of radiation-damaged, lithium-drifted silicon detectors; and identification of a condition that minimizes wire flexure and reduces the failure rate of wire bonds in transistors and integrated circuits under slow thermal cycling conditions. Supplementary data concerning staff, standards committee activities, technical services, and publications are included as appendixes.

Bullis, W. M.↗

OPERATING EXPERIENCE AND ITS RELATIONSHIP TO EMBEDDED DIGITAL DEVICES IN SAFETY SYSTEMS

Interest in embedded digital devices (EDDs) for monitoring and providing control of components is increasing and the added functionality digital brings such as diagnostics, displays, control functions is welcomed in both the nuclear and other industries. As a result, pure analog-based components continue to disappear from the industrial I&C marketplace. Equipment with EDDs, also known by related terms such as smart devices, intelligent devices, and digital devices of limited functionality, can include sensors, breakers, priority logic modules, time delay relays, pumps, valve actuators, motor control centers, and uninterruptible power supplies. Not only is equipment consisting of analog and older digital technology being replaced with commercial grade products containing EDDs, but EDDs can also be retrofitted to work with existing components. EDDs may be installed physically within a component, such as in a relay. There are also external devices that some would not consider an EDD, but that operate in almost all technical ways identically to one internal to a component such as in a valve controller. In fact, the digital portions may be located hundreds of feet from the actual component.Due to the potential of being used in an identical manner and without alteration from their application in other industries, operating experience (OpE) for EDDs may be much more applicable than in the case of other more system level devices. Clear separation and independence of functionality provided with EDDs may also allow greater applicability of existing OpE from industry for changes that can be shown not to affect its safety function. However, OpE also demonstrates issues with different conditions between other industries and nuclear power plants, such as issues with undeclared changes or undeclared digital devices and the new failure modes they may introduce, issues with the reporting of OpE in industry, and a lack of transparency into OpE for EDDs.Understanding and addressing these issues will be key in the future use of EDDs in nuclear power plants, but failure rate data is difficult to obtain for EDDs, and lessons learned from the use of EDDs are difficult to collect and identify.Key words: embedded digital device, smart device, operating experience, failure modes

Muhlheim, Michael↗

The charge-flow transistor - A new MOS device

A new device, the charge-flow transistor (CFT), has been developed to achieve integrated MOS compatibility in sensor applications, such as gas, humidity, and fire detection, where one is interested in monitoring the transverse resistance of a thin film. The resistive material is incorporated into the gate structure of the CFT in such a way that there is a time delay between the application of the gate-to-source voltage and the appearance of a complete channel. This time delay depends on the resistivity of the thin film. A theory of device operation is presented, together with experimental results on the first CFT's. These results confirm the principles of operation, and demonstrate the utility of the CFT for making fully integrated sensing devices.

Senturia, S. D.↗

Advanced InSb monolithic Charge Coupled Infrared Imaging Devices (CCIRID)

The continued development of monolithic InSb charge coupled infrared imaging devices (CCIRIDs) is discussed. The processing sequence and structural design of 20-element linear arrays are discussed. Also, results obtained from radiometric testing of the 20-element arrays using a clamped sample-and-hold output circuit are reported. The design and layout of a next-generation CCIRID chip are discussed. The major devices on this chip are a 20 by 16 time-delay-and-integration (TDI) area array and a 100-element linear imaging array. The development of a process for incorporating an ion implanted S(+) planar channel stop into the CCIRID structure and the development of a thin film transparent photogate are also addressed. The transparent photogates will increase quantum efficiency to greater than 70% across the 2.5 to 5.4 micrometer spectral region in future front-side illuminated CCIRIDs.

Koch, T. L.↗

Rapid prediction of fuel research octane number and octane sensitivity using the AFIDA constant-volume combustion chamber

Current research octane number (RON) and motor octane number (MON) gasoline performance characterization techniques use dated, complex engine testing methodology and limit researchers’ ability to easily characterize small volumes of experimental fuels. A novel methodology is presented that correlates measured ignition delay (ID) time to RON in an Advanced Fuel Ignition Delay Analyzer (AFIDA) constant-volume combustion chamber device at a single pressure/temperature condition, with an r2 of 0.99 and standard error (SE) of 1.0. The correlation of the slope of the ID time between two additional temperature points to octane sensitivity (S) produces an r2 of 0.97 and SE of 0.69; however, fuels with S>12 are indistinguishable. These results are based on methodology calibration using 31 primary and toluene reference fuels containing 0%-40% ethanol with RON values ranging from 85 to 113. Validation of these methods using a 102-sample fuel matrix spanning an array of base fuels and additive chemistry designed to test the robust applicability of the method, along with pump gasoline and high-octane surrogate blend samples, demonstrates an r2 of 0.94 and SE of 1.3 for the RON correlation over all samples, whereas the equivalent S correlation produces an r2 of 0.78 and SE of 1.2 by excluding two additives, 3-pentanone and diisobutylene, which displayed poor S correlation results. This novel AFIDA analysis method can be performed in 1 h and with 40 mL of fuel, offering significant improvements in time and volume requirements over traditional techniques.

33 ADVANCED PROPULSION SYSTEMS↗

Efficient implementation of real-time programs under the VAX/VMS operating system

Techniques for writing efficient real-time programs under the VAX/VMS oprating system are presented. Basic operations are presented for executing at real-time priority and for avoiding needlless processing delays. A highly efficient technique for accessing physical devices by mapping to the input/output space and accessing the device registrs directly is described. To illustrate the application of the technique, examples are included of different uses of the technique on three devices in the Langley Avionics Integration Research Lab (AIRLAB): the KW11-K dual programmable real-time clock, the Parallel Communications Link (PCL11-B) communication system, and the Datacom Synchronization Network. Timing data are included to demonstrate the performance improvements realized with these applications of the technique.

Johnson, S. C.↗

Time Delay of Wide Area Damping Control in Urban Power Grid: Model-Based Analysis and Data-Driven Compensation

Due to the rapid development of economies, large urban cities consume an increasing amount of energy and have a higher requirement for power quality. Voltage source converter based high voltage direct current (VSC-HVDC) is a promising device to transmit clean power from remote regions to urban power systems, while also providing wide area damping control (WADC) for frequency stabilization. However, the time-delay naturally existing in the VSC-HVDC system may degrade the performance of WADC and even result in instability. To address this issue, this paper develops a time-delay correction control strategy for VSC-HVDC damping control in urban power grids. First, a small signal model of WADC is built to analyze the negative impacts of time delay. Then, a data-driven approach is proposed to compensate for the inherent time delay in VSC-HVDC damping control. The extensive training data will be generated under various disturbances. After offline training, the long short-term memory network (LSTM) can be implemented online to predict the actual frequency deviation based on real-time measurements. Finally, the proposed method is validated through MATLAB-Simulink in a two-area four-machine system. The results indicate that the data-driven compensation has a strong generalization ability for random delay time constants and can improve the performance of WADC significantly.

24 POWER TRANSMISSION AND DISTRIBUTION↗

The Effectiveness of TAG or Guard-Gates in SET Suppression Using Delay and Dual-Rail Configurations at 0.35 microns

Design options for decreasing the susceptibility of integrated circuits to Single Event Upset (SEU) fall into two categories: (1) increasing the critical charge to cause an upset at a particular node, and (2) employing redundancy to mask or correct errors. With decreasing device sizes on an Integrated Circuit (IC), the amount of charge required to represent a logic state has steadily reduced. Critical charge methods such as increasing drive strength or increasing the time required to change state as in capacitive or resistive hardening or delay based approaches extract a steadily increasing penalty as a percentage of device resources and performance. Dual redundancy is commonly assumed only to provide error detection with Triple Modular Redundancy (TMR) required for correction, but less well known methods employ dual redundancy to achieve full error correction by voting two inputs with a prior state to resolve ambiguity. This requires special circuits such as the Whitaker latch [1], or the guard-gate [2] which some of us have called a Transition AND Gate (TAG) [3]. A 2-input guard gate is shown in Figure 1. It is similar to a Muller Completion Element [4] and relies on capacitance at node "out" to retain the prior state when inputs disagree, while eliminating any output buffer which would be susceptible to radiation strikes. This paper experimentally compares delay based and dual rail flip-flop designs wherein both types of circuits employ guard-gates to optimize layout and performance, and draws conclusions about design criteria and suitability of each option. In both cases a design goal is protection against Single Event Transients (SET) in combinational logic as well as SEU in the storage elements. For the delay based design, it is also a goal to allow asynchronous clear or preset inputs on the storage elements, which are often not available in radiation tolerant designs.

Shuler, Robert L.↗

Sidelobe reduction of Barker codes, part 7.1C

Barker codes can be realized as simple digital preprocessors, or with the use of a delay line, can be realized as an analogue device. Assuming the process observed has an autocorrelation time that is long compared to the code length, a gain in signal to noise, G = N where N is the number of elements in the code, may be realized. Typically Barker codes are implemented by shifting the phase of the transmitted signal by 0 or 180 degrees according to the code pattern. A typical detection scheme is shown where the output of the radar receiver is delayed by an analogue delay line or a shift register. The signal in each element of the delay line or shift register is continuously multiplied by the code and all elements are summed. A principal disadvantage was the sidelobe response. In the case of MST or ST radar echoes where there is a dynamic range as large as 60 dB, these unwanted sidelobes cause an increase in the apparent width of atmospheric layers, or some narrow layer to appear at several altitudes. The sidelobes of a Barker code may be reduced by tapering the response of the decoder. Optimum tapers, are shown. It is found that the sidelobe response is greatly reduced with very little loss in G.

Green, J. L.↗