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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Machine Learning of Plasma Science for Next Generation Microelectronics (Project Final Report)

Low temperature plasmas (LTPs) are an enabling technology behind reducing device dimensions and the continuation of Moore’s Law. It is estimated that 40-45% of all process steps necessary to manufacture semiconductor devices involve LTPs. However, challenges in plasma process design and continuous incorporation of novel materials for new device architectures are pushing the limits of what is possible with current plasma technology. For example, creating higher aspect ratio structures and etching features at the atomic scale both require finer control of the ion energy/velocity at wafer surfaces. To support these types of future innovations in the plasma processing systems that Sandia and the DOE rely upon, we have developed novel diagnostics, simulations, and machine learning capabilities to discover, characterize, and predict plasma phenomena affecting the ion energy/velocity distribution function (IEDF). These efforts also supported research program development and external collaboration with industry and academia through Sandia’s Plasma Research Facility (PRF). This report will focus on the following topics and accomplishments of this three year LDRD project, briefly summarized.

42 ENGINEERING↗
DOE OSTI2021

Aligned 2D carbon nanotube liquid crystals for wafer-scale electronics

Semiconducting carbon nanotubes promise faster performance and lower power consumption than Si in field-effect transistors (FETs) if they can be aligned in dense arrays. Here, we demonstrate that nanotubes collected at a liquid/liquid interface self-organize to form two-dimensional (2D) nematic liquid crystals that globally align with flow. The 2D liquid crystals are transferred onto substrates in a continuous process generating dense arrays of nanotubes aligned within ±6°, ideal for electronics. Nanotube ordering improves with increasing concentration and decreasing temperature due to the underlying liquid crystal phenomena. The excellent alignment and uniformity of the transferred assemblies enable FETs with exceptional on-state current density averaging 520 μA μm -1 at only -0.6 V, and variation of only 19%. FETs with ion gel top gates demonstrate subthreshold swing as low as 60 mV decade -1 . Deposition across a 10-cm substrate is achieved, evidencing the promise of 2D nanotube liquid crystals for commercial semiconductor electronics.

42 ENGINEERING↗
NASA NTRS2009

NASA Tech Briefs, September 2009

opics covered include: Filtering Water by Use of Ultrasonically Vibrated Nanotubes; Computer Code for Nanostructure Simulation; Functionalizing CNTs for Making Epoxy/CNT Composites; Improvements in Production of Single-Walled Carbon Nanotubes; Progress Toward Sequestering Carbon Nanotubes in PmPV; Two-Stage Variable Sample-Rate Conversion System; Estimating Transmitted-Signal Phase Variations for Uplink Array Antennas; Board Saver for Use with Developmental FPGAs; Circuit for Driving Piezoelectric Transducers; Digital Synchronizer without Metastability; Compact, Low-Overhead, MIL-STD-1553B Controller; Parallel-Processing CMOS Circuitry for M-QAM and 8PSK TCM; Differential InP HEMT MMIC Amplifiers Embedded in Waveguides; Improved Aerogel Vacuum Thermal Insulation; Fluoroester Co-Solvents for Low-Temperature Li+ Cells; Using Volcanic Ash to Remove Dissolved Uranium and Lead; High-Efficiency Artificial Photosynthesis Using a Novel Alkaline Membrane Cell; Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays; Micro-Horn Arrays for Ultrasonic Impedance Matching; Improved Controller for a Three-Axis Piezoelectric Stage; Nano-Pervaporation Membrane with Heat Exchanger Generates Medical-Grade Water; Micro-Organ Devices; Nonlinear Thermal Compensators for WGM Resonators; Dynamic Self-Locking of an OEO Containing a VCSEL; Internal Water Vapor Photoacoustic Calibration; Mid-Infrared Reflectance Imaging of Thermal-Barrier Coatings; Improving the Visible and Infrared Contrast Ratio of Microshutter Arrays; Improved Scanners for Microscopic Hyperspectral Imaging; Rate-Compatible LDPC Codes with Linear Minimum Distance; PrimeSupplier Cross-Program Impact Analysis and Supplier Stability Indicator Simulation Model; Integrated Planning for Telepresence With Time Delays; Minimizing Input-to-Output Latency in Virtual Environment; Battery Cell Voltage Sensing and Balancing Using Addressable Transformers; Gaussian and Lognormal Models of Hurricane Gust Factors; Simulation of Attitude and Trajectory Dynamics and Control of Multiple Spacecraft; Integrated Modeling of Spacecraft Touch-and-Go Sampling; Spacecraft Station-Keeping Trajectory and Mission Design Tools; Efficient Model-Based Diagnosis Engine; and DSN Simulator.

Source record↗
DOE OSTI2025

Large‐Scale 2D Perovskite Nanocrystals Photodetector Array via Ultrasonic Spray Synthesis

Abstract 2D perovskite (PVSK) single crystals have received significant attention due to their unique optical and optoelectronic properties. However, current synthesis methods face limitations, particularly in large‐area fabrication, which remain critical barriers to practical applications. In this study, the synthesis of red/green/purple‐blue‐colored 2D PVSK nanocrystals over a large area (4‐inch wafer) and the fabrication of high‐performance photodetector arrays are presented via a facile yet efficient spray‐coating approach with a liquid‐bridge transport effect. The photodetector array achieves 100% working yield, high photo‐responsivity (1.5 × 10 6 A W −1 ) and specific‐detectivity (1.1 × 10 16 Jones) with competitive photomapping characteristics. An intelligent vision system for automatic shape recognition is further demonstrated with a recognition rate exceeding 90%. This study provides significant advances in the scalable synthesis of nanoscale 2D PVSK crystals, their integration into large‐area optoelectronic devices, and their potential use in artificial‐intelligence systems.

Lee, Yoon Ho [Davidson School of Chemical Engineer↗
DOE OSTI2021

High-Efficiency, Low-Cost III-V Solar Cells by Dynamic Hydride Vapor Phase Epitaxy Coupled with Rapid, Polishing-Free Wafer Reuse through Orientation-Optimized (110) Spalling

We demonstrated (110) GaAs solar cells grown by D-HVPE with equivalent performance and material quality relative to (100) devices. Also, we developed a procedure for repeatable wafer-scale spalling of (110) GaAs. Spalled surfaces were free of the facets founds in (100) GaAs spalling, the large arrest lines found in (100) Ge spalling, and surface features greater than 3 µm in peak-to-valley height, which can otherwise degrade the efficiency of regrown III-V devices. A sub-µm step-terrace morphology was discovered on the post-spall wafer surface, resulting from the restricted cleavage system of GaAs, but we developed understanding of the factors that determine the resulting morphology, enabling ample opportunity for optimization of morphologies suitable for device growth and spall depth waste minimization on (110) GaAs. Lastly, we demonstrated a device grown on a previously spalled surface with only 8% relative efficiency difference to a cell grown on a new unspalled wafer. Significant optimization of the substrate regrowth conditions are required to enable higher efficiency, but these results highlight the promise of (110)-oriented devices coupled with substrate reuse by spalling as a pathway for low-cost III-V photovoltaics.

14 SOLAR ENERGY↗
DOE OSTI2025

Broadband unidirectional visible imaging using wafer-scale nano-fabrication of multi-layer diffractive optical processors

We present a broadband and polarization-insensitive unidirectional imager that operates at the visible part of the spectrum, where image formation occurs in one direction, while in the opposite direction, it is blocked. This approach is enabled by deep learning-driven diffractive optical design with wafer-scale nano-fabrication using high-purity fused silica to ensure optical transparency and thermal stability. Our design achieves unidirectional imaging across three visible wavelengths (covering red, green, and blue parts of the spectrum), and we experimentally validated this broadband unidirectional imager by creating high-fidelity images in the forward direction and generating weak, distorted output patterns in the backward direction, in alignment with our numerical simulations. This work demonstrates wafer-scale production of diffractive optical processors, featuring 16 levels of nanoscale phase features distributed across two axially aligned diffractive layers for visible unidirectional imaging. This approach facilitates mass-scale production of ~0.5 billion nanoscale phase features per wafer, supporting high-throughput manufacturing of hundreds to thousands of multi-layer diffractive processors suitable for large apertures and parallel processing of multiple tasks. Beyond broadband unidirectional imaging in the visible spectrum, this study establishes a pathway for artificial-intelligence-enabled diffractive optics with versatile applications, signaling a new era in optical device functionality with industrial-level, massively scalable fabrication.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Spin-on deposition of amorphous zeolitic imidazolate framework films for lithography applications

Amorphous zeolitic imidazolate framework (aZIF) films have been recently introduced as resists for electron beam and extreme ultraviolet lithography. aZIFs are also being considered for separation applications, including thin film membranes. However, the reported methods for aZIF deposition are currently based on highly empirical trial-and-error approaches that hinder control of film composition, thickness and uniformity as well as scale-up and transferability to different coating geometries. This work presents a method for depositing aZIF films with controllable thickness using dilute precursors mixed immediately before encountering the substrate. Importantly, the method is amenable to quantitative analysis by computational fluid dynamics to extract intrinsic deposition rates and limiting reactant transport diffusivities, enabling predictive physics-based modeling of the deposition process. This allows the deposition method to be adapted for spin coating on silicon wafers to prepare high-quality aZIF films with consistently controlled thickness. Using this approach, high-resolution resist performance and wafer-scale use for beyond extreme-ultraviolet lithography of aZIF films is demonstrated.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2023

Integrated photonic molecule Brillouin laser with a high-power sub-100-mHz fundamental linewidth

Photonic integrated lasers with an ultra-low fundamental linewidth and a high output power are important for precision atomic and quantum applications, high-capacity communications, and fiber sensing, yet wafer-scale solutions have remained elusive. Here we report an integrated stimulated Brillouin laser (SBL), based on a photonic molecule coupled resonator design, that achieves a sub-100-mHz fundamental linewidth with greater than 10-mW output power in the C band, fabricated on a 200-mm silicon nitride (Si 3 N 4 ) CMOS-foundry compatible wafer-scale platform. The photonic molecule design is used to suppress the second-order Stokes (S2) emission, allowing the primary lasing mode to increase with the pump power without phase noise feedback from higher Stokes orders. The nested waveguide resonators have a 184 million intrinsic and 92 million loaded Q, over an order of magnitude improvement over prior photonic molecules, enabling precision resonance splitting of 198 MHz at the S2 frequency. We demonstrate S2-suppressed single-mode SBL with a minimum fundamental linewidth of 71±18 mHz, corresponding to a 23±6-mHz 2 /Hz white-frequency-noise floor, over an order of magnitude lower than prior integrated SBLs, with an ∼11-mW output power and 2.3-mW threshold power. The frequency noise reaches the resonator-intrinsic thermo-refractive noise from 2-kHz to 1-MHz offset. The laser phase noise reaches −155 dBc/Hz at 10-MHz offset. The performance of this chip-scale SBL shows promise not only to improve the reliability and reduce size and cost but also to enable new precision experiments that require the high-speed manipulation, control, and interrogation of atoms and qubits. Realization in the silicon nitride ultra-low loss platform is adaptable to a wide range of wavelengths from the visible to infrared and enables integration with other components for systems-on-chip solutions for a wide range of precision scientific and engineering applications including quantum sensing, gravitometers, atom interferometers, precision metrology, optical atomic clocks, and ultra-low noise microwave generation.

Liu, Kaikai (ORCID:0000000213609646)↗
DOE OSTI2022

The influence of cooling rate on condensation of iron, aluminum, and uranium oxide nanoparticles

Fundamental observations of particle size distributions are needed to develop models that predict the fate and transport of radioactive materials in the atmosphere following a nuclear incident. The extent of material transport is influenced by the time scales of particle formation processes (e.g., condensation, coagulation). In this study, we investigated the influence of cooling time scales on size distributions of uranium, aluminum, and iron oxide particles that are synthesized separately under identical run conditions inside the controlled environment of an argon plasma flow reactor. Two distinct temperature distributions are imposed along the flow reactor by varying the argon flow rate downstream of the plasma torch. The vaporized reactants of uranium, aluminum, and iron are cooled from about 5000K to 1000K before they are collected on silicon wafers for ex situ scanning electron microscope analysis. The microscope images show that the sizes of the largest aluminum and iron oxide particles heavily depend on the cooling time scales, whereas significant size variation with cooling rate is not observed for uranium oxide particles. In addition, the size distribution of aluminum oxide particles exhibits the broadest range among all three metal oxides studied. We performed simulations of particle size distributions using a kinetic model that couples gas phase oxidation chemistry with particle formation processes, including nucleation, condensation, and coagulation. The model results demonstrate the strong sensitivity of particle size distribution to different cooling histories (i.e., temperature vs residence time) along the flow reactor. In conclusion, the kinetic model also helps identify directions for future research to improve the predictions.

36 MATERIALS SCIENCE↗
DOE OSTI2023

CMOS-Compatible Ultrathin Superconducting NbN Thin Films Deposited by Reactive Ion Sputtering on 300 mm Si Wafer

We report a milestone in achieving large-scale, ultrathin (~5 nm) superconducting NbN thin films on 300 mm Si wafers using a high-volume manufacturing (HVM) industrial physical vapor deposition (PVD) system. The NbN thin films possess remarkable structural uniformity and consistently high superconducting quality across the entire 300 mm Si wafer, by incorporating an AlN buffer layer. High-resolution X-ray diffraction and transmission electron microscopy analyses unveiled enhanced crystallinity of (111)-oriented δ-phase NbN with the AlN buffer layer. Notably, NbN films deposited on AlN-buffered Si substrates exhibited a significantly elevated superconducting critical temperature (~2 K higher for the 10 nm NbN) and a higher upper critical magnetic field or H c2 (34.06 T boost in H c2 for the 50 nm NbN) in comparison with those without AlN. These findings present a promising pathway for the integration of quantum-grade superconducting NbN films with the existing 300 mm CMOS Si platform for quantum information applications.

36 MATERIALS SCIENCE↗
NASA NTRS2003

NASA Tech Briefs, January 2003

Topics covered include: Optoelectronic Tool Adds Scale Marks to Photographic Images; Compact Interconnection Networks Based on Quantum Dots; Laterally Coupled Quantum-Dot Distributed-Feedback Lasers; Bit-Serial Adder Based on Quantum Dots; Stabilized Fiber-Optic Distribution of Reference Frequency; Delay/Doppler-Mapping GPS-Reflection Remote-Sensing System; Ladar System Identifies Obstacles Partly Hidden by Grass; Survivable Failure Data Recorders for Spacecraft; Fiber-Optic Ammonia Sensors; Silicon Membrane Mirrors with Electrostatic Shape Actuators; Nanoscale Hot-Wire Probes for Boundary-Layer Flows; Theodolite with CCD Camera for Safe Measurement of Laser-Beam Pointing; Efficient Coupling of Lasers to Telescopes with Obscuration; Aligning Three Off-Axis Mirrors with Help of a DOE; Calibrating Laser Gas Measurements by Use of Natural CO2; Laser Ranging Simulation Program; Micro-Ball-Lens Optical Switch Driven by SMA Actuator; Evaluation of Charge Storage and Decay in Spacecraft Insulators; Alkaline Capacitors Based on Nitride Nanoparticles; Low-EC-Content Electrolytes for Low-Temperature Li-Ion Cells; Software for a GPS-Reflection Remote-Sensing System; Software for Building Models of 3D Objects via the Internet; "Virtual Cockpit Window" for a Windowless Aerospacecraft; CLARAty Functional-Layer Software; Java Library for Input and Output of Image Data and Metadata; Software for Estimating Costs of Testing Rocket Engines; Energy-Absorbing, Lightweight Wheels; Viscoelastic Vibration Dampers for Turbomachine Blades; Soft Landing of Spacecraft on Energy-Absorbing Self-Deployable Cushions; Pneumatically Actuated Miniature Peristaltic Vacuum Pumps; Miniature Gas-Turbine Power Generator; Pressure-Sensor Assembly Technique; Wafer-Level Membrane-Transfer Process for Fabricating MEMS; A Reactive-Ion Etch for Patterning Piezoelectric Thin Film; Wavelet-Based Real-Time Diagnosis of Complex Systems; Quantum Search in Hilbert Space; Analytic Method for Computing Instrument Pointing Jitter; and Semiselective Optoelectronic Sensors for Monitoring Microbes.

Source record↗
DOE OSTI2025

Hexagonal Boron Nitride: Physical Properties, Hydride Vapor‐Phase Epitaxy Growth of Large‐Diameter Quasi‐Bulk Wafers and Applications

Hexagonal boron nitride ( h ‐BN), with its ultrawide bandgap and 2D structure, holds an immense promise for advanced semiconductor applications. Scaling bulk crystals to large‐diameter wafers, crucial for complex device fabrication, remains a challenge with high temperature, high pressure, and metal flux solution methods. To address this, recent efforts have focused on hydride vapor‐phase epitaxy (HVPE) for producing large diameter thick h ‐BN quasi‐bulk wafers, reaching hundreds of micrometers. These HVPE‐grown quasi‐bulk crystals exhibit excellent c ‐axis long‐range order. Notably, the in‐plane mobility‐lifetime products for both electrons and holes surpass 10 −4 cm 2 V −1 , which are two orders of magnitude greater than the out‐of‐plane (vertical) values, highlighting the potential for high‐performance devices leveraging superior lateral transport. Lateral detectors fabricated from 100 μm thick B‐10 enriched h‐ BN wafers have achieved a record 60% thermal neutron detection efficiency. Based on its physical properties, h‐ BN appears to be an outstanding material of choice for light‐triggered electronic power switches capable of supporting high ‐ voltage and high ‐ power operations. These recent advancements in large‐diameter h ‐BN quasi‐bulk crystal growth, enabled by HVPE, pave the way for applications spanning deep UV photonics, high‐power electronics, high‐efficiency neutron detection, and quantum information technologies, establishing h ‐BN as both a versatile active semiconductor and an ideal substrate.

Jiang, Hongxing [Department of Electrical and Comp↗
DOE OSTI2024

Treatment and aging studies of GaAs(111)B substrates for van der Waals chalcogenide film growth

GaAs(111)B are commercially available substrates widely used for the growth of van der Waals chalcogenide films. Wafer-scale, high-quality crystalline films can be deposited on GaAs(111)B substrates using molecular beam epitaxy. However, two obstacles persist in the use of GaAs(111)B: first, the surface dangling bonds make it challenging for the growth of van der Waals materials; second, the As-terminated surface is prone to aging in air. This study investigated a thermal treatment method for deoxidizing GaAs(111)B substrates while simultaneously passivating the surface dangling bonds with Se. By optimizing the treatment parameters, we obtained a flat and completely deoxidized platform for subsequent film growth, with highly reproducible operations. Furthermore, through first-principle calculations, we find that the most energetically favorable surface of GaAs(111)B after Se passivation consists of 25% As atoms and 75% Se atoms. Finally, we discovered that the common storage method using food-grade vacuum packaging cannot completely prevent substrate aging, and even after thermal treatment, aging still affects subsequent growth. Therefore, we recommend using N2-purged containers for better preservation.

Engineering↗
DOE OSTI2022

High thermal conductivity in wafer-scale cubic silicon carbide crystals

High thermal conductivity electronic materials are critical components for high-performance electronic and photonic devices as both active functional materials and thermal management materials. We report an isotropic high thermal conductivity exceeding 500 W m –1 K –1 at room temperature in high-quality wafer-scale cubic silicon carbide (3C-SiC) crystals, which is the second highest among large crystals (only surpassed by diamond). Furthermore, the corresponding 3C-SiC thin films are found to have record-high in-plane and cross-plane thermal conductivity, even higher than diamond thin films with equivalent thicknesses. Our results resolve a long-standing puzzle that the literature values of thermal conductivity for 3C-SiC are lower than the structurally more complex 6H-SiC. We show that the observed high thermal conductivity in this work arises from the high purity and high crystal quality of 3C-SiC crystals which avoids the exceptionally strong defect-phonon scatterings. Moreover, 3C-SiC is a SiC polytype which can be epitaxially grown on Si. We show that the measured 3C-SiC-Si thermal boundary conductance is among the highest for semiconductor interfaces. These findings provide insights for fundamental phonon transport mechanisms, and suggest that 3C-SiC is an excellent wide-bandgap semiconductor for applications of next-generation power electronics as both active components and substrates.

42 ENGINEERING↗
DOE OSTI2022

Optimizing performance and yield of vertical GaN diodes using wafer scale optical techniques

Abstract To improve the manufacturing of vertical GaN devices for power electronics applications, the effects of defects in GaN substrates need to be better understood. Many non-destructive techniques including photoluminescence, Raman spectroscopy and optical profilometry, can be used to detect defects in the substrate and epitaxial layers. Raman spectroscopy was used to identify points of high crystal stress and non-uniform conductivity in a substrate, while optical profilometry was used to identify bumps and pits in a substrate which could cause catastrophic device failures. The effect of the defects was studied using vertical P-i-N diodes with a single zone junction termination extention (JTE) edge termination and isolation, which were formed via nitrogen implantation. Diodes were fabricated on and off of sample abnormalities to study their effects. From electrical measurements, it was discovered that the devices could consistently block voltages over 1000 V (near the theoretical value of the epitaxial layer design), and the forward bias behavior could consistently produce on-resistance below 2 mΩ cm 2 , which is an excellent value considering DC biasing was used and no substrate thinning was performed. It was found that high crystal stress increased the probability of device failure from 6 to 20%, while an inhomogeneous carrier concentration had little effect on reverse bias behavior, and slightly (~ 3%) increased the on-resistance (R on ). Optical profilometry was able to detect regions of high surface roughness, bumps, and pits; in which, the majority of the defects detected were benign. However a large bump in the termination region of the JTE or a deep pit can induce a low voltage catastrophic failure, and increased crystal stress detected by the Raman correlated to the optical profilometry with associated surface topography.

42 ENGINEERING↗
DOE OSTI2022

A novel hardmask-to-substrate pattern transfer method for creating 3D, multi-level, hierarchical, high aspect-ratio structures for applications in microfluidics and cooling technologies

Abstract This letter solves a major hurdle that mars photolithography-based fabrication of micro-mesoscale structures in silicon. Conventional photolithography is usually performed on smooth, flat wafer surfaces to lay a 2D design and subsequently etch it to create single-level features. It is, however, unable to process non-flat surfaces or already etched wafers and create more than one level in the structure. In this study, we have described a novel cleanroom-based process flow that allows for easy creation of such multi-level, hierarchical 3D structures in a substrate. This is achieved by introducing an ultra-thin sacrificial silicon dioxide hardmask layer on the substrate which is first 3D patterned via multiple rounds of lithography. This 3D pattern is then scaled vertically by a factor of 200–300 and transferred to the substrate underneath via a single shot deep etching step. The proposed method is also easily characterizable—using features of different topographies and dimensions, the etch rates and selectivities were quantified; this characterization information was later used while fabricating specific target structures. Furthermore, this study comprehensively compares the novel pattern transfer technique to already existing methods of creating multi-level structures, like grayscale lithography and chip stacking. The proposed process was found to be cheaper, faster, and easier to standardize compared to other methods—this made the overall process more reliable and repeatable. We hope it will encourage more research into hybrid structures that hold the key to dramatic performance improvements in several micro-mesoscale devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Large-Area Periodic Arrays of Atomically Flat Single-Crystal Gold Nanotriangles Formed Directly on Substrate Surfaces

The advancement of nanoenabled wafer-based devices requires the establishment of core competencies related to the deterministic positioning of nanometric building blocks over large areas. Within this realm, plasmonic single-crystal gold nanotriangles represent one of the most attractive nanoscale components but where the formation of addressable arrays at scale has heretofore proven impracticable. In this work, a benchtop process is presented for the formation of large-area periodic arrays of gold nanotriangles. The devised growth pathway sees the formation of an array of defect-laden seeds using lithographic and vapor-phase assembly processes followed by their placement in a growth solution promoting planar growth and threefold symmetric side-faceting. The nanotriangles formed in this high-yield synthesis distinguish themselves in that they are epitaxially aligned with the underlying substrate, grown to thicknesses that are not readily obtainable in colloidal syntheses, and present atomically flat pristine surfaces exhibiting gold atoms with a close-packed structure. As such, they express crisp and unambiguous plasmonic modes and form photoactive surfaces with highly tunable and readily modeled plasmon resonances. The devised methods, hence, advance the integration of single-crystal gold nanotriangles into device platforms and provide an overall fabrication strategy that is adaptable to other nanomaterials.

42 ENGINEERING↗
DOE OSTI2023

Low-thermal-budget synthesis of monolayer molybdenum disulfide for silicon back-end-of-line integration on a 200 mm platform

Two-dimensional (2D) materials are promising candidates for future electronics due to their excellent electrical and photonic properties. Although promising results on the wafer-scale synthesis (≤150 mm diameter) of monolayer molybdenum disulfide (MoS 2 ) have already been reported, the high-quality synthesis of 2D materials on wafers of 200 mm or larger, which are typically used in commercial silicon foundries, remains difficult. The back-end-of-line (BEOL) integration of directly grown 2D materials on silicon complementary metal–oxide–semiconductor (CMOS) circuits is also unavailable due to the high thermal budget required, which far exceeds the limits of silicon BEOL integration (<400 °C). This high temperature forces the use of challenging transfer processes, which tend to introduce defects and contamination to both the 2D materials and the BEOL circuits. Here we report a low-thermal-budget synthesis method (growth temperature < 300 °C, growth time ≤ 60 min) for monolayer MoS 2 films, which enables the 2D material to be synthesized at a temperature below the precursor decomposition temperature and grown directly on silicon CMOS circuits without requiring any transfer process. We designed a metal–organic chemical vapour deposition reactor to separate the low-temperature growth region from the high-temperature chalcogenide-precursor-decomposition region. We obtain monolayer MoS 2 with electrical uniformity on 200 mm wafers, as well as a high material quality with an electron mobility of ~35.9 cm 2 V -1 s -1 . Finally, we demonstrate a silicon-CMOS-compatible BEOL fabrication process flow for MoS 2 transistors; the performance of these silicon devices shows negligible degradation (current variation < 0.5%, threshold voltage shift < 20 mV). We believe that this is an important step towards monolithic 3D integration for future electronics.

77 NANOSCIENCE AND NANOTECHNOLOGY↗