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At least 541 records · Page 30

Bit-parallel arithmetic in a massively-parallel associative processor

A simple but powerful new architecture based on a classical associative processor model is presented. Algorithms for performing the four basic arithmetic operations both for integer and floating point operands are described. For m-bit operands, the proposed architecture makes it possible to execute complex operations in O(m) cycles as opposed to O(m exp 2) for bit-serial machines. A word-parallel, bit-parallel, massively-parallel computing system can be constructed using this architecture with VLSI technology. The operation of this system is demonstrated for the fast Fourier transform and matrix multiplication.

Scherson, Isaac D.↗

Performance of a Regenerative Fuel Cell System for the Lunar Surface

Regenerative fuel cells (RFCs) are an attractive energy storage solution for lunar missions as a technology capable of providing a higher specific energy (i.e., W∙h/kg) than state-of-the-art packaged Li-ion battery systems. An RFC consists of the (1 & 2) electrochemical stacks (chemical to electrical energy conversion to supply electricity to an external load, i.e. the fuel cell reaction, and electrical to chemical energy conversion of supplied electrical power to dissociate water into hydrogen and oxygen gases, i.e. water electrolysis), (3) fluidic conditioning, (4) reactant storage, (5) avionics, (6) power management and distribution (PMAD), and (7) thermal management. NASA’s Glenn Research Center has designed, assembled, and tested a breadboard RFC sys-tem capable of operating autonomously for multiple simulated lunar day/night cycles in a laboratory environment. The system is comprised of a non-flow through proton exchange membrane (PEM) fuel cell stack and a liquid-anode feed PEM electrolyzer (EZ) stack designed to electrochemically compress the reactants at balanced pressures up to 12.4 MPa (1800 psia). The fluidic conditioning, avionics, PMAD, and thermal management sub-systems are largely comprised of commercial-off-the-shelf components for this system-level development effort. The hardware is controlled by a CubeSat space processor running an operational program based on core flight architecture that can control the RFC hardware autonomously through a state machine with fault monitoring. The testing results highlighted here were completed with the system in an open-loop configuration such that reactants generated through water electrolysis were vented while gas cylinders supplied fuel cell operation. The breadboard operated autonomously, but there were five unplanned transitions to a safe state that required a manual restart after reviewing the data, determining a root cause, and implementing a solution. Four of the transitions were caused by the thermal management subsystem and the fifth was caused by a water management control issue in the EZ sub-system. The RFC system operated for over 550 hours with the final cycle being slightly abbreviated due to reasons unrelated to system performance.

Kerrigan Cain↗

Performance of a Regenerative Fuel Cell System for the Lunar Surface

Regenerative fuel cells (RFCs) are an attractive energy storage solution for lunar missions as a technology capable of providing a higher specific energy (i.e., W∙h/kg) than state-of-the-art packaged Li-ion battery systems. An RFC consists of the (1 & 2) electrochemical stacks (chemical to electrical energy conversion to supply electricity to an external load, i.e. the fuel cell reaction, and electrical to chemical energy conversion of supplied electrical power to dissociate water into hydrogen and oxygen gases, i.e. water electrolysis), (3) fluidic conditioning, (4) reactant storage, (5) avionics, (6) power management and distribution (PMAD), and (7) thermal management. NASA’s Glenn Research Center has designed, assembled, and tested a breadboard RFC sys-tem capable of operating autonomously for multiple simulated lunar day/night cycles in a laboratory environment. The system is comprised of a non-flow through proton exchange membrane (PEM) fuel cell stack and a liquid-anode feed PEM electrolyzer (EZ) stack designed to electrochemically compress the reactants at balanced pressures up to 12.4 MPa (1800 psia). The fluidic conditioning, avionics, PMAD, and thermal management sub-systems are largely comprised of commercial-off-the-shelf components for this system-level development effort. The hardware is controlled by a CubeSat space processor running an operational program based on core flight architecture that can control the RFC hardware autonomously through a state machine with fault monitoring. The testing results highlighted here were completed with the system in an open-loop configuration such that reactants generated through water electrolysis were vented while gas cylinders supplied fuel cell operation. The breadboard operated autonomously, but there were five unplanned transitions to a safe state that required a manual restart after reviewing the data, determining a root cause, and implementing a solution. Four of the transitions were caused by the thermal management subsystem and the fifth was caused by a water management control issue in the EZ sub-system. The RFC system operated for over 550 hours with the final cycle being slightly abbreviated due to reasons unrelated to system performance.

Kerrigan Cain↗

Virtex-II Pro PowerPC SEE Characterization Test Methods and Results

The Xilinx Vix-11 Pro is a platform FPGA that embeds multiple microprocessors within the fabric of an SRAM-based reprogrammable FPGA. The variety and quantity of resources provided by this family of devices make them very attractive for spaceflight applications. However,these devices will be susceptible to single event effects (SEE), which must be mitigated. Observations from prior testing of the Xilinx Virtex-II Pro suggest that the PowerPC core has significant vulnerability to SEES. However, these initial tests were not designed to exclusively target the functionality of the PowerPC, therefore making it difficult to distinguish processor upsets from fabric upsets. The main focus of this paper involves detailed SEE testing of the embedded PowerPC core. Due to the complexity of the PowerPC, various custom test applications, both static and dynamic, will be designed to isolate each Unit of the processor. Collective analysis of the test results will provide insight into the exact upset mechanism of the PowerPC. With this information, mitigations schemes can be developed and tested that address the specific susceptibilities of these devices. The test bed will be the Xilinx SEE Consortium Virtex-II Pro test board, which allows for configuration scrubbing, design triplication, and ease of data collection. Testing will be performed at the Indiana University Cyclotron Facility using protons of varying energy levels and fluencies. This paper will present the detailed test approach along with the results.

Petrick, David↗

Celestial Navigation in Cislunar Space with autoNGC

Celestial navigation (CelNav) is a source of navigation observables where images of known solar system bodies are used to locate a spacecraft, beneficial within the solar system for both cislunar and deep space missions. CelNav provides a variety of design benefits to support and enable current and new autonomous space operations- using only a camera and a processor to produce in-situ measurements for navigation. This technology reduces subscription to ground-based tracking during all phases of a mission, freeing up resources for other operational needs. This also supports secure navigation since it eliminates the need for ground contact. CelNav enables missions where the light time delay between Earth and the spacecraft is too long (or the Earth to spacecraft line of sight is obscured) to support critical operations. It also enables smaller mission classes, where Deep Space Network (DSN)time is cost prohibitive, to reduce its cost by focusing primarily on data downlink. Finally, it enables the NASA Artemis program and other cislunar human space flight by providing redundant navigation to traditional radiometric tracking. In this presentation, we discuss the implementation of a CelNav app in autonomous Navigation, Guidance, and Control (autoNGC), a comprehensive flight software suite for onboard autonomy that is built on the core Flight System (cFS). The presentation also summarizes the results of flight software-in-the-loop (SIL) and processor-in-the-loop (PIL) demonstrations. Both are high-fidelity simulations with the use of a camera emulator hosted on a GPU server that simulates images that would be captured by the camera. The CelNav app leverages the use of cGIANT (cFS Goddard Image Analysis and Navigation Tool).Previously developed for the autoNGC software suite, cGIANT is an onboard autonomous image processing and optical navigation (OpNav) tool that performs limb-based OpNav and Terrain Relative Navigation. The added CelNav capability of cGIANT generates bearing measurements to multiple known celestial bodies (planets, moons, asteroids, comets, etc.) in monocular (2D) images. These observables are then fed to the Goddard Enhanced Onboard Navigation System (GEONS)navigation filter app, enabling us to navigate the spacecraft autonomously. In early 2025, the autoNGC CelNav capability is planned to be flight tested as part of the onboard autonomy experiment on the Cislunar Autonomous Positioning System Technology Operations and Navigation Experiment(CAPSTONE) spacecraft that is currently in a Lunar Near Rectilinear Halo Orbit(NRHO).

celestial navigation↗

New tracking implementation in the Deep Space Network

As part of the Network Simplification Project, the tracking system of the Deep Space Network is being upgraded. This upgrade replaces the discrete logic sequential ranging system with a system that is based on commercial Digital Signal Processor boards. The new implementation allows both sequential and pseudo-noise types of ranging. The other major change is a modernization of the data formatting. Previously, there were several types of interfaces, delivering both intermediate data and processed data (called 'observables'). All of these interfaces were bit-packed blocks, which do not allow for easy expansion, and many of these interfaces required knowledge of the specific hardware implementations. The new interface supports four classes of data: raw (direct from the measuring equipment), derived (the observable data), interferometric (multiple antenna measurements), and filtered (data whose values depend on multiple measurements). All of the measurements are reported at the sky frequency or phase level, so that no knowledge of the actual hardware is required. The data is formatted into Standard Formatted Data Units, as defined by the Consultative Committee for Space Data Systems, so that expansion and cross-center usage is greatly enhanced.

ranging↗

Bounds on the minimum number of data transfers in WFTA and FFT programs

Bounds on the minimum number of data transfers (i.e., loads, stores, copies) required by WFTA and FFT programs are presented. The analysis is applicable to those general-purpose computers with M general processor registers, where M is equal to or greater than 4 but much less than the transform length. It is shown that the 1008-point WFTA requires about 21 percent more data transfers than the 1024-point radix-4 FFT; on the other hand, the 120-point WFTA has about the same number of data transfers as the mixed radix (4 x 4 x 4 x 2) version of the 128-point FFT and 22 percent fewer than the radix-2 version. Finally, comparisons of the 'total' program execution times (multiplications, additions, and data transfers, but not indexing or permutations) are presented.

Nawab, H.↗

A Decohesive Constitutive Formulation for Modeling Failure of Sea Ice

One of the dominant characteristics of Arctic ice as reflected by RADARSAT Geophysical Processor System data is the development and persistence of leads. Experimental data from small specimens as well as in situ data from Arctic ice suggest that failure may occur under compression. Presented here is a decohesive constitutive model for which one of the distinguishing new features is that failure is predicted under uniaxial compression. More generally, the model specifically indicates when a lead is initiated, provides the orientation of the lead, gives the mode of failure, and allows one to numerically determine the width of leads. In addition, the approach allows multiple failure planes, a feature that is necessary to simulate crack branching. Pre-existing planes of weakness such as those formed from previous leads can be incorporated. Sample calculations indicate how such a model can be used for large-scale numerical simulations.

Schreyer, H. L.↗

Second year technical report on-board processing for future satellite communications systems

Advanced baseband and microwave switching techniques for large domestic communications satellites operating in the 30/20 GHz frequency bands are discussed. The nominal baseband processor throughput is one million packets per second (1.6 Gb/s) from one thousand T1 carrier rate customer premises terminals. A frequency reuse factor of sixteen is assumed by using 16 spot antenna beams with the same 100 MHz bandwidth per beam and a modulation with a one b/s per Hz bandwidth efficiency. Eight of the beams are fixed on major metropolitan areas and eight are scanning beams which periodically cover the remainder of the U.S. under dynamic control. User signals are regenerated (demodulated/remodulated) and message packages are reformatted on board. Frequency division multiple access and time division multiplex are employed on the uplinks and downlinks, respectively, for terminals within the coverage area and dwell interval of a scanning beam. Link establishment and packet routing protocols are defined. Also described is a detailed design of a separate 100 x 100 microwave switch capable of handling nonregenerated signals occupying the remaining 2.4 GHz bandwidth with 60 dB of isolation, at an estimated weight and power consumption of approximately 400 kg and 100 W, respectively.

Brandon, W. T.↗

A Conceptual Design for a Reliable Optical Bus (ROBUS)

The Scalable Processor-Independent Design for Electromagnetic Resilience (SPIDER) is a new family of fault-tolerant architectures under development at NASA Langley Research Center (LaRC). The SPIDER is a general-purpose computational platform suitable for use in ultra-reliable embedded control applications. The design scales from a small configuration supporting a single aircraft function to a large distributed configuration capable of supporting several functions simultaneously. SPIDER consists of a collection of simplex processing elements communicating via a Reliable Optical Bus (ROBUS). The ROBUS is an ultra-reliable, time-division multiple access broadcast bus with strictly enforced write access (no babbling idiots) providing basic fault-tolerant services using formally verified fault-tolerance protocols including Interactive Consistency (Byzantine Agreement), Internal Clock Synchronization, and Distributed Diagnosis. The conceptual design of the ROBUS is presented in this paper including requirements, topology, protocols, and the block-level design. Verification activities, including the use of formal methods, are also discussed.

Miner, Paul S.↗

Multitasking the code ARC3D

The CRAY multitasking system was developed in order to utilize all four processors and sharply reduce the wall clock run time. This paper describes the techniques used to modify the computational fluid dynamics code ARC3D for this run and analyzes the achieved speedup. The ARC3D code solves either the Euler or thin-layer N-S equations using an implicit approximate factorization scheme. Results indicate that multitask processing can be used to achieve wall clock speedup factors of over three times, depending on the nature of the program code being used. Multitasking appears to be particularly advantageous for large-memory problems running on multiple CPU computers.

Barton, John T.↗

NASA Tech Briefs, January 2010

Topics covered include: Cryogenic Flow Sensor; Multi-Sensor Mud Detection; Gas Flow Detection System; Mapping Capacitive Coupling Among Pixels in a Sensor Array; Fiber-Based Laser Transmitter for Oxygen A-Band Spectroscopy and Remote Sensing; Low-Profile, Dual-Wavelength, Dual-Polarized Antenna; Time-Separating Heating and Sensor Functions of Thermistors in Precision Thermal Control Applications; Cellular Reflectarray Antenna; A One-Dimensional Synthetic-Aperture Microwave Radiometer; Electrical Switching of Perovskite Thin-Film Resistors; Two-Dimensional Synthetic-Aperture Radiometer; Ethernet-Enabled Power and Communication Module for Embedded Processors; Electrically Variable Resistive Memory Devices; Improved Attachment in a Hybrid Inflatable Pressure Vessel; Electrostatic Separator for Beneficiation of Lunar Soil; Amorphous Rover; Space-Frame Antenna; Gear-Driven Turnbuckle Actuator; In-Situ Focusing Inside a Thermal Vacuum Chamber; Space-Frame Lunar Lander; Wider-Opening Dewar Flasks for Cryogenic Storage; Silicon Oxycarbide Aerogels for High-Temperature Thermal Insulation; Supercapacitor Electrolyte Solvents with Liquid Range Below -80 C; Designs and Materials for Better Coronagraph Occulting Masks; Fuel-Cell-Powered Vehicle with Hybrid Power Management; Fine-Water-Mist Multiple-Orientation-Discharge Fire Extinguisher; Fuel-Cell Water Separator; Turbulence and the Stabilization Principle; Improved Cloud Condensation Nucleus Spectrometer; Better Modeling of Electrostatic Discharge in an Insulator; Sub-Aperture Interferometers; Terahertz Mapping of Microstructure and Thickness Variations; Multiparallel Three-Dimensional Optical Microscopy; Stabilization of Phase of a Sinusoidal Signal Transmitted Over Optical Fiber; Vacuum-Compatible Wideband White Light and Laser Combiner Source System; Optical Tapers as White-Light WGM Resonators; EPR Imaging at a Few Megahertz Using SQUID Detectors; Reducing Field Distortion in Magnetic Resonance Imaging; Fluorogenic Cell-Based Biosensors for Monitoring Microbes; A Constant-Force Resistive Exercise Unit; GUI to Facilitate Research on Biological Damage from Radiation; On-Demand Urine Analyzer; More-Realistic Digital Modeling of a Human Body; and Advanced Liquid-Cooling Garment Using Highly Thermally Conductive Sheets.

Source record↗

Processor architecture and data buffering

A set of architectures from three major architecture families: stack, register, and memory-to-memory is discussed. It is shown that scalable architectures are not applicable for low-density technologies because they require at least 32 words of local memory. Software support is shown to be capable of bridging the performance gap between scalable and nonscalable architectures. A register architecture with 32 words of local memory allocated interprocedurally outperforms scalable architectures with equal sizes local memories and even some with larger size local memories. The performance advantage of unscalable architectures becomes significant when in addition to quality compile-time support, a small cache is added to an unscalable architecture. A 32-register architecture with 512 byte cache executes 20 percent less cycles when compared with an 8-set multiple overlapping set organization.

Mulder, Hans↗

Refactoring the elastic–viscous–plastic solver from the sea ice model CICE v6.5.1 for improved performance

This study focuses on the performance of the elastic–viscous–plastic (EVP) dynamical solver within the sea ice model, CICE v6.5.1. The study has been conducted in two steps. First, the standard EVP solver was extracted from CICE for experiments with refactored versions, which are used for performance testing. Second, one refactored version was integrated and tested in the full CICE model to demonstrate that the new algorithms do not significantly impact the physical results. The study reveals two dominant bottlenecks, namely (1) the number of Message Parsing Interface (MPI) and Open Multi-Processing (OpenMP) synchronization points required for halo exchanges during each time step combined with the irregular domain of active sea ice points and (2) the lack of single-instruction, multiple-data (SIMD) code generation. The standard EVP solver has been refactored based on two generic patterns. The first pattern exposes how general finite differences on masked multi-dimensional arrays can be expressed in order to produce significantly better code generation by changing the memory access pattern from random access to direct access. The second pattern takes an alternative approach to handle static grid properties. The measured single-core performance improvement is more than a factor of 5 compared to the standard implementation. The refactored implementation of strong scales on the Intel® Xeon® Scalable Processors series node until the available bandwidth of the node is used. For the Intel® Xeon® CPU Max series, there is sufficient bandwidth to allow the strong scaling to continue for all the cores on the node, resulting in a single-node improvement factor of 35 over the standard implementation. This study also demonstrates improved performance on GPU processors.

58 GEOSCIENCES↗

Generalized hypercube structures and hyperswitch communication network

This paper discusses an ongoing study that uses a recent development in communication control technology to implement hybrid hypercube structures. These architectures are similar to binary hypercubes, but they also provide added connectivity between the processors. This added connectivity increases communication reliability while decreasing the latency of interprocessor message passing. Because these factors directly determine the speed that can be obtained by multiprocessor systems, these architectures are attractive for applications such as remote exploration and experimentation, where high performance and ultrareliability are required. This paper describes and enumerates these architectures and discusses how they can be implemented with a modified version of the hyperswitch communication network (HCN). The HCN is analyzed because it has three attractive features that enable these architectures to be effective: speed, fault tolerance, and the ability to pass multiple messages simultaneously through the same hyperswitch controller.

Young, Steven D.↗

NASA Tech Briefs, July 2010

Topics covered include: Wirelessly Interrogated Wear or Temperature Sensors; Processing Nanostructured Sensors Using Microfabrication Techniques; Optical Pointing Sensor; Radio-Frequency Tank Eigenmode Sensor for Propellant Quantity Gauging; High-Temperature Optical Sensor; Integral Battery Power Limiting Circuit for Intrinsically Safe Applications; Configurable Multi-Purpose Processor; Squeezing Alters Frequency Tuning of WGM Optical Resonator; Automated Computer Access Request System; Range Safety for an Autonomous Flight Safety System; Fast and Easy Searching of Files in Unisys 2200 Computers; Parachute Drag Model; Evolutionary Scheduler for the Deep Space Network; Modular Habitats Comprising Rigid and Inflatable Modules; More About N2O-Based Propulsion and Breathable-Gas Systems; Ultrasonic/Sonic Rotary-Hammer Drills; Miniature Piezoelectric Shaker for Distribution of Unconsolidated Samples to Instrument Cells; Lunar Soil Particle Separator; Advanced Aerobots for Scientific Exploration; Miniature Bioreactor System for Long-Term Cell Culture; Electrochemical Detection of Multiple Bioprocess Analytes; Fabrication and Modification of Nanoporous Silicon Particles; High-Altitude Hydration System; Photon Counting Using Edge-Detection Algorithm; Holographic Vortex Coronagraph; Optical Structural Health Monitoring Device; Fuel-Cell Power Source Based on Onboard Rocket Propellants; Polar Lunar Regions: Exploiting Natural and Augmented Thermal Environments; Simultaneous Spectral Temporal Adaptive Raman Spectrometer - SSTARS; Improved Speed and Functionality of a 580-GHz Imaging Radar; Bolometric Device Based on Fluxoid Quantization; Algorithms for Learning Preferences for Sets of Objects; Model for Simulating a Spiral Software-Development Process; Algorithm That Synthesizes Other Algorithms for Hashing; Algorithms for High-Speed Noninvasive Eye-Tracking System; and Adapting ASPEN for Orbital Express.

Source record↗

ML–Enabled FPGA Framework for Fast Quantum State Discrimination in Mid-Circuit Measurement Regimes

Accurate and low-latency quantum state discrimination is essential for protocols involving mid-circuit measurement (MCM) and conditional feed-forward. In superconducting quantum systems, conventional readout pipelines transfer measurement data to host processors for post-processing, introducing millisecond-scale delays that far exceed qubit coherence times. To overcome this bottleneck, we present an in-situ machine learning (ML) inference engine implemented on an FPGA for real-time quantum state discrimination. Our design performs inference directly on digitized readout signals with 40 ns latency, supports both qubit and qutrit readout, and enables conditional operations without host-side intervention. This capability is critical for MCM and for feedback-driven protocols such as quantum error correction. We validate the system on superconducting transmon hardware, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. We further demonstrate conditional qutrit logic driven by FPGA-resident classification, highlighting the potential of low-latency ML-on-FPGA control for NISQ applications and scalable fault-tolerant quantum computing.

Vora, Neel [Lawrence Berkeley National Laboratory ↗

Development of Power Electronics for a 0.2kW-Class Ion Thruster

Applications that might benefit from low power ion propulsion systems include Earth-orbit magnetospheric mapping satellite constellations, low Earth-orbit satellites, geosynchronous Earth-orbit satellite north-south stationkeeping, and asteroid orbiters. These spacecraft are likely to have masses on the order of 50 to 500 kg with up to 0.5 kW of electrical power available. A power processing unit for a 0.2 kW-class ion thruster is currently under development for these applications. The first step in this effort is the development and testing of a 0.24 kW beam power supply. The design incorporates a 20 kHz full bridge topology with multiple secondaries connected in series to obtain outputs of up to 1200 V(sub DC). A current-mode control pulse width modulation circuit built using discrete components was selected for this application. An input voltage of 28 +/- 4 V(sub DC) was assumed, since the small spacecraft for which this system is targeted are anticipated to have unregulated low voltage busses. Efficiencies in excess of 91 percent were obtained at maximum output power. The total mass of the breadboard was less than 1.0 kg and the component mass was 0.53 kg. It is anticipated that a complete flight power processor could weigh about 2.0 kg.

Pinero, Luis R.↗