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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 541 records · Page 30
All sourcesNASA NTRSDOE OSTI
DOE OSTI2019

Energy Harvesting Remotely Monitored Sealing Array (RMSA) (Field Test Annual Report)

Sandia National Laboratories (SNL) is investigating photovoltaic (PV) cell configurations, integrating them with the battery-operated Remotely Monitored Sealing Array (RMSA), and testing and evaluating performance for enhanced battery life under various lighting conditions at a facility at the Savannah River Site (SRS) or Savannah River National Laboratory (SRNL). Unattended safeguards equipment (e.g. seals) incorporates many low-power electronic circuits, which are often powered by expensive and environmentally toxic lithium batteries. These batteries must periodically be replaced, adding a radiological hazard for both safeguards inspectors and operators. An extended field test of these prototype PV energy harvesting (EH) RMSAs at an operational nuclear facility will give additional data and allow for an analysis of this technology in a variety of realistic conditions, which will be documented in a final report. RMSAs are used for this testing, but SNL envisions energy harvesting technology may be applicable to additional safeguards equipment.

14 SOLAR ENERGY↗
NASA NTRS2009

Low-Noise MMIC Amplifiers for 120 to 180 GHz

Three-stage monolithic millimeter-wave integrated-circuit (MMIC) amplifiers capable of providing useful amounts of gain over the frequency range from 120 to 180 GHz have been developed as prototype low-noise amplifiers (LNAs) to be incorporated into instruments for sensing cosmic microwave background radiation. There are also potential uses for such LNAs in electronic test equipment, passive millimeter- wave imaging systems, radar receivers, communication receivers, and systems for detecting hidden weapons. The main advantage afforded by these MMIC LNAs, relative to prior MMIC LNAs, is that their coverage of the 120-to-180-GHz frequency band makes them suitable for reuse in a wider variety of applications without need to redesign them. Each of these MMIC amplifiers includes InP transistors and coplanar waveguide circuitry on a 50- mthick chip (see Figure 1). Coplanar waveguide transmission lines are used for both applying DC bias and matching of input and output impedances of each transistor stage. Via holes are incorporated between top and bottom ground planes to suppress propagation of electromagnetic modes in the substrate. On the basis of computational simulations, each of these amplifiers was expected to operate with a small-signal gain of 14 dB and a noise figure of 4.3 dB. At the time of writing this article, measurements of noise figures had not been reported, but on-chip measurements had shown gains approaching their simulated values (see Figure 2).

Pukala, David↗
NASA NTRS2011

PCB-Based Break-Out Box

Break-out boxes (BOBs) are necessary for all electrical integration/cable checkouts and troubleshooting. Because the price of a BOB is high, and no work can be done without one, often the procedure stops, simply waiting for a BOB. A less expensive BOB would take less time in the integration, testing, and troubleshooting process. The PCB-based BOB works and looks the same as a standard JPL BOB, called Gold Boxes. The only differences between the old BOB and the new PCB-based BOB is that the new one has 80 percent of its circuitry in a printed circuit board. This process reduces the time for fabrication, thus making the BOBs less expensive. Moreover, because of its unique design, the new BOBs can be easily assembled and fixed. About 80 percent of the new PCB-based BOB is in a $22 (at the time of this reporting) custom-designed, yet commercially available PCB. This device has been used successfully to verify that BOB cables were properly made. Also, upon completion, the BOB was beeped out via a multimeter to ensure that all sockets on the connectors were properly connected to the respective banana jack. When compared to the Gold Box BOBs, the new BOB has many advantages. It is much more cost efficient, it delivers equal usability at substantially lower cost of the BOB, and the Gold Box is much heavier when compared to the new BOB. The new BOB is also a bit longer and much more versatile in that connectors are easily changeable and if a banana jack is broken, it can be replaced instead of throwing away an entire BOB.

Lee, Jason H.↗
DOE OSTI2026

Higher Efficiency, Demand Flexible Refrigerator with On-Demand Micro-Vibrational De-icing Technology

Refrigerator technology has advanced significantly over the last couple of decades. Today’s refrigerators use only about 25% of the energy that was required to power models built in 1975. Even as they continually improve efficiency to meet standards, refrigerators have increased in size by almost 20%, added energy-consuming features such as through-the-door ice, and provide more benefits than ever before. However, a few challenges and technology gaps are preventing further improvement of the demand responsiveness and efficiency of the refrigerators. One of the major technology gaps in existing refrigerators is their outdated de-icing process. When the evaporator generates frost, an old-fashioned resistive heating element melts the ice. Most refrigerators have a timed defrost cycle, rather than an active system that could monitor the state of the frost. In these systems, not only is the precious electricity used at its least efficient form of conversion (direct conversion of electricity to heat), but also all the latent heat associated with the ice is wasted during the melting process. On top of that, the refrigerator needs to work harder to pull the temperature down after defrosting, and, last but not least, the food quality is severely impacted by the temperature swings during the defrost cycle. According to a study, the EU alone wastes 89 million tons of food in the supply chain every year. Any temperature swing during defrosting (about 6F according to Emerson for low-temperature cases) can negatively impact the shelf life of meat and other products for multiple days. All these issues can happen during the peak demand time of the electric grid. Unlike the conventional systems, the proposed novel advanced micro-vibrational deicing process uses no heat for defrosting. Instead, it uses the micro vibrations generated by a piezoelectric or vibration-generating module to mechanically break ice from the heat exchanger almost instantaneously. The project titled “Higher Efficiency, Demand Flexible Refrigerator with On-Demand Micro-Vibrational De-icing Technology, performed by Ultrasonic Technology Solutions, LLC (UTS) of Knoxville, TN, in collaboration with Emerson (now Copeland), represents the final phase of a multi-year effort funded under the U.S. Department of Energy’s Building Technologies Office (BTO) BENEFIT FOA 2020. Initiated on October 1, 2021, and completed after a nine-month no-cost extension ending September 30, 2025, this project aimed to develop and validate a novel micro-vibrational mechanical defrosting system, achieving more than 25% improvement in defrosting energy efficiency over conventional baseline defrosting technologies. Over sixteen quarters, the project advanced from fundamental ice-mechanical characterization and prototype development to full-scale system integration and validation. Initial efforts established project management infrastructure and characterized ice adhesion properties, followed by the design and fabrication of early aluminum-based prototypes for resonance frequency testing. Subsequent quarters saw rapid technical progression, including the identification of optimal piezoelectric and motor-based vibration mechanisms, the demonstration of effective de-icing over 6x6-inch aluminum surfaces. The team achieved its Go/No-Go milestone by exceeding the 25% energy-efficiency improvement target—reaching up to 3,340% under optimized conditions—and later confirmed that motor-driven systems offered superior performance and energy efficiency compared to piezoelectric alternatives. Continued refinement led to the development of amplifier systems on printed circuit boards, improved control and instrumentation hardware, and integration into full-scale heat exchanger (HX) prototypes at both UTS and Copeland facilities. Multiple vibration-mounting studies and frost-growth experiments guided mechanical optimization and noise-mitigation strategies, achieving a 17.5 dB reduction in sound pressure level and verifying robust mechanical performance. Advanced analyses, including modal and harmonic simulations, established a quantitative understanding of vibrational behavior and de-icing efficiency across >1000 cm² systems. The final project phase successfully demonstrated scalable integration within reach-in and chest freezer prototypes, confirmed >25% efficiency improvements in large-area systems, and completed a comprehensive business model and scale-up strategy identifying electric defrost systems as the primary beachhead market. The culmination of this DOE-supported effort establishes micro-vibrational defrosting as a viable, high-efficiency, low-noise, and demand-flexible de-icing technology, paving the way for commercial deployment and broader application in next-generation refrigeration systems.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2019

2019 Wireless Test Bed Range Manual

Idaho National Laboratory (INL), Next Generation Wireless Test Bed (NGWTB) program, is part of the Critical Infrastructure Protection (CIP) initiative. Our nation’s reliance on wireless and Internet technology is rapidly evolving as more corporations and government agencies, employees, and handheld devices include mobile connectivity for both voice and data. The competitive advantage offered by a mobile workforce is leading many corporations to make wireless integration and convergence a top business priority. Similarly, military systems worldwide are rapidly embracing next-generation commercial technologies to accelerate network-centric capabilities and provide enhanced situational awareness. While handheld devices such as laptops, BlackBerrys, and cell phones once had limited mobility and range, they are rapidly incorporating new and multiple protocols such as Bluetooth, Wi-Fi, Satellite, and broadband cellular (3G/4G) on a single platform to increase their effectiveness and agility. Worldwide there is exponential growth in public Wi-Fi and/or Satellite connectivity access nodes, and 3G/4G cellular continues to evolve and expand the range and speed of these devices. Additionally, critical infrastructure networks, previously isolated or connected with dedicated wireline circuits, are incorporating Zigbee for wireless sensor networks, wireless LANs for maintenance functions, and cellular or Internet based backhaul to manage control centers. Yet with all the build-up surrounding wireless technology, few understand the complexities surrounding wireless protocols and security, the risks of converged network infrastructures, need for interoperability of communication systems, or mitigation measures to safely use and improve new technologies in both commercial and military environments. With no single vendor source for all the telecommunications equipment needed for wireless infrastructure upgrades, and no one entity providing end-to-end testing or independent validation, the INL's NGWTB program fulfills a niche for facilitating integrated testing of multiple technologies, across multiple wireless domains, of next generation wireless telecommunications systems. NGWTB engineers and technicians have constructed and operate domain infrastructure in the Wireless Personal Area Network (WPAN), Wireless Local Area Network (WLAN), Wireless Metropolitan Area Networks (WMAN), and Wireless Wide Area Networks (WWAN). Advantages that make the INL's NGWTB the place to conduct project and programmatic testing include: • NTIA Experimental Station authority • Geographically isolated and low-noise radio frequency (RF) test areas located on a 890 sm DOE reservation • Access to isolated high-speed LAN and FOT networks The rollout of next-generation networks will involve deploying new technologies at every level including new: handsets, frequencies, antenna arrays, cell configurations that are optimized for both data and voice, massive upgrade of cell controllers’ “land-line” phone links from low bandwidth connections to higher capacity fiber or wireless backhaul, and integration of voice switching and Internet/data network protocols (Voice-Over-IP, Web phones). These systems are expected to greatly transform our nation's communications infrastructure and the types of services it provides.

2G↗
NASA NTRS1988

Development of a unit cell for a Ge:Ga detector array

Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.

Source record↗
NASA NTRSDate not supplied

Progress Towards SiC ASICs for Extreme Temperature and Radiation Environments

This presentation describes development and demonstrations of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. Silicon carbide (SiC) junction field effect transistor-resistor (JFET-R) ICs fabricated by NASA Glenn Research Center with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient, 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber, and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C temperature span) without significant change in signal (input /output) or power supply voltages. While the operating frequency and functional complexity is far below silicon-based ICs, these SiC application specific ICs (ASICs) are nevertheless becoming capable of providing unique and advantageous harsh-environment circuit functionality without cooling/sheltering overhead. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards manufacture, a majority of processing steps to realize the next SiC JFET-R IC prototype wafer run have been outsourced to commercial foundry. It is expected that further upscaling combined with technology transfer to commercial production will lower investment and risk barriers to useful application deployment.

high temperature↗
NASA NTRS1979

Feasibility study of silicon nitride protection of plastic encapsulated semiconductors

The application of low temperature silicon nitride protective layers on wire bonded integrated circuits mounted on lead frame assemblies is reported. An evaluation of the mechanical and electrical compatibility of both plasma nitride and photochemical silicon nitride (photonitride) passivations (parallel evaluations) of integrated circuits which were then encapsulated in plastic is described. Photonitride passivation is compatible with all wire bonded lead frame assemblies, with or without initial chip passivation. Plasma nitride passivation of lead frame assemblies is possible only if the chip is passivated before lead frame assembly. The survival rate after the environmental test sequence of devices with a coating of plasma nitride on the chip and a coating of either plasma nitride or photonitride over the assembled device is significantly greater than that of devices assembled with no nitride protective coating over either chip or lead frame.

Peters, J. W.↗
NASA NTRSDate not supplied

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗
DOE OSTI2023

Detection of False Data Injection Attacks in Battery Stacks Using Input Noise-Aware Nonlinear State Estimation and Cumulative Sum Algorithms

Grid-scale battery energy storage systems (BESSs) are vulnerable to false data injection attacks (FDIAs), which could be used to disrupt state of charge (SoC) estimation. Inaccurate SoC estimation has negative impacts on system availability, reliability, safety, and the cost of operation. In this article a combination of a Cumulative Sum (CUSUM) algorithm and an improved input noise-aware extended Kalman filter (INAEKF) is proposed for the detection and identification of FDIAs in the voltage and current sensors of a battery stack. The series-connected stack is represented by equivalent circuit models, the SoC is modeled with a charge reservoir model and the states are estimated using the INAEKF. Further, the root mean squared error of the states’ estimation by the modified INAEKF was found to be superior to the traditional EKF. By employing the INAEKF, this article addresses the research gap that many state estimators make asymmetrical assumptions about the noise corrupting the system. Additionally, the INAEKF estimates the input allowing for the identification of FDIA, which many alternative methods are unable to achieve. The proposed algorithm was able to detect attacks in the voltage and current sensors in 99.16% of test cases, with no false positives. Utilizing the INAEKF compared to the standard EKF allowed for the identification of FDIA in the input of the system in 98.43% of test cases.

25 ENERGY STORAGE↗
DOE OSTI2024

ION Work Reduction Opportunity Realization Demonstration

The purpose of this research was to realize one of the advanced training work reduction opportunities first presented in the Idaho National Laboratory (INL) report, “Process for Significant Nuclear Work Function Innovation Based on Integrated Operations Concepts” (INL/EXT-21-64134) [1], with a nuclear power plant (NPP) research partner. Researchers modernized two trainings: (1) an accredited instructor-led training (ILT) overview course on Westinghouse DS 480-volt (V) circuit breakers to a multimedia-focused computer-based-training (CBT) learning module, and (2) an on-demand chaptered video on how to properly rack and un-rack a Westinghouse DS 480-V circuit breaker. These modernized work products were developed and implemented in a manner consistent with the industry guidelines found in Institution of Nuclear Power Operations (INPO) Teaching and Learning 23-001 [2]. Researchers calculated that the modernized accredited training course reduced the time necessary to prepare and deliver the training material by a factor of 8:1. The amount of time learners spend in class could be reduced by this same factor. In other words, if a course took 8 hours to deliver a class, the new CBT instruction would take just over 1 hour. The researchers noted that the requirement for any practicum training by the learners with the instructor(s) would remain in place. But through interviews with new and experienced learners, the researchers discovered that the confidence of these learners in performing the racking and un-racking of the circuit breaker improved as a result of using the new modernized CBT process. Additionally, the learners who tested the modernized work products enjoyed the modernized CBT and the learning video significantly more than current in-class learning methods. These are encouraging results for the nuclear industry, as this modernization of training can be applied to other classes and is scalable across the industry. In line with the Integrated Operations for Nuclear (ION) model, positive workload analysis supports the investment of resources in modernizing NPP training processes and infrastructure. Implementation of the advanced training technologies in this report is likely to result in substantive long-term workload benefits to instructors and learners and result in hard-dollar savings on contractor spends. Additionally, investment in these modernized training processes will result in improved learner proficiency. The results of this research can be applied to additional operator, technical, and general training topics to provide additional workload and learning benefits in addition to what was explored.

42 ENGINEERING↗
DOE OSTI2021

System-on-Chip approach microwave diagnostics development for burning plasma

System-on-chip (SoC) millimeter wave integrated circuit technology has been developed and employed in chip heterodyne radiometers in Electron Cyclotron Emission Imaging (ECEI) and Microwave Imaging Reflectometer (MIR) on the DIII-D tokamak for 2D electron temperature and density fluctuation diagnostics. The W-band (75-110 GHz) ECEI system has been employed with 20 poloidal horn receiver modules with customized monolithic integrated circuit chips and internal local oscillator coupling path. The new SoC approach demonstrates > 30 dB additional gain on the receiver and 95% electronics noise suppression compared to the previous Schottky diode mixer array . An F-band (110-140 GHz) receiver chip has been developed to measure MHD and turbulence behavior on the DIII-D high-field side, such as Alfven eigenmodes. Furthermore, it can image pedestal structure evolution on fusion facilities with stronger magnetic fields, such as ASDEX-U, EAST, HL-2M, and LHD. The F-band chip performance has been tested in the laboratory. Also, V-band (55-75 GHz) transmitter and receiver modules (55-75 GHz) have been developed for DIII-D and NSTX-U Furthermore, microwave Imaging Reflectometer (MIR) application suitability for 2D density fluctuation imaging on the pedestal region.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2026

Non-Invasive Electrode Impedance Estimation for Optimized Charge Profile Parameterization of Lithium-Ion Batteries

This work presents a non-invasive method for parameterizing a physically motivated equivalent circuit model of lithium-ion batteries using operando electrochemical impedance spectroscopy and time-domain data. The proposed model consists exclusively of linear circuit elements, enabling computationally efficient simulation and real-time implementation on battery management system chips. By integrating frequency- and time-domain measurements, the model accurately estimates internal states such as the negative electrode potential, achieving a root mean square error of 12.3 mV during fast charging validation. Parameterization requires only rate tests with sinusoidal perturbations at three different ambient temperatures, making the approach experimentally accessible. The model reveals key insights into battery behavior, including rate-dependent overpotentials primarily governed by charge transfer kinetics at the positive electrode, and temperature-dependent impedance contributions from both charge transfer and solid-state diffusion processes. Validation using reference electrodes confirms the model’s ability to detect lithium plating onset and reproduce impedance behavior across a wide range of operating conditions. The approach enables in situ optimization of fast charging profiles and lays the foundation for future extensions incorporating aging effects and plating dynamics.

25 ENERGY STORAGE↗
NASA NTRS1985

Fast Dual Analog-to-Digital Converter

Unit delivers blocks of quadrature data to computer memory. Contains 105 integrated circuit packages in 19 by 3 1/2 inch (48.26 by 8.39 cm) rack mounted drawer with internal force air blower. Intended for synchronous sampling of quadrature pairs of data, samples with minimal skew (about 10 nanoseconds) using video-type high-speed sampling technology. Unit equipped for computer controlled self-testing. Originally developed for planetary radar data-acquisition system.

Wallis, D. E.↗
NASA NTRS1992

Microstrip proportional counter development at MSFC

Microstrip detectors are an exciting new development in proportional counter design fabricated using integrated circuit-type photolithography techniques; they therefore offer very high spatial accuracy and uniformity. A development program is underway at NASA-Marshall to produce large-area microstrips for use in an X-ray detector balloon flight program and to investigate the general performance limits of these new devices. Microstrips tested so far have been fabricated both in-house using standard photolithographic techniques and by an outside contractor using electron beam technology. Various substrate materials have been tested along with different electrode configurations. The distributions of pickup on subdivided cathodes on both top and bottom surfaces of the microstrips are also being investigated for use as two-dimensional imaging detectors. Data from these tests in the development of a large-area device will be presented.

Fulton, M. A.↗
NASA NTRS2007

Power-Amplifier Module for 145 to 165 GHz

A power-amplifier module that operates in the frequency range of 145 to 165 GHz has been designed and constructed as a combination of (1) a previously developed monolithic microwave integrated circuit (MMIC) power amplifier and (2) a waveguide module. The amplifier chip was needed for driving a high-electron-mobility-transistor (HEMT) frequency doubler. While it was feasible to connect the amplifier and frequency-doubler chips by use of wire bonds, it was found to be much more convenient to test the amplifier and doubler chips separately. To facilitate separate testing, it was decided to package the amplifier and doubler chips in separate waveguide modules. Figure 1 shows the resulting amplifier module. The amplifier chip was described in "MMIC HEMT Power Amplifier for 140 to 170 GHz" (NPO-30127), NASA Tech Briefs, Vol. 27, No. 11, (November 2003), page 49. To recapitulate: This is a three-stage MMIC power amplifier that utilizes HEMTs as gain elements. The amplifier was originally designed to operate in the frequency range of 140 to 170 GHz. The waveguide module is based on a previously developed lower frequency module, redesigned to support operation in the frequency range of 140 to 220 GHz. Figure 2 presents results of one of several tests of the amplifier module - measurements of output power and gain as functions of input power at an output frequency of 150 GHz. Such an amplifier module has many applications to test equipment for power sources above 100 GHz.

Samoska, Lorene↗
DOE OSTI2026

Digital Silicon Photomultiplier Chip Testing

Silicon Photomultipliers (SiPMs) are highly sensitive photodetectors. Traditional analog SiPMs require complex external readout electronics. Digital SiPMs (dSiPMs) include digital readout circuitry directly on-chip, offering superior timing resolution, reduced power consumption and compact size, pixel-level masking for active noise reduction. The primary objectives of this study are to, verify digital logic integrity of the shift registers used for controlling the pixel masking circuit, and determine the dark count rate of individual pixels as a function of bias voltage and clock frequency. I observe and explain behavior of the shift register and counting circuit.

Graham, Bennett [U. Chicago (main)]↗
NASA NTRS2010

Compact Rare Earth Emitter Hollow Cathode

A compact, high-current, hollow cathode utilizing a lanthanum hexaboride (LaB6) thermionic electron emitter has been developed for use with high-power Hall thrusters and ion thrusters. LaB6 cathodes are being investigated due to their long life, high current capabilities, and less stringent xenon purity and handling requirements compared to conventional barium oxide (BaO) dispenser cathodes. The new cathode features a much smaller diameter than previously developed versions that permit it to be mounted on axis of a Hall thruster ( internally mounted ), as opposed to the conventional side-mount position external to the outer magnetic circuit ("externally mounted"). The cathode has also been reconfigured to be capable of surviving vibrational loads during launch and is designed to solve the significant heater and materials compatibility problems associated with the use of this emitter material. This has been accomplished in a compact design with the capability of high-emission current (10 to 60 A). The compact, high-current design has a keeper diameter that allows the cathode to be mounted on the centerline of a 6- kW Hall thruster, inside the iron core of the inner electromagnetic coil. Although designed for electric propulsion thrusters in spacecraft station- keeping, orbit transfer, and interplanetary applications, the LaB6 cathodes are applicable to the plasma processing industry in applications such as optical coatings and semiconductor processing where reactive gases are used. Where current electrical propulsion thrusters with BaO emitters have limited life and need extremely clean propellant feed systems at a significant cost, these LaB6 cathodes can run on the crudest-grade xenon propellant available without impact. Moreover, in a laboratory environment, LaB6 cathodes reduce testing costs because they do not require extended conditioning periods under hard vacuum. Alternative rare earth emitters, such as cerium hexaboride (CeB6) can be used in this configuration with possibly an even longer emitter life. This cathode is specifically designed to integrate on the centerline of a high-power Hall thruster, thus eliminating the asymmetries in the plasma discharge common to cathodes previously mounted externally to the thruster s magnetic circuit. An alternative configuration for the cathode uses an external propellant feed. This diverts a fraction of the total cathode flow to an external feed, which can improve the cathode coupling efficiency at lower total mass flow rates. This can improve the overall thruster efficiency, thereby decreasing the required propellant loads for different missions. Depending on the particular mission, reductions in propellant loads can lead to mission enabling capabilities by allowing launch vehicle step-down, greater payload capability, or by extending the life of a spacecraft.

Watkins, Ronald↗