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At least 559 records · Page 31

PCB-on-DBC GaN Power Module Design with High-Density Integration and Double-Sided Cooling

Lateral gallium nitride (GaN) high-electron-mobility transistors (HEMTs) present better electrical characteristics compared to silicon or silicon carbide devices such as high switching speed and low gate charge, but also present additional challenges on the module design. Here, this paper discusses a high-density GaN power module with double-sided cooling, low inductance, on-package decoupling capacitors, and integrated gate drivers. The GaN dies as well as the gate drive are sandwiched between the printed circuit board (PCB) and direct bonded copper (DBC) substrate to achieve compact loop and double-sided cooling effect. Design considerations and thermal performance are analyzed. A module assembly procedure is presented utilizing the layer-by-layer attachment process. Finally, a 2.7 cm x 1.8 cm half-bridge GaN power module is fabricated and tested, achieving a low power-loop inductance of 1.03 nH, and the overshoot voltage of the switching waveform is less than 5% under a 400-V/25-A double-pulse test. The thermal resistance is 0.32 K/W, verified by simulation and experimental results. The design and assembly process can be generalized and applied to high power applications to achieve high power density and high performance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

The Advanced Communication Technology Satellite and ISDN

This paper depicts the Advanced Communication Technology Satellite (ACTS) system as a global central office switch. The ground portion of the system is the collection of earth stations or T1-VSAT's (T1 very small aperture terminals). The control software for the T1-VSAT's resides in a single CPU. The software consists of two modules, the modem manager and the call manager. The modem manager (MM) controls the RF modem portion of the T1-VSAT. It processes the orderwires from the satellite or from signaling generated by the call manager (CM). The CM controls the Recom Laboratories MSPs by receiving signaling messages from the stacked MSP shelves ro units and sending appropriate setup commands to them. There are two methods used to setup and process calls in the CM; first by dialing up a circuit using a standard telephone handset or, secondly by using an external processor connected to the CPU's second COM port, by sending and receiving signaling orderwires. It is the use of the external processor which permits the ISDN (Integrated Services Digital Network) Signaling Processor to implement ISDN calls. In August 1993, the initial testing of the ISDN Signaling Processor was carried out at ACTS System Test at Lockheed Marietta, Princeton, NJ using the spacecraft in its test configuration on the ground.

Lowry, Peter A.↗

Electronic Components and Circuits for Extreme Temperature Environments

Planetary exploration missions and deep space probes require electrical power management and control systems that are capable of efficient and reliable operation in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures will not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures; thereby reducing system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior and tolerance in the electrical and thermal properties of semiconductor and dielectric materials at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial-off-the-shelf as well as developed components that are being characterized include switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being investigated for potential use in low temperature applications. An overview of the NASA Glenn Research Center Low Temperature Electronic Program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained through in-house component and circuit testing will also be discussed. Ongoing research activities that are being performed in collaboration with various organizations will also be presented.

Patterson, Richard L.↗

Superconducting Digital Multiplexers for Sensor Arrays

Arrays of cryogenic microbolometers and other cryogenic detectors are being developed for infrared imaging. If the signal from each sensor is amplified, multiplexed, and digitized using superconducting electronics, then this data can be efficiently read out to ambient temperature with a minimum of noise and thermal load. HYPRES is developing an integrated system based on SQUID amplifiers, a high-resolution analog-to-digital converter (ADC) based on RSFQ (rapid single flux quantum) logic, and a clocked RSFQ multiplexer. The ADC and SQUIDs have already been demonstrated for other projects, so this paper will focus on new results of a digital multiplexer. Several test circuits have been fabricated using Nb Josephson technology and are about to be tested at T = 4.2 K, with a more complete prototype in preparation.

Kadin, Alan M.↗

Improving the Visible and Infrared Contrast Ratio of Microshutter Arrays

Three device improvements have been developed that dramatically enhance the contrast ratio of microshutters. The goal of a microshutter is to allow as much light through as possible when the shutters are in the open configuration, and preventing any light from passing through when they are in the closed position. The ratio of the transmitted light that is blocked is defined here as the contrast ratio. Three major components contribute to the improved performance of these microshutters: 1. The precise implementation of light shields, which protect the gap around the shutters so no light can leak through. It has been ascertained that without the light shield there would be a gap on the order of 1 percent of the shutter area, limiting the contrast to a maximum of 100. 2. The precise coating of the interior wall of each microshutter was improved with an insulator and metal using an angle deposition technique. The coating prevents any infrared light that finds an entrance on the surface of the microshutter cell from being emitted from a sidewall. Since silicon is in effect transparent to any light with a wavelength longer than .1 micrometer, these coatings are essential to blocking any stray signals when the shutters are closed. 3. A thin film of molybdenum nitride (MoN) was integrated onto the surface of the microshutter blade. This film provides the majority of light blockage over the microshutter and also ensures that the shutter can be operated over a wide temperature range by maintaining its flatness. These improvements were motivated by the requirements dictated by the James Webb Space Telescope NIRSpec instrument. The science goals of the NIRSpec require observing some of the very faintest objects in a given field of view that also may contain some very bright objects. To observe the faint objects, the light from the bright objects - which could be thousands of times brighter - must be completely blocked. If a closed microshutter is even slightly transmissive, a very bright object will still transmit a small signal, which can be larger than a signal from a very faint object transmitted through an open shutter. Since this situation can completely corrupt the results, it was necessary that the closed shutters be able to attenuate light by at least a factor of 2,000. There currently exist four flight-quality microshutter arrays that have been fully or are currently undergoing testing and the results support that the three improvements described above have successfully led to contrast levels greater than 50,000 in over 99 percent of the microshutters at an operating temperature of 35 K. Applications for these high-contrast microshutters are in the photomask generation and stepper equipment used to make integrated circuits and microelectromechanical (MEMS) devices. Since microshutters are a reconfigurable optical element, their versatility in these industries provides an improvement over printed masks and fixed projection alignment systems.

Jhabvala, Murzy↗

The Correlation Radiometer - A New Application in MM-Wave Total Power Radiometry

We describe the design and performance of a 180 GHz correlation radiometer suitable for remote sensing. The radiometer provides continuous comparisons between a the observed signal and a reference load to provide stable radiometric baselines. The radiometer was assembled and tested using parts from the GeoSTAR-II instrument and is fully compatible with operation in a synthetic aperture radiometer or as a standalone technology for use in microwave sounding and imaging. This new radiometer was tested over several days easily demonstrating the required 6 hour stability requirement for observations of mean brightness temperature for a geostationary instrument.

Monolithic Microwave Integrated Circuit (MMIC)↗

System for Automated Calibration of Vector Modulators

Vector modulators are used to impose baseband modulation on RF signals, but non-ideal behavior limits the overall performance. The non-ideal behavior of the vector modulator is compensated using data collected with the use of an automated test system driven by a LabVIEW program that systematically applies thousands of control-signal values to the device under test and collects RF measurement data. The technology innovation automates several steps in the process. First, an automated test system, using computer controlled digital-to-analog converters (DACs) and a computer-controlled vector network analyzer (VNA) systematically can apply different I and Q signals (which represent the complex number by which the RF signal is multiplied) to the vector modulator under test (VMUT), while measuring the RF performance specifically, gain and phase. The automated test system uses the LabVIEW software to control the test equipment, collect the data, and write it to a file. The input to the Lab - VIEW program is either user-input for systematic variation, or is provided in a file containing specific test values that should be fed to the VMUT. The output file contains both the control signals and the measured data. The second step is to post-process the file to determine the correction functions as needed. The result of the entire process is a tabular representation, which allows translation of a desired I/Q value to the required analog control signals to produce a particular RF behavior. In some applications, corrected performance is needed only for a limited range. If the vector modulator is being used as a phase shifter, there is only a need to correct I and Q values that represent points on a circle, not the entire plane. This innovation has been used to calibrate 2-GHz MMIC (monolithic microwave integrated circuit) vector modulators in the High EIRP Cluster Array project (EIRP is high effective isotropic radiated power). These calibrations were then used to create correction tables to allow the commanding of the phase shift in each of four channels used as a phased array for beam steering of a Ka-band (32-GHz) signal. The system also was the basis of a breadboard electronic beam steering system. In this breadboard, the goal was not to make systematic measurements of the properties of a vector modulator, but to drive the breadboard with a series of test patterns varying in phase and amplitude. This is essentially the same calibration process, but with the difference that the data collection process is oriented toward collecting breadboard performance, rather than the measurement of output from a network analyzer.

Lux, James↗

CMOS output buffer wave shaper

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

Albertson, L.↗

SODR Memory Control Buffer Control ASIC

The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

Hodson, Robert F.↗

Radiation-Hard SpaceWire/Gigabit Ethernet-Compatible Transponder

A radiation-hard transponder was developed utilizing submicron/nanotechnology from IBM. The device consumes low power and has a low fabrication cost. This device utilizes a Plug-and-Play concept, and can be integrated into intra-satellite networks, supporting SpaceWire and Gigabit Ethernet I/O. A space-qualified, 100-pin package also was developed, allowing space-qualified (class K) transponders to be delivered within a six-month time frame. The novel, optical, radiation-tolerant transponder was implemented as a standalone board, containing the transponder ASIC (application specific integrated circuit) and optical module, with an FPGA (field-programmable gate array) friendly parallel interface. It features improved radiation tolerance; high-data-rate, low-power consumption; and advanced functionality. The transponder utilizes a patented current mode logic library of radiation-hardened-by-architecture cells. The transponder was developed, fabricated, and radhard tested up to 1 MRad. It was fabricated using 90-nm CMOS (complementary metal oxide semiconductor) 9 SF process from IBM, and incorporates full BIT circuitry, allowing a loop back test. The low-speed parallel LVCMOS (lowvoltage complementary metal oxide semiconductor) bus is compatible with Actel FPGA. The output LVDS (low-voltage differential signaling) interface operates up to 1.5 Gb/s. Built-in CDR (clock-data recovery) circuitry provides robust synchronization and incorporates two alarm signals such as synch loss and signal loss. The ultra-linear peak detector scheme allows on-line control of the amplitude of the input signal. Power consumption is less than 300 mW. The developed transponder with a 1.25 Gb/s serial data rate incorporates a 10-to-1 serializer with an internal clock multiplication unit and a 10-1 deserializer with internal clock and data recovery block, which can operate with 8B10B encoded signals. Three loop-back test modes are provided to facilitate the built-in-test functionality. The design is based on a proprietary library of differential current switching logic cells implemented in the standard 90-nm CMOS 9SF technology from IBM. The proprietary low-power LVDS physical interface is fully compatible with the SpaceWire standard, and can be directly connected to the SFP MSA (small form factor pluggable Multiple Source Agreement) optical transponder. The low-speed parallel interfaces are fully compatible with the standard 1.8 V CMOS input/output devices. The utilized proprietary annular CMOS layout structures provide TID tolerance above 1.2 MRad. The complete chip consumes less than 150 mW of power from a single 1.8-V positive supply source.

Katzman, Vladimir↗

Developing Avionics Hardware and Software for Rocket Engine Testing

My summer was spent working as an intern at Kennedy Space Center in the Propulsion Avionics Branch of the NASA Engineering Directorate Avionics Division. The work that I was involved with was part of Rocket University's Project Neo, a small scale liquid rocket engine test bed. I began by learning about the layout of Neo in order to more fully understand what was required of me. I then developed software in LabView to gather and scale data from two flowmeters and integrated that code into the main control software. Next, I developed more LabView code to control an igniter circuit and integrated that into the main software, as well. Throughout the internship, I performed work that mechanics and technicians would do in order to maintain and assemble the engine.

liquid rocket↗

The Impact of Harness Impedance on Hall Thruster Discharge Oscillations

Hall thrusters exhibit characteristic discharge voltage and current oscillations during steady-state operation. The lower frequency breathing-mode current oscillations are inherent to each thruster and could impact thruster operation and power processing unit (PPU) design. The design of the discharge output filter, in particular, the output capacitor is important because it supplies the high peak current oscillations that the thruster demands. However, space-rated, high-voltage capacitors are not readily available and can have significant mass and volume. So, it is important for a PPU designer to know what is the minimum amount of capacitance required to operate a thruster. Through Simulation Program with Integrated Circuit Emphasis modeling and electrical measurements on the Hall Effect Rocket with Magnetic Shielding thruster, it was shown that the harness impedance between the power supply and the thruster is the main contributor towards generating voltage ripple at the thruster. Also, increasing the size of the discharge filter capacitor, as previously implemented during thruster tests, does not reduce the voltage oscillations. The electrical characteristics of the electrical harness between the discharge supply and the thruster is crucial to system performance and could have a negative impact on performance, life and operation.

hollow cathodes↗

The Impact of Harness Impedance on Hall Thruster Discharge Oscillations

Hall thrusters exhibit characteristic discharge voltage and current oscillations during steady-state operation. The lower frequency breathing-mode current oscillations are inherent to each thruster and could impact thruster operation and power processing unit (PPU) design. The design of the discharge output filter, in particular, the output capacitor is important because it supplies the high peak current oscillations that the thruster demands. However, space-rated, high-voltage capacitors are not readily available and can have significant mass and volume. So, it is important for a PPU designer to know what is the minimum amount of capacitance required to operate a thruster. Through Simulation Program with Integrated Circuit Emphasis modeling and electrical measurements on the Hall Effect Rocket with Magnetic Shielding thruster, it was shown that the harness impedance between the power supply and the thruster is the main contributor towards generating voltage ripple at the thruster. Also, increasing the size of the discharge filter capacitor, as previously implemented during thruster tests, does not reduce the voltage oscillations. The electrical characteristics of the electrical harness between the discharge supply and the thruster is crucial to system performance and could have a negative impact on performance, life and operation.

ion engines↗

Development of a Test-Bed for Testing and Refining EarthEn’s Supercritical CO 2 Based Energy Storage System

EarthEn’s energy storage concept leverages supercritical carbon dioxide (sCO 2 ) as a working fluid and relies on compact, high-performance components operating at elevated pressures and temperatures. To accelerate component development and reduce technical risk prior to larger-scale demonstrations, Oak Ridge National Laboratory (ORNL) developed a 100 kW-scale sCO 2 test-bed under a Cooperative Research and Development Agreement with EarthEn (CRADA NO. NFE-24-10050). The objective of the work was to design and construct a flexible experimental facility capable of reproducing key thermodynamic state points and heat-transfer conditions relevant to EarthEn’s thermal energy storage (TES) cycle, with particular emphasis on enabling development and evaluation of next-generation heat exchangers and TES concepts. The test-bed consists of a closed-loop sCO 2 circulation system housed within an open-topped enclosure. In its as-installed configuration, dense-phase sCO 2 is recirculated through a printed circuit recuperator, an electrically heated section, a throttling device used to simulate turbine expansion, and a water-cooled printed circuit heat exchanger that rejects heat to the building chilled-water system before returning to the pump. The pump is driven by a variable frequency drive, enabling controlled adjustment of flow and operating point. A comprehensive instrumentation suite was integrated to support both safe operation and high-quality data collection. Installed sensors include Coriolis flow meters for sCO 2 flow rate and density, resistance temperature detectors and thermocouples distributed throughout the loop (including the heated section and key heat exchanger ports), and pressure transducers for absolute and differential pressure measurements. The facility was designed to support high-pressure (19 MPa nominal) and high-temperature (575°C nominal) operation with credited overpressure protection provided by a rupture disk. Nominal operating conditions were selected to support 100 kW-class testing while maintaining flexibility for non-heated and heated shakedown, control development, and future integration of advanced TES test sections. In parallel with facility development, a system-level thermal-hydraulic model was created using Modelica-based tools to support component sizing, anticipate performance over targeted test conditions, and establish a framework for future model calibration against experimental data. At the conclusion of the project performance period, the facility was in final assembly, and the pressure boundary was nearly completed. However, several practical challenges associated with high-pressure/high-temperature systems and specialized component procurement impacted schedule and prevented initial pump-driven operation and full commissioning within the available resources. This report documents the as-built design, operating capabilities, and instrumentation, and it summarizes key lessons learned related to heater fabrication and testing, first-of-a-kind assembly factors, specialty flange supply constraints, and fill pump corrective actions. Finally, it outlines a phased plan for future commissioning and experimental campaigns, including control and instrumentation shakedown, heater characterization, model calibration, and testing at state points representative of EarthEn’s TES cycle.

25 ENERGY STORAGE↗

Evaluation of errors in prior mean and variance in the estimation of integrated circuit failure rates using Bayesian methods

The critical point of any Bayesian analysis concerns the choice and quantification of the prior information. The effects of prior data on a Bayesian analysis are studied. Comparisons of the maximum likelihood estimator, the Bayesian estimator, and the known failure rate are presented. The results of the many simulated trails are then analyzed to show the region of criticality for prior information being supplied to the Bayesian estimator. In particular, effects of prior mean and variance are determined as a function of the amount of test data available.

Fletcher, B. C.↗

Phasor Measurement Units Optimal Placement and Performance Limits for Fault Localization

Here, the performance limits of faults localization are investigated using synchrophasor data. The focus is on a non-trivial operating regime where the number of Phasor Measurement Unit (PMU) sensors available is insufficient to have full observability of the grid state. Proposed analysis uses the Kullback Leibler (KL) divergence between the distributions corresponding to different fault location hypotheses associated with the observation model. This analysis shows that the most likely locations are concentrated in clusters of buses more tightly connected to the actual fault site akin to graph communities. Consequently, a PMU placement strategy is derived that achieves a near-optimal resolution for localizing faults for a given number of sensors. The problem is also analyzed from the perspective of sampling a graph signal, and how the placement of the PMUs i.e. the spatial sampling pattern and the topological characteristic of the grid affect the ability to successfully localize faults. To highlight the superior performance of presented fault localization and placement algorithms, the proposed strategy is applied to a modified IEEE 34, IEEE-123 bus test cases and to data from a real distribution grid. Additionally, the detection of cyber-physical attacks is also examined where PMU data and relevant Supervisory Control and Data Acquisition (SCADA) network traffic information are compared to determine if a network breach has affected the integrity of the system information and/or operations.

42 ENGINEERING↗

Dynamic load simulator

Concepts and techniques for identifying and simulating both the steady state and dynamic characteristics of electrical loads for use during integrated system test and evaluation are discussed. The investigations showed that it is feasible to design and develop interrogation and simulation equipment to perform the desired functions. During the evaluation, actual spacecraft loads were interrogated by stimulating the loads with their normal input voltage and measuring the resultant voltage and current time histories. Elements of the circuits were optimized by an iterative process of selecting element values and comparing the time-domain response of the model with those obtained from the real equipment during interrogation.

Joncas, K. P.↗

A multichannel implantable telemetry system for flow, pressure, and ECG measurements

The design, principles of operation, and performance of an implantable miniaturized (48 cu cm in volume) multiplex telemetry system for simultaneous measurement of up to eight physiological parameters (including cardiovascular data) are described. Integrated circuits are used to reduce the size, complexity, and cost of fabrication. Power consumption is reduced using recently developed complementary MOS devices. PWM technique is selected as it is relatively easy to implement, lends itself to ICs, and provides an accurate means of transmitting data. The system is totally implantable within the chest of a test animal, with no wire penetrating through the skin. It is shown that the described system permits repeated measurement of the physiological effects of a variety of interventions in awake unanesthetized animals.

Fryer, T. B.↗