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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 577 records · Page 32

Real time feedback-based optimization of distributed energy resources

An example device includes a processor configured to receive a plurality of voltage values representing respective voltage magnitudes at voltage nodes in a first portion of a power system and determine, for each voltage node, a respective value of first and second voltage-constraint coefficients. The processor is also configured to receive a power value corresponding to a connection point of the first portion of the power system with a second portion of the power system and determine for the connection point, a respective value of first and second power-constraint coefficients. The processor is also configured to cause at least one energy resource connected to the first portion of the power system to modify an output power of the at least one energy resource based on the value of the first and second voltage-constraint coefficients for each voltage node and the value of the first and second power-constraint coefficients.

Dall'Anese, Emiliano↗

Hardware accelerated dynamic work creation on a graphics processing unit

A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

Gutierrez, Anthony↗

Bringing OpenCL to Commodity RISC-V CPUs

The importance of open-source hardware has been increasing in recent years with the introduction of the RISC-V Open ISA. This has also accelerated the push for support of the open-source software stack from compiler tools to full-blown operating systems. Parallel computing with today’s Application Programming Interfaces such as OpenCL has proven to be effective at leveraging the parallelism in commodity multi-core processors and programmable parallel accelerators. However, to the best of our knowledge, there is currently no publicly available implementation of OpenCL targeting commodity RISC-V processors that is accessible to the open-source community. Besides opening RISC-V to the existing rich variety of scientific parallel applications, OpenCL also provides access to a unique genre of benchmarks useful in computer architecture research. In this work, we extended an Open-source implementation of OpenCL to target RISC-V CPUs. Our work not only cover commodity multi-core RISC-V processors, but also plethora of low- profile embedded RISC-V CPUs that often do not support atomic instructions or multi-threading.

Tine, Blaise↗

Ultra-compact system for characterization of physical, chemical and ignition properties of fuels

The present disclosure relates to a miniaturized fuel laboratory system that makes use of a housing, a processor housed within the housing, and a fuel inlet port supported from the housing for receiving a quantity of fuel to be used as a fuel test sample. The system may also have at least one fuel sensor housed in the housing in communication with the fuel inlet port for receiving the fuel test sample and carrying out combustion thereof. An electronic component may be housed in the housing, which enables communication with an external remote subsystem. A database may be incorporated which contains at least one of stored fuel characteristics or stored fuel analysis models, accessible by the processor. The processor may use fuel oxidation information generated by the fuel sensor, and at least one of the stored fuel characteristics or stored combustion models, to determine at least one fuel characteristic of the fuel test sample.

McNenly, Matthew J.↗

Low-observability matrix completion

An example device includes at least one processor configured to receive electrical parameter values corresponding to at least one first location within a power network. The at least one processor is further configured to determine, using matrix completion and based on the at least one electrical parameter value, an estimated value of at least one unknown electrical parameter. The at least one unknown electrical parameter corresponds to a second location within the power network. The at least one processor is also configured to cause at least one device within the power network to modify operation based on the estimated value of the at least one unknown electrical parameter.

Bernstein, Andrey↗

Vector send operation for message-based communication

Methods and systems for conducting vector send operations are provided. The processor of a sender node receives a request to perform a collective send operation (e.g., MPI_Broadcast) from a user application, requesting a copy of data in one or more send buffers by sent to each of a plurality of destinations in a destination vector. The processor invokes a vector send operation from a software communications library, placing a remote enqueue atomic send command for each destination node of the destination vector in an entry of a transmit data mover (XDM) command queue in a single call. The processor executes all of the commands in the XDM command queue and writes the data in the one or more send buffers into each receive queue of each destination identified in the destination vector.

Byrne, John L.↗

Control flow guided lock address prefetch and filtering

A method of prefetching target data includes, in response to detecting a lock-prefixed instruction for execution in a processor, determining a predicted target memory location for the lock-prefixed instruction based on control flow information associating the lock-prefixed instruction with the predicted target memory location. Target data is prefetched from the predicted target memory location to a cache coupled with the processor, and after completion of the prefetching, the lock-prefixed instruction is executed in the processor using the prefetched target data.

Mashimo, Susumu↗

Multi-frequency electrical impedance tomography

Apparatus includes a plurality of geological subsurface electrical line sensors spaced apart from each other proximate a predetermined geological subsurface region of interest, with at least one of the electrical line sensors situated as a line source to produce a multi-frequency electrical impedance tomography source signal, and with at least one of the electrical line sensors situated as a line detector to receive the multi-frequency electrical impedance tomography response signal associated with the source signal that propagates through the predetermined geological subsurface region of interest, and a controller including a processor and a memory configured with instructions that, when executed by the processor, cause the processor to determine an electrical mapping over the predetermined geological subsurface region of interest based on the multi-frequency electrical impedance tomography source signal, response signal, and the spatial positions of the geological subsurface electrical line sensors.

Karra, Satish↗

Phase identification using statistical analysis

A device includes at least one processor configured to determine, based on (i) a first plurality of time-varying electrical measurements corresponding to a feeder head of a power distribution network having a plurality of phases and (ii) a second plurality of time-varying electrical measurements corresponding to a node in the power distribution network, and using statistical analysis, a predicted phase, from the plurality of phases, that corresponds to the node. The processor may be configured to use ranked correlation coefficients (such as the Kendall rank correlation coefficient) to determine the predicted phase and may use principle component analysis. The processor is also configured to cause at least one device of the power distribution network to modify operation based at least on part on the predicted phase.

Veda, Santosh Sambamoorthy↗

Systems and methods for tensor scheduling

A technique for efficient scheduling of operations in a program for parallelized execution thereof using a multi-processor runtime environment having two or more processors includes constraining the type or number of loop optimization transforms that may be explored such that memory and processing capacity available for the scheduling task are not exceeded, while facilitating a tradeoff between memory locality, parallelization, and/or data communication between memory modules of the multi-processor runtime environment.

Meister, Benoit J.↗

In situ data acquisition and real-time analysis system

A testing system for evaluating the performance of an electrical/electronic UUT under dynamic operating conditions. The testing system includes a dynamic testing component (e.g., a centrifuge) for applying a stimulus to the UUT, and an iDAQ system configured to perform in situ data acquisition and real-time data analysis. The iDAQ system may also be subject to the stimulus. The iDAQ system includes a processor (e.g., an SoC) component, a power supply, a CR/I component, an IR component, and a single enclosure. The processor component may control the dynamic testing component, including varying in real-time the stimulus applied to the UUT. The processor component may include multiple input channels, and a high current/voltage subcomponent of the power supply may be configured to supply up to five hundred volts.

Benyhesan, Mohammad K.↗

Cooperative workgroup scheduling and context prefetching based on predicted modification of signal values

A first workgroup is preempted in response to threads in the first workgroup executing a first wait instruction including a first value of a signal and a first hint indicating a type of modification for the signal. The first workgroup is scheduled for execution on a processor core based on a first context after preemption in response to the signal having the first value. A second workgroup is scheduled for execution on the processor core based on a second context in response to preempting the first workgroup and in response to the signal having a second value. A third context it is prefetched into registers of the processor core based on the first hint and the second value. The first context is stored in a first portion of the registers and the second context is prefetched into a second portion of the registers prior to preempting the first workgroup.

Dutu, Alexandru↗

Event detection unit

An event detection unit (EDU) for detecting an explosive event is provided. The EDU includes different types of sensors for measuring characteristics of an explosive event. The EDU includes an event notification component. The EDU also includes a processor that receives a measurement from the sensors and generates a combined non-event probability and a combined event probability based on that measurement that indicates a likelihood that an explosive event has not occurred or has occurred. The processor determines whether an explosive event has occurred based on the non-event probabilities and event probabilities. When an explosive event has been determined to occur, the processor directs the event notification component to output a notification that an explosive event has occurred.

Candy, James Vincent↗

Hardware accelerated dynamic work creation on a graphics processing unit

A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

Gutierrez, Anthony T.↗

Three-dimensional broadband nonlinear phased array imaging

System include an ultrasonic transducer configured to couple to a nondestructive testing (NDT) sample and configured to produce and direct an ultrasonic probe wave at a selected frequency into a subsurface region of the NDT sample, a 3D laser scanning vibrometer configured to direct a detection beam in a scan area on a surface of the NDT sample and to receive a return beam from the scan area, and to detect, based on the return beam, a 3D motion of the surface across a wideband frequency range, and a processor, and a memory configured with instructions that, when executed by the processor, cause the processor to produce sub-surface image data of the NDT sample at multiple harmonics of the selected frequency in the wideband frequency range based on the detected 3D surface motion, wherein the sub-surface image data describes a nonlinear defect response produced in the NDT sample by interaction of the ultrasonic probe wave with the subsurface region.

Remillieux, Marcel↗

Real time feedback-based optimization of distributed energy resources

An example device includes a processor configured to receive a plurality of voltage values representing respective voltage magnitudes at voltage nodes in a first portion of a power system and determine, for each voltage node, a respective value of first and second voltage-constraint coefficients. The processor is also configured to receive a power value corresponding to a connection point of the first portion of the power system with a second portion of the power system and determine for the connection point, a respective value of first and second power-constraint coefficients. The processor is also configured to cause at least one energy resource connected to the first portion of the power system to modify an output power of the at least one energy resource based on the value of the first and second voltage-constraint coefficients for each voltage node and the value of the first and second power-constraint coefficients.

Dall'Anese, Emiliano↗

Accelerated pattern matching method on a quantum computing system

A method of determining a pattern in a sequence of bits using a quantum computing system includes setting a first register of a quantum processor in a superposition of a plurality of string index states, encoding a bit string in a second register of the quantum processor, encoding a bit pattern in a third register of the quantum processor, circularly shifting qubits of the second register conditioned on the first register, amplifying an amplitude of a state combined with the first register in which the circularly shifted qubits of the second register matches qubits of the third register, measuring an amplitude of the first register and determining a string index state of the plurality of string index states associated with the amplified state, and outputting, by use of a classical computer, a string index associated with the first register in the measured state.

NIROULA, Pradeep↗

On the Degradation of the Effectiveness of Nonlinear Diffusion Acceleration with Parallel Block Jacobi Splitting

MOOSE's radiation transport module Rattlesnake comprises a first order S N solver that can be accelerated with a flexible Nonlinear Diffusion Acceleration. At each NDA iteration, the streaming and collision operator of the S{sub N} equations are (approximately) inverted using a transport sweep. When executed on multiple processors parallel block Jacobi (PBJ) splitting is utilized lagging the processor sub-domain's incoming angular fluxes making the implemented method asynchronous, i.e. the convergence properties of NDA become dependent on the number of concurrent tasks and details of the partitioning. Within this work, we study the NDA convergence properties for the two-dimensional C5G7 benchmark problem PBJ with p = 1, 2, 4, 8, 12, 16, 24, 32, 48, 60, 72, 96 and 144 concurrent tasks. Rosa studied the convergence properties of PBJ splitting methods with and without transport synthetic acceleration (TSA) in slab geometry and two-dimensional Cartesian geometry, respectively. Rosa's iteration scheme lags both the incoming angular fluxes and the scattering source making it very similar to the method described here. Rosa found by means of Fourier analysis that convergence of unaccelerated PBJ can degrade for optically thin subdomains, i.e. for a large number of processors given a fixed domain size. Depending on the choice of parameters application of TSA can lead to an effective algorithm. In contrast to Rosa's work, this work focuses on PBJ splitting for NDA accelerated solution of the multigroup eigenvalue problem. Later, Zerr and Anistratov used their integral transport matrix method in conjunction with PBJ. This iteration scheme is different as it does not lag the scattering source. Nevertheless, Fourier analysis with Diamond Difference spatial discretization showed that the method degrades with increasing the overall size of the spatial domain while keeping the sub-domain size constant. In the case of an infinite medium, the observed spectral radius becomes unity. These references establish the iterative performance of PBJ for one-group fixed source problems discretized on rectangular cells, but for the Rattlesnake first order NDA method, an emphasis lies on multigroup eigenvalue problems. In this setting, the additional complication arises that the low order equations are not exactly inverted, but only to some iterative criterion. Further, as the low order problem is solved using Jacobian-Free Newton Krylov methods, a suitable preconditioner for the GMRES iterations is required. As the effectiveness of the preconditioners may decrease when more concurrent processes are used, we expect the low order solve to impact the overall effectiveness of the NDA method in parallel execution as well. Therefore, this work focuses on the question of how detrimental the asynchronicity of the high and low order iterative solutions is for the effectiveness of NDA solutions of realistic, unstructured grid, multigroup eigenvalue problems. The iterative convergence properties of Rattlesnake's NDA method for multigroup eigenvalue problems are studied for varying number of concurrent processes. Rattlesnake's NDA method is asynchronous because the high order transport sweep uses PBJ splitting and because the low order solve's preconditioners, algebraic multigrid and additive Schwarz, are asynchronous. We found that up to 144 processes the number of Picard iterations increases by a factor of 2-3 affecting but not destroying NDA's parallel performance for the C5G7 benchmark problem, a representative LWR (light water reactor) configuration. The solution of the NDA low order eigenvalue problem posed greater problems than expected for the solvers currently available in Rattlesnake mainly because of problems to effectively precondition the modified low-order problem. As a matter of fact, the low order problem becomes an advection-diffusion problem. Non-robustness was observed for the AMG preconditioned coarse mesh acceleration for more than 60 concurrent processes, which was fixed by increasing the number of permissible V-cycles per AMG call. For fine mesh acceleration AMG proved to be ineffective and we resorted to ASM. For both AMG and ASM, increasing number of linear iterations per nonlinear are observed when increasing the number of processes, but for ASM this problem appears to be worse. The results from this work also indicate that initial development efforts should be diverted from implementation of a high-order parallel sweeping algorithm to the effective and robust iterative solution of the low order NDA multigroup eigenvalue problem. (authors)

97 MATHEMATICS AND COMPUTING↗