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The capillary pump loop (CPL) was re-introduced as a potential candidate for the management of large heat loads. It is currently being evaluated for application in the thermal management of large space structures. Test efforts were conducted to establish the feasibility of the CPL heat pipe design.
The stress wave factor (SWF) signal, which is the output of an ultrasonic testing system where the transmitting and receiving transducers are coupled to the same face of the test structure, is analyzed in the frequency domain. The SWF signal generated in an isotropic elastic plate is modelled as the superposition of successive reflections. The reflection which is generated by the stress waves which travel p times as a longitudinal (P) wave and s times as a shear (S) wave through the plate while reflecting back and forth between the bottom and top faces of the plate is designated as the reflection with p, s. Short-time portions of the SWF signal are considered for obtaining spectral information on individual reflections. If the significant reflections are not overlapped, the short-time Fourier analysis is used. A summary of the elevant points of homomorphic signal processing, which is also called cepstrum analysis, is given. Homomorphic signal processing is applied to short-time SWF signals to obtain estimates of the log spectra of individual reflections for cases in which the reflections are overlapped. Two typical SWF signals generated in aluminum plates (overlapping and non-overlapping reflections) are analyzed.
Recent advances in silicon solar cell processing have led to attainment of conversion efficiency approaching 20%. The basic cell design is investigated and features of greatest importance to achievement of 20% efficiency are indicated. Experiments to separately optimize high efficiency design features in test structures are discussed. The integration of these features in a high efficiency cell is examined. Ion implantation has been used to achieve optimal concentrations of emitter dopant and junction depth. The optimization reflects the trade-off between high sheet conductivity, necessary for high fill factor, and heavy doping effects, which must be minimized for high open circuit voltage. A second important aspect of the design experiments is the development of a passivation process to minimize front surface recombination velocity. The manner in which a thin SiO2 layer may be used for this purpose is indicated without increasing reflection losses, if the antireflection coating is properly designed. Details are presented of processing intended to reduce recombination at the contact/Si interface. Data on cell performance (including CZ and ribbon) and analysis of loss mechanisms are also presented.
In order to perform a complete systems analysis for almost any large space program, it is vital to have a thorough understanding of human capabilities in extravehicular activity (EVA). The present investigation is concerned with the most significant results from the MIT Space Systems Lab's neutral buoyancy tests. An evaluation of neutral buoyancy is considered along with the tested structures, aspects of learning, productivity, time and motion analysis, and assembly loads. Attention is given to EVA assembly with a manned maneuvering unit, teleoperated structural assembly, an integrated control station, a beam assembly teleoperator, and space station proximity operations.
This paper presents the results of an experimental study designed to explore both qualitatively and quantitatively the mechanism of the improved current gain in bipolar transistors with polysilicon emitter contacts. Polysilicon contacts were deposited and heat treated at different conditions. The electrical properties were measured using p-n junction test structures that are much more sensitive to the contact properties than are bipolar transistors. A simple phenomenological model was used to correlate the structural properties with electrical measurements. Possible transport mechanisms are examined and estimates are made about upper bounds on transport parameters in the principal regions of the devices. The main conclusion of this study is that the minority-carrier transport in the polycrystalline silicon is dominated by a highly disordered layer at the polysilicon-monosilicon interface characterized by very low minority-carrier mobility. The effective recombination velocity at the n(+) polysilicon-n(+) monosilicon interface was found to be a strong function of fabrication conditions. The results indicate that the recombination velocity can be much smaller than 10,000 cm/s.
An evaluation was made of laminar flow control (LFC) system concepts for subsonic commercial transport aircraft. Configuration design studies, performance analyses, fabrication development, structural testing, wind tunnel testing, and contamination-avoidance techniques were included. As a result of trade studies, a configuration with LFC on the upper wing surface only, utilizing an electron beam-perforated suction surface, and employing a retractable high-lift shield for contamination avoidance, was selected as the most practical LFC system. The LFC aircraft was then compared with an advanced turbulent aircraft designed for the same mission. This comparison indicated significant fuel savings and reduced direct operating cost benefits would result from using LFC.
A major problem in the qualification of integrated circuit cells and in the development of adequate tests for the circuits is to lack of information on the nature and density of fault models. Some of this information is being obtained from the test structures. In particular, the Pinhole Array Capacitor is providing values for the resistance of gate oxide shorts, and the Addressable Inverter Matrix is providing values for parameter distributions such as noise margins. Another CMOS fault mode, that of the open-gated transistor, is examined and the state of the transistors assessed. Preliminary results are described for a number of open-gated structures such as transistors, inverters, and NAND gates. Resistor faults are applied to various CMOS gates and the time responses are noted. The critical value for the resistive short to upset the gate response was determined.
Fabrication and characterization of high-efficiency metal insulator, n-p (MINP) cells is described. Particular attention was paid to development of measurement methods for surface recombination and density of surface states. A modified Rosier test structure was used successfully for density of surface states. Silicon oxide and silicon nitride passivants were studied. Heat treatment after plasma enhanced chemical vapor deposition (CVD) of silicon nitride was shown to be beneficial. A more optimum emitter concentration profile was modeled.
The stress wave factor (SWF) signal, which is the output of an ultrasonic testing system where the transmitting and receiving transducers are coupled to the same face of the test structure, is analyzed in the frequency domain. The SWF signal generated in an isotropic elastic plate is modelled as the superposition of successive reflections. The reflection which is generated by the stress waves which travel P times as a longitudinal (P) wave and s times as a shear (S) wave through the plate while reflecting back and forth between the bottom and top faces of the plate is designated as the reflection with P, s. Short-time portions of the SWF signal are considered for obtaining spectral information on individual reflections. If the significant reflections are not overlapped, the short-time Fourier analysis is used. A summary of the elevant points of homomorphic signal processing, which is also called cepstrum analysis, is given. Homomorphic signal processing is applied to short-time SWF signals to obtain estimates of the log spectra of individual reflections for cases in which the reflections are overlapped. Two typical SWF signals generated in aluminum plates (overlapping and non-overlapping reflections) are analyzed.
High-low (HL) junctions form a part of many semiconductor devices, including back surface field solar cells. A first experimental determination and interpretation of the voltage across the HL junction under low- and high-injection conditions is presented as a function of the voltage across a nearby p/n junction. Theoretical analysis from first principles is shown to bear well on the experimental results. In addition, a test structure is proposed for measurement of the effective surface recombination velocity at the HL junctions.
Widths and spacings of conductor lines on integrated circuits measured electrically by split cross-bridge resistor technique. Speeds evaluation of integrated-circuit fabrication processes. When measurement of probe currents and voltages and reduction of measurement data automated, test structure probed and characterized in less than one second.
A new test structure was developed for evaluating the line spacing between conductors on the same layer using an electrical measurement technique. This compact structure can also be used to measure the sheet resistance, linewidth, and line pitch of the conducting layer. Using an integrated-circuit fabrication process, this structure was fabricated in diffused polycrystalline silicon and metal layers and measured optically and electrically. For the techniques used, the optical measurements were typically one-quarter micron greater than the electrical measurements. Most electrically measured line pitch values were within 2 percent of the designed value. A small difference between the measured and designed line pitch is used to validate sheet resistance, linewidth, and line spacing values.
This report examines tuning a finite element model using vector optimization techniques. Structural models using finite element theory often need to be adjusted so they can accurately simulate the real structure. The goal is to tune the model such that it will reproduce data derived from structural tests. First, the performance indices are extremized using multiple objective optimization theory, producing a set of possible solutions. Next, the solutions are rank ordered according to a decision maker's preferences to select the best answer. The tuning process was applied to a T-38 horizontal stabilizer. Numerous weighted solutions contained a best static deformation model, a best frequency model and three intermediate combinations of these two models. This automated procedure proved to be a versatile method capable of producing solutions for many types of tuning problems.
Lateral currents in contact strips taken into account. Four-terminal test structures added to intergrated circuits to enable measurement of interfacial resistivities of contacts between thin conducting layers. Thin-film model simplified quasi-two-dimensional potential model that accounts adequately for complicated three-dimensional, nonuniform current densitites. Effects of nonuniformity caused by lateral current flow in strips summarized in equivalent resistance Rs and voltage Vs.
The use of the alpha-Ge(1-x):Al(x) and alpha-Ge(1-x):Cu(x) alloys and Pt/Al2O3 cermet thin films as resistive interconnects for binary synaptic memory arrays is evaluated. The fabrication of the 10-20 microns long, 10 microns wide, and 0.1 micron thick interconnects from the alloys and cermet is described. The current-voltage and switching characteristics of the as-deposited films and the patterned test structure are studied. The resistivity, uniformity, stability, and compatibility of the interconnects are examined. It is observed that alpha-Ge(1-x):Cu(x) alloys have a wide resistivity range and low temperature coefficients of resistance; however, their long-term stability is limited due to their low crystallization temperature. It is detected that the alpha-Ge(1-x):Al(x) alloys have higher crystallization temperatures and their resistivity is not greatly affected by large changes in metal content. The Pt/Al2O3 samples display excellent stability, easy fabrication, and control of resistivity with metal content.
Test structure forms chain of "cross" contacts fabricated together with large-scale integrated circuits. If necessary, number of such chains incorporated at suitable locations in integrated-circuit wafer for determination of fabrication yield of contacts. In new structure, resistances of individual contacts determined: In addition to making it possible to identify local defects, enables generation of statistical distributions of contact resistances for prediction of "parametric" contact yield of fabrication process.
The damage location approach employs the control system capabilities for the structure to test the structure and measure the dynamic response. The measurements are then used in a system identification algorithm to produce a model of the damaged structure. The model is compared to one for the undamaged structure to find regions of reduced stiffness which indicate the location of damage. Kabe's 3,4 stiffness matrix adjustment method was the central identification algorithm. The strength of his method is that, with minimal data, it preserves the representation of the physical connectivity of the structure in the resulting model of the damaged truss. However, extensive storage and computational effort were required as a result. Extension of the damage location method to overcome these problems is the first part of the current work. The central system identification algorithm is replaced with the MSMT method of stiffness matrix adjustment which was previously derived by generalizing an optimal-update secant method form quasi-Newton approaches for nonlinear optimization. Validation of the extended damage location method is the second goal.
Software quality is of primary concern in all large-scale expert system development efforts. Building appropriate validation and test tools for ensuring software reliability of expert systems is therefore required. The Expert Systems Validation Associate (EVA) is a validation system under development at the Lockheed Artificial Intelligence Center. EVA provides a wide range of validation and test tools to check correctness, consistency, and completeness of an expert system. Testing a major function of EVA. It means executing an expert system with test cases with the intent of finding errors. In this paper, we describe many different types of testing such as function-based testing, structure-based testing, and data-based testing. We describe how appropriate test cases may be selected in order to perform good and thorough testing of an expert system.