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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 613 records · Page 34

Overview of the MSTI 2 processor-in-the-loop simulator

To thoroughly test the on-board software for the MSTI 2 spacecraft, it was necessary to generate an environment for the software which accurately simulated the on-orbit conditions of the spacecraft. To achieve this, the MSTI 2 Processor-In-the-Loop (PIL) high-fidelity simulator was developed. The entire development was completed in 3 months and required 4 man-months of effort. This paper describes the design and development of this simulator and the methodology employed.

Rygaard, Christopher A.↗

Analysis of a hardware and software fault tolerant processor for critical applications

Computer systems for critical applications must be designed to tolerate software faults as well as hardware faults. A unified approach to tolerating hardware and software faults is characterized by classifying faults in terms of duration (transient or permanent) rather than source (hardware or software). Errors arising from transient faults can be handled through masking or voting, but errors arising from permanent faults require system reconfiguration to bypass the failed component. Most errors which are caused by software faults can be considered transient, in that they are input-dependent. Software faults are triggered by a particular set of inputs. Quantitative dependability analysis of systems which exhibit a unified approach to fault tolerance can be performed by a hierarchical combination of fault tree and Markov models. A methodology for analyzing hardware and software fault tolerant systems is applied to the analysis of a hypothetical system, loosely based on the Fault Tolerant Parallel Processor. The models consider both transient and permanent faults, hardware and software faults, independent and related software faults, automatic recovery, and reconfiguration.

Dugan, Joanne B.↗

Evolutionary Telemetry and Command Processor (TCP) architecture

A low cost, modular, high performance, and compact Telemetry and Command Processor (TCP) is being built as the foundation of command and data handling subsystems for the next generation of satellites. The TCP product line will support command and telemetry requirements for small to large spacecraft and from low to high rate data transmission. It is compatible with the latest TDRSS, STDN and SGLS transponders and provides CCSDS protocol communications in addition to standard TDM formats. Its high performance computer provides computing resources for hosted flight software. Layered and modular software provides common services using standardized interfaces to applications thereby enhancing software re-use, transportability, and interoperability. The TCP architecture is based on existing standards, distributed networking, distributed and open system computing, and packet technology. The first TCP application is planned for the 94 SDIO SPAS 3 mission. The architecture enhances rapid tailoring of functions thereby reducing costs and schedules developed for individual spacecraft missions.

Schneider, John R.↗

Automatic differentiation for design sensitivity analysis of structural systems using multiple processors

An automatic differentiation tool (ADIFOR) is incorporated into a finite element based structural analysis program for shape and non-shape design sensitivity analysis of structural systems. The entire analysis and sensitivity procedures are parallelized and vectorized for high performance computation. Small scale examples to verify the accuracy of the proposed program and a medium scale example to demonstrate the parallel vector performance on multiple CRAY C90 processors are included.

Nguyen, Duc T.↗

Fast structural design and analysis via hybrid domain decomposition on massively parallel processors

A hybrid domain decomposition framework for static, transient and eigen finite element analyses of structural mechanics problems is presented. Its basic ingredients include physical substructuring and /or automatic mesh partitioning, mapping algorithms, 'gluing' approximations for fast design modifications and evaluations, and fast direct and preconditioned iterative solvers for local and interface subproblems. The overall methodology is illustrated with the structural design of a solar viewing payload that is scheduled to fly in March 1993. This payload has been entirely designed and validated by a group of undergraduate students at the University of Colorado using the proposed hybrid domain decomposition approach on a massively parallel processor. Performance results are reported on the CRAY Y-MP/8 and the iPSC-860/64 Touchstone systems, which represent both extreme parallel architectures. The hybrid domain decomposition methodology is shown to outperform leading solution algorithms and to exhibit an excellent parallel scalability.

Farhat, Charbel↗

Systolic Processor Array For Recognition Of Spectra

Spectral signatures of materials detected and identified quickly. Spectral Analysis Systolic Processor Array (SPA2) relatively inexpensive and satisfies need to analyze large, complex volume of multispectral data generated by imaging spectrometers to extract desired information: computational performance needed to do this in real time exceeds that of current supercomputers. Locates highly similar segments or contiguous subsegments in two different spectra at time. Compares sampled spectra from instruments with data base of spectral signatures of known materials. Computes and reports scores that express degrees of similarity between sampled and data-base spectra.

Chow, Edward T.↗

Space Station Water Processor Process Pump

This report presents the results of the development program conducted under contract NAS8-38250-12 related to the International Space Station (ISS) Water Processor (WP) Process Pump. The results of the Process Pumps evaluation conducted on this program indicates that further development is required in order to achieve the performance and life requirements for the ISSWP.

Parker, David↗

Space Station Water Processor Mostly Liquid Separator (MLS)

This report presents the results of the development testing conducted under this contract to the Space Station Water Processor (WP) Mostly Liquid Separator (MLS). The MLS units built and modified during this testing demonstrated acceptable air/water separation results in a variety of water conditions with inlet flow rates ranging from 60 - 960 LB/hr.

Lanzarone, Anthony↗

Dynamically Reconfigurable Optical Morphological Processor

Experimental optical/electronic image-processing system performs morphological processing in optical domain. System operates at high speed. Also dynamically reconfigurable, switched rapidly among all forms of morphological processing. Major advantage over correlator-based optical morphological processors in which morphological operations governed by fixed holographic filters.

Chao, Tien-Hsin↗

Spatial Phase Coding for Incoherent Optical Processors

In this paper we introduce spatial phase coding of incoherent optical signals for representing signed numbers in optical processors and present an experimental demonstration of this coding technique. If a diffraction grating, such as an acousto-optic cell, modulates a stream of light, the image of the grating can be recovered from the diffracted beam. The position of the grating image, or more precisely its phase, can be used to denote the sign of the number represented by the diffracted light. The intensity of the light represents the magnitude of the number. This technique is more economical than current methods in terms of the number of information channels required to represent a number and the amount of post processing required.

Tigin, D. V.↗

Water Processor and Oxygen Generation Assembly

This report documents the results of the tasks which initiated efforts on design issues relating to the Water Processor (WP) and the Oxygen Generation Assembly (OGA) Flight Hardware for the International Space Station. This report fulfills the Statement of Work deliverables requirement for contract H-29387D. The following lists the tasks required by contract H-29387D: (1) HSSSI shall coordinate a detailed review of WP/OGA Flight Hardware program requirements with personnel from MSFC to identify requirements that can be eliminated without affecting the technical integrity of the WP/OGA Hardware; (2) HSSSI shall conduct the technical interchanges with personnel from MSFC to resolve design issues related to WP/OGA Flight Hardware; (3) HSSSI will initiate discussions with Zellwegger Analytics, Inc. to address design issues related to WP and PCWQM interfaces.

Bedard, John↗

Development of an Ion Thruster and Power Processor for New Millennium's Deep Space 1 Mission

The NASA Solar Electric Propulsion Technology Applications Readiness Program (NSTAR) will provide a single-string primary propulsion system to NASA's New Millennium Deep Space 1 Mission which will perform comet and asteroid flybys in the years 1999 and 2000. The propulsion system includes a 30-cm diameter ion thruster, a xenon feed system, a power processing unit, and a digital control and interface unit. A total of four engineering model ion thrusters, three breadboard power processors, and a controller have been built, integrated, and tested. An extensive set of development tests has been completed along with thruster design verification tests of 2000 h and 1000 h. An 8000 h Life Demonstration Test is ongoing and has successfully demonstrated more than 6000 h of operation. In situ measurements of accelerator grid wear are consistent with grid lifetimes well in excess of the 12,000 h qualification test requirement. Flight hardware is now being assembled in preparation for integration, functional, and acceptance tests.

Sovey, James S.↗

Smart-Pixel Array Processors Based on Optimal Cellular Neural Networks for Space Sensor Applications

A smart-pixel cellular neural network (CNN) with hardware annealing capability, digitally programmable synaptic weights, and multisensor parallel interface has been under development for advanced space sensor applications. The smart-pixel CNN architecture is a programmable multi-dimensional array of optoelectronic neurons which are locally connected with their local neurons and associated active-pixel sensors. Integration of the neuroprocessor in each processor node of a scalable multiprocessor system offers orders-of-magnitude computing performance enhancements for on-board real-time intelligent multisensor processing and control tasks of advanced small satellites. The smart-pixel CNN operation theory, architecture, design and implementation, and system applications are investigated in detail. The VLSI (Very Large Scale Integration) implementation feasibility was illustrated by a prototype smart-pixel 5x5 neuroprocessor array chip of active dimensions 1380 micron x 746 micron in a 2-micron CMOS technology.

Fang, Wai-Chi↗

Water Processor Assembly Technology Development

The International Space Station (ISS) Water Processor Assembly (WPA) produces potable quality water from humidity condensate, carbon dioxide reduction water, water obtained from fuel cells, reclaimed urine distillate, shower, handwash and oral hygiene waste waters. This paper describes the WPA integration into the ISS Node 3. It details the substantial development history supporting the design and describes the WPA System characteristics and its physical layout.

Bagdigian, Robert↗

Earth Orbiter 1 (EO-1): Wideband Advanced Recorder and Processor (WARP)

An overview of the Earth Orbitor 1 (EO1) Wideband Advanced Recorder and Processor (WARP) is presented in viewgraph form. The WARP is a spacecraft component that receives, stores, and processes high rate science data and its associated ancillary data from multispectral detectors, hyperspectral detectors, and an atmospheric corrector, and then transmits the data via an X-band or S-band transmitter to the ground station. The WARP project goals are: (1) Pathfinder for next generation LANDSAT mission; (2) Flight prove architectures and technologies; and (3) Identify future technology needs.

Smith, Terry↗