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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 631 records · Page 35

Commerce Lab - A program of commercial flight opportunities

Commerce Lab is conceived as an adjunct to the National Space Transportation System (NSTS) by providing a focal point for commercial missions which could utilize existing NSTS carrier and resource capabilities for on-orbit experimentation in the microgravity sciences. In this context, the Commerce Lab program provides mission planning for private sector involvement in the space program, in general, and the commercial exploitation of the microgravity environment for materials processing research and development. It is expected that Commerce Lab will provide a logical transition between currently planned NSTS missions and future microgravity science and commercial R&D missions centered around the Space Station. The present study identifies candidate Commerce Lab flight experiments and their development status and projects a mission traffic model that can be used in commercial mission planning.

Robertson, J.↗

An innovative design for autonomous backup attitude control of the Gamma Ray Observatory

The Gamma Ray Observatory is a NASA funded three-axis stabilized spacecraft which will carry four scientific instruments to observe gamma ray phenomena. The requirement to protect the scientific mission from system failures led to the attitude control and determination system design described in this paper. The design employs nine control modes with error detection, hardware substitution, and autonomous mode switching. The system architecture evolved to eliminate cross-dependence between the primary on-board computer (OBC) and the backup control processor electronics. Cross strapping of sensors and actuators and separation of the input/output electronics ensure that a reliable set of sensors and actuators will be available for backup mode operation. The OBC software includes failure detection, hardware reconfiguration, and mode switching logic which provide the ability to autonomously transfer, upon anomaly, to a reliable backup mode. Verification of this mode transition design is done in four test programs: at the unit level, by analytical simulation, by a hybrid breadboard electronics-simulation setup, and by a flight hardware-simulation test.

Tai, F.↗

Assurance of Complex Electronics. What Path Do We Take?

Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled in software, such as communication protocols. For instance, Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of "software-like" bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and "bugs" can be detected earlier in the development cycle, thus creating a development process for CE that will be easily maintained and configurable based on the device used.

FROM↗

Insulation Reformulation Development

The current Space Launch System (SLS) internal solid rocket motor insulation, polybenzimidazole acrylonitrile butadiene rubber (PBI-NBR), is a new insulation that replaced asbestos-based insulations found in Space Shuttle heritage solid rocket boosters. PBI-NBR has some outstanding characteristics such as an excellent thermal erosion resistance, low thermal conductivity, and low density. PBI-NBR also has some significant challenges associated with its use: Air entrainment/entrapment during manufacture and lay-up/cure and low mechanical properties such as tensile strength, modulus, and fracture toughness. This technology development attempted to overcome these challenges by testing various reformulated versions of booster insulation. The results suggest the SLS program should continue to investigate material alternatives for potential block upgrades or use an entirely new, more advanced booster. The experimental design was composed of a logic path that performs iterative formulation and testing in order to maximize the effort. A lab mixing baseline was developed and documented for the Rubber Laboratory in Bldg. 4602/Room 1178.

Chapman, Cynthia↗

Real-time simulation of helicopter air-to-air combat

The AUTOMAN computer program develops automated maneuvering decisions for helicopters during air-to-air combat over hilly terrain. Recently, the capabilities of this program have been extended and enhanced significantly. The revised program was installed at the NASA Ames manned flight-simulation facility to drive a computer-generated image of an enemy helicopter, thereby providing an adversary for the human pilot. Maneuvers are selected by employing game theory. Enhancements include a guidance law for target acquisition when a firing opportunity arises; fire-control sequence logic; improved low-flying capabilities; line-of-sight computations for the cockpit field-of-view, terrain obstructions, and visual range limits; use of terrain for masking; air-to-air collision-avoidance maneuvers; decision on dispensing flares and chaff; and adjustable levels of pilot experience. The program was found to be extremely useful for both rotorcraft handling-quality evaluations and air-to-air combat training.

Austin, Fred↗

Machine Learning Models for Network Traffic Classification in Programmable Logic

Network traffic classification via machine learning on network packet payloads has emerged as an active area of research for network security due to the high accuracy machine learning models have achieved in classifying payloads. For effective deployment as part of network security, these machine learning models must not only classify malicious packet payloads accurately, they must also identify anomalous payloads and perform inference at speeds generally faster than 10,000 packets per second to be effective. This work explores the in- ference speeds and accuracy of several neural network models implemented in programmable logic on various field programmable gate arrays (FPGA) including the Xilinx VC1902 and Xilinx Zynq Ultrascale+. This work also presents the design and performance of both an autoencoder and variational autoencoder programmed on the FPGA for identifying anomalous packet payloads. The performance benefits of the FPGA implementation for this type of packet payload inspection driven by machine learning are compared against graphics processing unit (GPU) inference implementations run on two state-of-the-art datacenter GPU devices, the NVIDIA V100 and A100. The model accuracy difference between the FPGA and GPU implementations was found to be 4% or less while the Xilinx VC1902 outperformed both the NVIDIA V100 and A100 for inference speeds on all the models explored except the variational autoencoder.

97 MATHEMATICS AND COMPUTING↗

Program Instrumentation and Trace Analysis

Several attempts have been made recently to apply techniques such as model checking and theorem proving to the analysis of programs. This shall be seen as a current trend to analyze real software systems instead of just their designs. This includes our own effort to develop a model checker for Java, the Java PathFinder 1, one of the very first of its kind in 1998. However, model checking cannot handle very large programs without some kind of abstraction of the program. This paper describes a complementary scalable technique to handle such large programs. Our interest is turned on the observation part of the equation: How much information can be extracted about a program from observing a single execution trace? It is our intention to develop a technology that can be applied automatically and to large full-size applications, with minimal modification to the code. We present a tool, Java PathExplorer (JPaX), for exploring execution traces of Java programs. The tool prioritizes scalability for completeness, and is directed towards detecting errors in programs, not to prove correctness. One core element in JPaX is an instrumentation package that allows to instrument Java byte code files to log various events when executed. The instrumentation is driven by a user provided script that specifies what information to log. Examples of instructions that such a script can contain are: 'report name and arguments of all called methods defined in class C, together with a timestamp'; 'report all updates to all variables'; and 'report all acquisitions and releases of locks'. In more complex instructions one can specify that certain expressions should be evaluated and even that certain code should be executed under various conditions. The instrumentation package can hence be seen as implementing Aspect Oriented Programming for Java in the sense that one can add functionality to a Java program without explicitly changing the code of the original program, but one rather writes an aspect and compiles it into the original program using the instrumentation. Another core element of JPaX is an observation package that supports the analysis of the generated event stream. Two kinds of analysis are currently supported. In temporal analysis the execution trace is evaluated against formulae written in temporal logic. We have implemented a temporal logic evaluator on finite traces using the Maude rewriting system from SRI International, USA. Temporal logic is defined in Maude by giving its syntax as a signature and its semantics as rewrite equations. The resulting semantics is extremely efficient and can handle event streams of hundreds of millions events in few minutes. Furthermore, the implementation is very succinct. The second form of even stream analysis supported is error pattern analysis where an execution trace is analyzed using various error detection algorithms that can identify error-prone programming practices that may potentially lead to errors in some different executions. Two such algorithms focusing on concurrency errors have been implemented in JPaX, one for deadlocks and the other for data races. It is important to note, that a deadlock or data race potential does not need to occur in order for its potential to be detected with these algorithms. This is what makes them very scalable in practice. The data race algorithm implemented is the Eraser algorithm from Compaq, however adopted to Java. The tool is currently being applied to a code base for controlling a spacecraft by the developers of that software in order to evaluate its applicability.

Havelund, Klaus↗

Parallel Adaptive Mesh Refinement Library

Parallel Adaptive Mesh Refinement Library (PARAMESH) is a package of Fortran 90 subroutines designed to provide a computer programmer with an easy route to extension of (1) a previously written serial code that uses a logically Cartesian structured mesh into (2) a parallel code with adaptive mesh refinement (AMR). Alternatively, in its simplest use, and with minimal effort, PARAMESH can operate as a domain-decomposition tool for users who want to parallelize their serial codes but who do not wish to utilize adaptivity. The package builds a hierarchy of sub-grids to cover the computational domain of a given application program, with spatial resolution varying to satisfy the demands of the application. The sub-grid blocks form the nodes of a tree data structure (a quad-tree in two or an oct-tree in three dimensions). Each grid block has a logically Cartesian mesh. The package supports one-, two- and three-dimensional models.

Mac-Neice, Peter↗

Control System Upgrade for Battery State-of-Charge Indications

The Advanced Test Reactor (ATR) Complex at Idaho National Laboratory (INL) relies on Battery Backed Power (BBP) systems and Uninterruptible Power Supplies (UPS) to ensure continuous power supply to critical components. This project aims to enhance the reliability and functionality of the battery monitoring and control systems by updating the State-of-Charge (SOC) system, Programmable Logic Controller (PLC), and Human-Machine Interface (HMI) for the nuclear safety-related battery banks. The current system, while functional, has areas for improvement, particularly in recharging calculations and alarm functions. The project objectives include developing flow charts, programming the new PLC and HMI, conducting bench tests, and updating design documentation. Additionally, the project ensures compliance with safety standards, develops training materials, creates comprehensive documentation, and integrates seamlessly with existing ATR infrastructure. The new SOC system is designed to be scalable for future upgrades, improve efficiency, enhance data accuracy, implement redundancy features, and achieve project goals within budget constraints while considering environmental impact. The methodology involved familiarizing with BBP and UPS systems, collecting current readings, rescaling signals, learning ladder logic, and updating the HMI. The transition from SLC 5/03 PLC using RS Logix 500 to CompactLogix 5380 using Studio 5000 was a key step. Despite challenges in transferring outdated PLC ladder logic and HMI code, starting from scratch led to a more accurate and efficient monitoring system, contributing to improved safety and operational efficiency. The project is currently awaiting approval of the Engineering Calculation and Analysis Report (ECAR) before implementation.

42 - ENGINEERING↗

The GABLE Report: Garbled Autonomous Bots Leveraging Ethereum

Simple but mission-critical internet-based applications that require extremely high reliability and availability could potentially benefit from running on robust public programmable blockchain platforms such as Ethereum. Unfortunately, program code running on such blockchains is ordinarily publicly viewable, rendering these platforms unsuitable for applications requiring strict privacy of application code, data, and results. However, might it be possible to encode an application's business logic and data for these platforms in such a way that it becomes impossible for unauthorized parties to infer any meaningful information whatsoever about the semantics of the data, and the operations being performed on that data? In this report, we describe GABLE (Garbled Autonomous Bots Leveraging Ethereum), a system concept developed at Sandia that achieves this security goal in a limited, but still useful range of circumstances. GABLE, uses simple but effective algorithms to permit secure private execution of garbled state machines (and more efficient garbled circuits) on public computing resources. We give an example working implementation for garbled state machines, written using the Python and Solidity programming languages, and outline how our methods can be extended to support a more powerful garbled universal circuit model of computation. The capability embodied by the GABLE, system has significant potential applications, a few of which we discuss in this report.

97 MATHEMATICS AND COMPUTING↗

CADAT integrated circuit mask analysis

CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

Source record↗

Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/

The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.

Lindgren, R. W.↗

Optical Firmware

Data-processing system exploits high speeds inherent in optical elements. Instruction sets for different computer operations reside on different external memory chips. Laser diodes activated for each operation generate light, reflected by holographic optical element to designated receptors in arithmetic and logic unit. Pattern of light beams embodies instruction set at given instant. With potential ability to reprogram in real time, conceptual system applicable to task-driven programming or artificial intelligence.

Bergman, Larry A.↗

Performance-based workload assessment: Allocation strategy and added task sensitivity

The preliminary results of a research program investigating the use of added tasks to evaluate mental workload are reviewed. The focus of the first studies was a reappraisal of the traditional secondary task logic that encouraged the use of low-priority instructions for the added task. It was believed that such low-priority tasks would encourage subjects to split their available resources among the two tasks. The primary task would be assigned all the resources it needed, and any remaining reserve capacity would be assigned to the secondary task. If the model were correct, this approach was expected to combine sensitivity to primary task difficulty with unintrusiveness to primary task performance. The first studies of the current project demonstrated that a high-priority added task, although intrusive, could be more sensitive than the traditional low-priority secondary task. These results suggested that a more appropriate model of the attentional effects associated with added task performance might be based on capacity switching, rather than the traditional optimal allocation model.

Vidulich, Michael A.↗

Aid For Simulating Digital Flight Control Systems

DIVERS translator is computer program to convert descriptions of digital flight-control systems (DFCS) into computer program. Language developed to represent design charts of DFCS. Translator converts DIVERS source code into easily transportable language, while minimizing probability that results are affected by interpretation of programmer. Final translated program used as standard of comparison to verify operation of actual flight-control systems. Applicable to simulation of other control systems; for example, electrical circuits and logic processes. Written in C.

Hartman, Richard M.↗

Hanford River Protection Project Life cycle Cost Modeling Tool to Enhance Mission Planning - 13396

The Life cycle Cost Model (LCM) Tool is an overall systems model that incorporates budget, and schedule impacts for the entire life cycle of the River Protection Project (RPP) mission, and is replacing the Hanford Tank Waste Operations Simulator (HTWOS) model as the foundation of the RPP system planning process. Currently, the DOE frequently requests HTWOS simulations of alternative technical and programmatic strategies for completing the RPP mission. Analysis of technical and programmatic changes can be performed with HTWOS; however, life cycle costs and schedules were previously generated by manual transfer of time-based data from HTWOS to Primavera P6. The LCM Tool automates the preparation of life cycle costs and schedules and is needed to provide timely turnaround capability for RPP mission alternative analyses. LCM is the simulation component of the LCM Tool. The simulation component is a replacement of the HTWOS model with new capability to support life cycle cost modeling. It is currently deployed in G22, but has been designed to work in any full object-oriented language with an extensive feature set focused on networking and cross-platform compatibility. The LCM retains existing HTWOS functionality needed to support system planning and alternatives studies going forward. In addition, it incorporates new functionality, coding improvements that streamline programming and model maintenance, and capability to input/export data to/from the LCM using the LCM Database (LCMDB). The LCM Cost/Schedule (LCMCS) contains cost and schedule data and logic. The LCMCS is used to generate life cycle costs and schedules for waste retrieval and processing scenarios. It uses time-based output data from the LCM to produce the logic ties in Primavera P6 necessary for shifting activities. The LCM Tool is evolving to address the needs of decision makers who want to understand the broad spectrum of risks facing complex organizations like DOE-RPP to understand how near-term programmatic decisions affect life cycle costs and commitments. (authors)

54 ENVIRONMENTAL SCIENCES↗

F100 multivariable control synthesis program: Evaluation of a multivariable control using a real-time engine simulation

The design, evaluation, and testing of a practical, multivariable, linear quadratic regulator control for the F100 turbofan engine were accomplished. NASA evaluation of the multivariable control logic and implementation are covered. The evaluation utilized a real time, hybrid computer simulation of the engine. Results of the evaluation are presented, and recommendations concerning future engine testing of the control are made. Results indicated that the engine testing of the control should be conducted as planned.

Szuch, J. R.↗

Deep Space Network Antenna Logic Controller

The Antenna Logic Controller (ALC) software controls and monitors the motion control equipment of the 4,000-metric-ton structure of the Deep Space Network 70-meter antenna. This program coordinates the control of 42 hydraulic pumps, while monitoring several interlocks for personnel and equipment safety. Remote operation of the ALC runs via the Antenna Monitor & Control (AMC) computer, which orchestrates the tracking functions of the entire antenna. This software provides a graphical user interface for local control, monitoring, and identification of faults as well as, at a high level, providing for the digital control of the axis brakes so that the servo of the AMC may control the motion of the antenna. Specific functions of the ALC also include routines for startup in cold weather, controlled shutdown for both normal and fault situations, and pump switching on failure. The increased monitoring, the ability to trend key performance characteristics, the improved fault detection and recovery, the centralization of all control at a single panel, and the simplification of the user interface have all reduced the required workforce to run 70-meter antennas. The ALC also increases the antenna availability by reducing the time required to start up the antenna, to diagnose faults, and by providing additional insight into the performance of key parameters that aid in preventive maintenance to avoid key element failure. The ALC User Display (AUD) is a graphical user interface with hierarchical display structure, which provides high-level status information to the operation of the ALC, as well as detailed information for virtually all aspects of the ALC via drill-down displays. The operational status of an item, be it a function or assembly, is shown in the higher-level display. By pressing the item on the display screen, a new screen opens to show more detail of the function/assembly. Navigation tools and the map button allow immediate access to all screens.

Ahlstrom, Harlow↗