Search NASA⌕ Search

SEARCH · Search NASA

Results for “device testing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 649 records · Page 36
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Nonlinear optical thin films

A focused approach to development and evaluation of organic polymer films for use in optoelectronics is presented. The issues and challenges that are addressed include: (1) material synthesis, purification, and the tailoring of the material properties; (2) deposition of uniform thin films by a variety of methods; (3) characterization of material physical properties (thermal, electrical, optical, and electro-optical); and (4) device fabrication and testing. Photonic materials, devices, and systems were identified as critical technology areas by the Department of Commerce and the Department of Defense. This approach offers strong integration of basic material issues through engineering applications by the development of materials that can be exploited as the active unit in a variety of polymeric thin film devices. Improved materials were developed with unprecedented purity and stability. The absorptive properties can be tailored and controlled to provide significant improvement in propagation losses and nonlinear performance. Furthermore, the materials were incorporated into polymers that are highly compatible with fabrication and patterning processes for integrated optical devices and circuits. By simultaneously addressing the issues of materials development and characterization, keeping device design and fabrication in mind, many obstacles were overcome for implementation of these polymeric materials and devices into systems. We intend to considerably improve the upper use temperature, poling stability, and compatibility with silicon based devices. The principal device application that was targeted is a linear electro-optic modulation etalon. Organic polymers need to be properly designed and coupled with existing integrated circuit technology to create new photonic devices for optical communication, image processing, other laser applications such as harmonic generation, and eventually optical computing. The progression from microscopic sample to a suitable film-forming material in a working device is a complex, multifaceted endeavor. It requires close attention to maintaining the optical properties of the electro-optic active portion of the polymer while manipulating the polymer structure to obtain the desired secondary polymer properties.

Leslie, Thomas M.↗
NASA NTRS2010

Considerations for a Proton Single Event Effects (SEE) Guideline

The intent of this document is to provide guidance on when and what type of SEE tests should be performed on a device under test (DUT) based on orbit, technology, existing data, and application. It is NOT intended to provide a detailed guideline for how to perform proton SEE radiation tests on electronics.

LaBel, Kenneth A.↗
NASA NTRS2010

Considerations for a Proton Single Event Effects (SEE) Guideline

The intent of this document is to provide guidance on when and what type of -SEE tests should be performed on a device under test (OUT) based on orbit, technology, existing data, and application. It is NOT intended to provide a detailed guideline for how to perform proton SEE radiation tests on electronics.

LaBel, Kenneth A.↗
DOE OSTI2016

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

42 ENGINEERING↗
DOE OSTI2021

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

Asaad, Sameh W.↗
NASA NTRS2015

Use of Proton SEE Data as a Proxy for Bounding Heavy-Ion SEE Susceptibility

Although heavy-ion single-event effects (SEE) pose serious threats to semiconductor devices in space, many missions face difficulties testing such devices at heavy-ion accelerators. Low-cost missions often find such testing too costly. Even well funded missions face issues testing commercial off the shelf (COTS) due to packaging and integration. Some missions wish to fly COTS systems with little insight into their components. Heavy-ion testing such parts and systems requires access to expensive and hard-to-access ultra-high energy ion accelerators, or significant system modification. To avoid these problems, some have proposed using recoil ions from high-energy protons as a proxy to bound heavy-ion SEE rates.

reliability estimation↗
NASA NTRS1973

Design, fabrication, testing, and delivery of improved beam steering devices

The development, manufacture, and testing of an optical steerer intended for use in spaceborne optical radar systems are described. Included are design principles and design modifications made to harden the device against launch and space environments, the quality program and procedures developed to insure consistent product quality throughout the manufacturing phase, and engineering qualification model testing and evaluation. The delivered hardware design is considered conditionally qualified pending action on further recommended design modifications.

Source record↗
NASA NTRS1977

Continuation of surge life of transient voltage suppressor

Efforts expended in testing, analyzing and the development of a meaningful definition of the mean number of peak pulses before failure (mp2bf) levels of a family of transient voltage suppressor devices were documented. Tests were done to determine the ability of the transient suppressor to effectively and reliably protect against severe short term, millisecond range, and transient voltages of the types resulting from inductive load switching and induced lightning. Existing pulse testing instrumentation was utilized, interfaced to an automatic sequencing test rack accommodating up to 50 devices. Tests were performed in step stress increments of 25% beginning at 25% and extending thru 100% rated I(pp) for each voltage category. The four voltage types test were the 6.8V, 33V, 91V, and 190V. Engineering efforts addressed the problem of improving the reliability of the 190V types.

Clark, O. M.↗
DOE OSTI2021

Sandia National Laboratories FY21 Progress Report

The Energetic Neutrons campaign led by Sandia National Laboratories (SNL) had a successful year testing electronic devices and printed circuit boards (PCBs) under 14 MeV neutron irradiation at OMEGA. During FY21 Sandia’s Neutron Effects Diagnostics (NEDs) and data acquisition systems were upgraded to test novel commercial off-the-shelf and Sandia-fabricated electronic components that support SNL’s National Security mission. The upgrades to the Sandia platform consisted of new cable chains, sample mount fixtures and a new fiber optics platform for testing optoelectronic devices.

42 ENGINEERING↗
NASA NTRS2006

SEU and Test Considerations for FPGA Devices

This viewgraph presentation provides an overview of Field Programmable Gate Arrays (FPGAs), what they are, implementations in space missions, and current available technologies. Single Event Upsets (SEUs) and Single Event Transients (SETs) are discussed in relation to their effects on FPGAs. Testing goals, considerations, and data analysis are reviewed.

Berg, Malanie↗
NASA NTRS2005

Subscale Test Methods for Combustion Devices

Stated goals for long-life LRE s have been between 100 and 500 cycles: 1) Inherent technical difficulty of accurately defining the transient and steady state thermochemical environments and structural response (strain); 2) Limited statistical basis on failure mechanisms and effects of design and operational variability; and 3) Very high test costs and budget-driven need to protect test hardware (aversion to test-to-failure). Ambitious goals will require development of new databases: a) Advanced materials, e.g., tailored composites with virtually unlimited property variations; b) Innovative functional designs to exploit full capabilities of advanced materials; and c) Different cycles/operations. Subscale testing is one way to address technical and budget challenges: 1) Prototype subscale combustors exposed to controlled simulated conditions; 2) Complementary to conventional laboratory specimen database development; 3) Instrumented with sensors to measure thermostructural response; and 4) Coupled with analysis

Anderson, W. E.↗
NASA NTRS1976

Mechanical testing - In situ fracture device for Auger electron spectroscopy

An in situ fracture device for Auger spectroscopy is described. The device is designed to handle small tensile specimens or small double-cantilever beam specimens and is fully instrumented with load and displacement transducers so that quantitative stress-strain measurements can be made directly. Some initial test results for specimens made from 4130 and 1020 steel are presented. Results indicate that impurity segregation at interfaces other than grain boundary may play a significant role in the mechanism of ductile fracture.

Moorhead, R. D.↗
DOE OSTI2017

Multi-Megawatt-Scale Power-Hardware-in-the-Loop Interface for Testing Ancillary Grid Services by Converter-Coupled Generation

Power-hardware-in-the-loop (PHIL) is a simulation tool that can support electrical systems engineers in the development and experimental validation of novel, advanced control schemes that ensure the robustness and resiliency of electrical grids that have high penetrations of low-inertia variable renewable resources. With PHIL, the impact of the device under test on a generation or distribution system can be analyzed using a real-time simulator (RTS). PHIL allows for the interconnection of the RTS with a 7 megavolt ampere (MVA) power amplifier to test multi-megawatt renewable assets available at the National Wind Technology Center (NWTC). This paper addresses issues related to the development of a PHIL interface that allows testing hardware devices at actual scale. In particular, the novel PHIL interface algorithm and high-speed digital interface, which minimize the critical loop delay, are discussed.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2017

Multi-Megawatt-Scale Power-Hardware-in-the-Loop Interface for Testing Ancillary Grid Services by Converter-Coupled Generation: Preprint

Power-hardware-in-the-loop (PHIL) is a simulation tool that can support electrical systems engineers in the development and experimental validation of novel, advanced control schemes that ensure the robustness and resiliency of electrical grids that have high penetrations of low-inertia variable renewable resources. With PHIL, the impact of the device under test on a generation or distribution system can be analyzed using a real-time simulator (RTS). PHIL allows for the interconnection of the RTS with a 7 megavolt ampere (MVA) power amplifier to test multi-megawatt renewable assets available at the National Wind Technology Center (NWTC). This paper addresses issues related to the development of a PHIL interface that allows testing hardware devices at actual scale. In particular, the novel PHIL interface algorithm and high-speed digital interface, which minimize the critical loop delay, are discussed.

17 WIND ENERGY↗
NASA NTRS2018

Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report

This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event Transient (SET) and Single Event Upset (SEU) induced faults by exposing the DUT to a heavy ion beam. Potential Single Event Latch-up (SEL) is monitored throughout heavy-ion testing by examining device current. This device does not have embedded mitigation. Hence, user implemented mitigation is investigated using Synopsys mitigation tools.

Single Event Transient (SET)↗
NASA NTRS1996

A Single-Block TRL Test Fixture for the Cryogenic Characterization of Planar Microwave Components

The High-Temperature-Superconductivity (HTS) group of the RF Technology Branch, Space Electronics Division, is actively involved in the fabrication and cryogenic characterization of planar microwave components for space applications. This process requires fast, reliable, and accurate measurement techniques not readily available. A new calibration standard/test fixture that enhances the integrity and reliability of the component characterization process has been developed. The fixture consists of 50 omega thru, reflect, delay, and device under test gold lines etched onto a 254 microns (0.010 in) thick alumina substrate. The Thru-Reflect-Line (TRL) fixture was tested at room temperature using a 30 omega, 7.62 mm (300 mil) long, gold line as a known standard. Good agreement between the experimental data and the data modelled using Sonnet's em(C) software was obtained for both the return (S(sub 11)) and insertion (S( 21)) losses. A gold two-pole bandpass filter with a 7.3 GHz center frequency was used as our Device Under Test (DUT), and the results compared with those obtained using a Short-Open-Load-Thru (SOLT) calibration technique.

Mejia, M.↗