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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Domain Wall Magnetic Tunnel Junction Spin Orbit Torque Devices for In Memory Computing.
Abstract not provided.
PHASE TRANSITIONS IN DISORDERD CIRCUITS WITH MEMORY
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Machine Learning Analysis of Memory Images for Process Characterization and Malware Detection
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Electrical and structural properties of binary Ga–Sb phase change memory alloys
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Partial densities of states from x-ray absorption and Auger electron spectroscopy: Use of core-hole memory
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Improving Memory Reuse with FPGAs for Computed Tomography Reconstruction.
Abstract not provided.
Radiation Effects in Advanced and Emerging Nonvolatile Memories.
Abstract not provided.
Distributed Out-of-Memory SVD on CPU/GPU Architectures
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FPGA-accelerated simulation of variable latency memory systems
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Detection of shared memory faults in a computing job
Technology for determining whether an inter-process type message has been successfully sent from a first process to a second process running on a single computer with a single processor(s) set. A variable (for example, a bit value) is used to indicate whether the inter-process message has been communicated between the processes. A timer and a predetermined timeout threshold are used to determine if the inter-process message has been pending for too long without being successfully communicated.
GaN-based threshold switching device and memory diode
A switching device including a GaN substrate; an unintentionally doped GaN layer on a first surface of the GaN substrate; a regrown unintentionally doped GaN layer on the unintentionally doped GaN layer; a regrowth interface between the unintentionally doped GaN layer and the regrown unintentionally doped GaN layer; a p-GaN layer on the regrown unintentionally doped GaN layer; a first electrode on the p-GaN layer; and a second electrode on a second surface of the GaN substrate.
Branch target filtering based on memory region access count
A branch predictor of a processor includes one or more prediction structures, including a predicted branch address and predicted branch direction, that identify predicted branches. To reduce power consumption, the branch predictor selects one or more of the prediction structures that are not expected to provide useful branch prediction information and filters the selected structures such that the filtered structures are not used for branch prediction. The branch predictor thereby reduces the amount of power used for branch prediction without substantially reducing the accuracy of the predicted branches.
Photonic Memory Controller Module (P-MCM)
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Method and apparatus for data protection in memory devices
An apparatus and method for efficiently transmitting data are described. A transmitter sends data to a receiver. An encoder of the transmitter divides a received first block of data into multiple sub-blocks. The encoder selects a portion of each sub-block to compare to one another. A portion in a particular sub-block has a same offset and a same size as other portions of other sub-blocks. If the encoder determines the multiple portions match one another, the encoder sends, to the receiver, a second block of data corresponding to the first block of data. The second block of data has a same size as a size of the received first block of data, and the second block of data includes security data from one of multiple error correction schemes. Therefore, the second block of data provides security without increasing an amount of data to transmit.
Nanostructured devices having perovskite nanocrystal layer for photodetection, optical memory, and neuromorphic functionality
The present disclosure relates to a device that includes a perovskite nanocrystal (NC) layer, a charge separating layer, an insulating layer, a gate electrode, a cathode, and an anode, where the charge separating layer is positioned between the perovskite NC layer and the insulating layer, the insulating layer is positioned between the charge separating layer and the gate electrode, and the cathode and the anode both electrically contact the charge separating layer and the insulating layer. In some embodiments of the present disclosure, the device may be configured to operate as at least one of a photodetector, an optical switching device, and/or a neuromorphic switching device.