High Speed CMOS Binary Active Pixel Image Sensor
A highly integrated active pixel sensor with on-chip 1 bit thresholding circuitry achieving an 8,000.
CMOS Image Sensor↗
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Chip-integrated metasurface full-Stokes polarimetric imaging sensor
Abstract Polarimetric imaging has a wide range of applications for uncovering features invisible to human eyes and conventional imaging sensors. Chip-integrated, fast, cost-effective, and accurate full-Stokes polarimetric imaging sensors are highly desirable in many applications, which, however, remain elusive due to fundamental material limitations. Here we present a chip-integrated Meta surface-based Full-Stokes Polar imetric Im aging sensor (MetaPolarIm) realized by integrating an ultrathin (~600 nm) metasurface polarization filter array (MPFA) onto a visible imaging sensor with CMOS compatible fabrication processes. The MPFA is featured with broadband dielectric-metal hybrid chiral metasurfaces and double-layer nanograting polarizers. This chip-integrated polarimetric imaging sensor enables single-shot full-Stokes imaging (speed limited by the CMOS imager) with the most compact form factor, records high measurement accuracy, dual-color operation (green and red) and a field of view up to 40 degrees. MetaPolarIm holds great promise to enable transformative applications in autonomous vision, industry inspection, space exploration, medical imaging and diagnosis.
47 OTHER INSTRUMENTATION↗
CMOS active pixel sensor type imaging system on a chip
Single substrate device is formed to have an image acquistition device and a controller. The controller on the substrate controls the system operation.
Fossum, Eric R.↗
CMOS active pixel sensor type imaging system on a chip
A single chip camera which includes an .[.intergrated.]. .Iadd.integrated .Iaddend.image acquisition portion and control portion and which has double sampling/noise reduction capabilities thereon. Part of the .[.intergrated.]. .Iadd.integrated .Iaddend.structure reduces the noise that is picked up during imaging.
Fossum, Eric R.↗
Soft x-ray detection for small satellites with a commercial CMOS sensor at room temperature
Recently CMOS (complementary metal-oxide-semiconductor) sensors have progressed to a point where they may offer improved performance in imaging x-ray detection compared to the CCDs often used in x-ray satellites. We demonstrate x-ray detection in the soft x-ray band (250-1700 eV) by a commercially available back-illuminated Sony IMX290LLR CMOS sensor using the Advanced Photon Source at the Argonne National Laboratory. Additionally, while operating the device at room temperature, we measure energy resolutions (FWHM) of 47 eV at 250 eV and and 77 eV 1700 eV which are comparable to the performance of the Chandra ACIS and the Suzaku XIS. Furthermore, we demonstrate that the IMX290LLR can withstand radiation up to 17.1 krad, making it suitable for use on spacecraft in low earth orbit.
47 OTHER INSTRUMENTATION↗
CMOS Active Pixel Sensors for Low Power, Highly Miniaturized Imaging Systems
The complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology has been developed over the past three years by NASA at the Jet Propulsion Laboratory, and has reached a level of performance comparable to CCDs with greatly increased functionality but at a very reduced power level.
CMOS complementary metal-oxide-semiconductor activ↗
A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors
In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
Ionizing Radiation Effects on Hole Collection Backside-Illuminated P-Type Deep-Trench Pinned Photo-MOS Pixels under Image Acquisition
Explore the source record for details and available documents.
CMOS Image Sensor (CIS)↗
A CMOS Imager with On-Chip Variable Resolution for Light Adaptive Imaging
A variable resolution CMOS active pixel image sensor that enhances S/N ratio at low illumination level is presented.
CMOS Imager On-chip Adaptive Imaging↗
128 x 128 CMOS Photodiode-Type Active Pixel Sensor with On-Chip Timing, Control and Signal
A 128 x 128 element CMOS active pixel image sensor (APS) with on-chip timing, control, and.
CMS Photodiode↗
Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology
A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.
Space Microelectronics Image Sensors APS Digital I↗
Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology
A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.
Space Microelectronics Image Sensors APS Digital I↗
CMOS active pixel sensor specific performance effects on star tracker/imager position accuracy
This paper gives the status of theoretical and experimental efforts at JPL in the development of environmentally robust (radiation hard and radiation tolerant), ultra-low power, high performance CMOS active pixel sensor (APS) imagers for star tracker/imager applications.
CMOS↗
Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes
A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.
Zheng, Xinyu↗
Development of selenium imaging detectors toward a definitive search for neutrinoless ββ decay
Imaging sensors made from an ionization target layer of amorphous selenium (aSe) coupled to a silicon complementary metal-oxide-semiconductor (CMOS) active pixel array for charge readout are a promising technology for neutrino physics. The high spatial resolution in a solid-state target provides unparalleled rejection of backgrounds from natural radioactivity in the search for the neutrinoless ββ decay of 82 Se. With this grant, we experimentally determined two crucial factors necessary for the realization of this novel technology: i) the intrinsic energy response of aSe to ionizing electrons, and ii) the feasibility to couple a target layer of aSe to a CMOS active pixel sensor to image electron tracks.
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
Dynamically reconfigurable vision with high performance CMOS active pixel sensors (APS)
A high-performance computational imager based on integration of CMOS active pixel imager array with on-chip signal processing and control via a new column-parallel architecture is presented.
CMOS imager computational imager low-power VLSI↗
CMOS active pixel sensor specific performance effects on star tracker/imager position accuracy
This presentation gives the status of theoretical and experimental efforts at JPL, in the development of environmentally robust (rad hard and rad tolerant), ultra-low power, high performance cmos active pixel sensor (aps) imagers for star tracker/imager applications.
CMOS↗
New process and pixel structure of an SOI-CMOS imager
We present architecture, process design and results from test pixels of a new Active Pixel Sensor (APS) imager implemented in 0.8 um SOI-CMOS technology.
SOI-CMOS↗