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The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.
An international review of materials processing in space is provided, taking into account the NASA materials processing in space program, European activities in the field of microgravity research, and Japanese material processing tests in space. The subjects considered are related to materials processing in a microgravity environment, industrial and university applications and involvement, and challenges and prospectives of microgravity research in space. Attention is given to a review of the containerless processing technologies and facilities, glass research in space, bubble behavior in molten glass in a temperature gradient, semiconductor crystal growth and segregation problems on earth and space, seeded crystal growth of pseudobinary systems with large liquidus-solidus separation, avenues and incentives for commercial use of a low-gravity environment, and the Universities Space Research Association and its role in the materials processing in space program.
Silicon carbide (SiC) and other wide bandgap semiconductors offer great promise of high power rating, high operating temperature, simple thermal management, and ultrahigh power density for both space and commercial power electronic systems. However, this great potential is seriously limited by the lack of reliable high-temperature device packaging technology. This Phase II project developed an ultracompact hybrid power module packaging technology based on the use of double lead frames and direct lead frame-to-chip transient liquid phase (TLP) bonding that allows device operation up to 450 degC. The new power module will have a very small form factor with 3-5X reduction in size and weight from the prior art, and it will be capable of operating from 450 degC to -125 degC. This technology will have a profound impact on power electronics and energy conversion technologies and help to conserve energy and the environment as well as reduce the nation's dependence on fossil fuels.
This presentation describes development and demonstrations of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. Silicon carbide (SiC) junction field effect transistor-resistor (JFET-R) ICs fabricated by NASA Glenn Research Center with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient, 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber, and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C temperature span) without significant change in signal (input /output) or power supply voltages. While the operating frequency and functional complexity is far below silicon-based ICs, these SiC application specific ICs (ASICs) are nevertheless becoming capable of providing unique and advantageous harsh-environment circuit functionality without cooling/sheltering overhead. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards manufacture, a majority of processing steps to realize the next SiC JFET-R IC prototype wafer run have been outsourced to commercial foundry. It is expected that further upscaling combined with technology transfer to commercial production will lower investment and risk barriers to useful application deployment.
The Interchange No. NCC2-5149 deals with the emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. To build such devices and subsystems, one needs to model the entire chip. PICs are useful for building components for integrated optical transmitters, integrated optical receivers, optical data storage systems, optical interconnects, and optical computers. For example, the current commercial rate for optical data transmission is 2.5 gigabits per second, whereas the use of shorter pulses to improve optical transmission rates would yield an increase of 400 to 1000 times. The improved optical data transmitters would be used in telecommunications networks and computer local-area networks. Also, these components can be applied to activities in space, such as satellite to satellite communications, when the data transmissions are made at optical frequencies. The research project consisted of developing accurate computer modeling of electromagnetic wave propagation in semiconductors. Such modeling is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Presently, there are no computer codes that could provide this modeling. Current codes do not solve the full vector, nonlinear, Maxwell's equations, which are required for these short pulses and also current codes do not solve the semiconductor Bloch equations, which are required to accurately describe the material's interaction with femtosecond pulses. The research performed under NCC2-5149 solves the combined Maxwell's and Bloch's equations.
The desire to assess the reliability of emerging scaled microelectronics technologies through faster reliability trials and more accurate acceleration models is the precursor for further research and experimentation in this relevant field. The effect of semiconductor scaling on microelectronics product reliability is an important aspect to the high reliability application user. From the perspective of a customer or user, who in many cases must deal with very limited, if any, manufacturer's reliability data to assess the product for a highly-reliable application, product-level testing is critical in the characterization and reliability assessment of advanced nanometer semiconductor scaling effects on microelectronics reliability. A methodology on how to accomplish this and techniques for deriving the expected product-level reliability on commercial memory products are provided.Competing mechanism theory and the multiple failure mechanism model are applied to the experimental results of scaled SDRAM products. Accelerated stress testing at multiple conditions is applied at the product level of several scaled memory products to assess the performance degradation and product reliability. Acceleration models are derived for each case. For several scaled SDRAM products, retention time degradation is studied and two distinct soft error populations are observed with each technology generation: early breakdown, characterized by randomly distributed weak bits with Weibull slope (beta)=1, and a main population breakdown with an increasing failure rate. Retention time soft error rates are calculated and a multiple failure mechanism acceleration model with parameters is derived for each technology. Defect densities are calculated and reflect a decreasing trend in the percentage of random defective bits for each successive product generation. A normalized soft error failure rate of the memory data retention time in FIT/Gb and FIT/cm2 for several scaled SDRAM generations is presented revealing a power relationship. General models describing the soft error rates across scaled product generations are presented. The analysis methodology may be applied to other scaled microelectronic products and their key parameters.
Under a Small Business Innovation Research (SBIR) contract from Kennedy Space Center (KSC), Femtometrics, Inc. developed the Real-Time Non-Volatile Residue (NVR) monitor. Criteria established by KSC called for a technology that could regulate the accumulation of nonvolatile residues in cleanroom environments. The company accommodated the Center's need with an advanced, highly sensitive surface acoustic wave (SAW) microsensor capable of detecting sub-monolayer deposition in cleanrooms where aerospace systems are assembled. Years earlier, Femtometrics responded to and received SBIR contracts from Langley Research Center for highly sensitive aerosol detectors for environmental researchers. Stimulated by the SBIR wins, the company set about to develop the SAW resonator technology. A new type of sensor has evolved from the research, one that has the ability to measure a range of chemical vapors by applying chemical-specific coating on the sensing surface. Commercial applications of the Real-Time NVR include Class 1 cleanrooms at semiconductor and hard-disk manufacturing plants.
Emerging technologies and continuing progress in vertical-cavity surface emitting laser (VCSEL) diode and metal-semiconductor-metal (MSM) photodetector research are making way for novel, high-speed forms of optical data transfer in communication systems. VCSEL diodes operating at 1550 nm have only recently become commercially available, while MSM photodetectors are pushing the limits of contact lithography with interdigitated electrode widths reaching sub micron levels. We propose a novel, free-space optical interconnect operating at about 1Gbit/s utilizing VCSEL diodes and MSM photodetectors. We report on development, progress, and current work, which are as follows: first, analysis of the divergent behavior of VCSEL diodes for coupling to MSM photodetectors with a 50 by 50 m active area and second, the normalized frequency response of the VCSEL diode as a function of the modulating frequency. Third, the calculated response of MSM photodetectors with varying electrode width and spacing on the order of 1 to 3 m as well as the fabrication and characterization of these devices. The work presented here will lead to the formation and characterization of a fully integrated 1Gbit/s free-space optical interconnect at 1550 nm and demonstrates both chip level and board level functionality for RF/microwave digital systems.
The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were installed in water-cooled jackets, as shown. This was a severe test because the pressure-sensing chips were exposed to the hot combustion gases. Prior to the installation of the SiC pressure sensors, two high-temperature silicon sensors, installed in the same locations, did not survive a single engine run. The durability of the leadless SiC pressure sensor was demonstrated when both SiC sensors operated properly throughout the two runs that were conducted.
The history of NASA's materials processing in space activities is reviewed. Market projections, support requirements, orbital operations issues, cost estimates and candidate systems (orbiter sortie flight, orbiter serviced free flyer, space station, space station serviced free flyer) for the space production of semiconductor crystals are examined. Mission requirements are identified for materials processing, communications missions, bioprocessing, and for transferring aviation maintenance training technology to spacecraft.
Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.
Interval Logic Corporation is a graduate of the Ames Technology Commercialization Center (Ames Research Center's business incubator). The founders are the developers of the Spike Scheduling system, the most successful scheduling technology ever developed for NASA. This software was used to double the operational efficiency of the Hubble Space Telescope. Today the software is called Leverage and used to optimize all levels of semiconductor manufacturing.
A ceramic- and thick-film-materials-based prototype electronic package designed for silicon carbide (SiC) high-temperature sensors and electronics has been successfully tested at 500 C in an oxygen-containing air environment for 500 hours. This package was designed, fabricated, assembled, and electronically evaluated at the NASA Glenn Research Center at Lewis Field with an in-house-fabricated SiC semiconductor test chip. High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as space missions to the inner solar system or the emission control electronics and sensors in aeronautical engines. Single-crystal SiC has such excellent physical and chemical material properties that SiC-based semiconductor electronics can operate at temperatures over 600 C, which is significantly higher than the limit for Si-based semiconductor devices. SiC semiconductor chips were recently demonstrated to be operable at temperatures as high as 600 C, but only in the probe station environment because suitable packaging technology for sensors and electronics at temperatures of 500 C and beyond did not exist. Thus, packaging technology for SiC-based sensors and electronics is immediately needed for both application and commercialization of high-temperature SiC sensors and electronics. In response to this need, researchers at Glenn designed, fabricated, and assembled a prototype electronic package for high-temperature electronics, sensors, and microelectromechanical systems (MEMS) using aluminum nitride (AlN) substrate and gold (Au) thick-film materials. This prototype package successfully survived a soak test at 500 C in air for 500 hours. Packaging components tested included thick-film high-temperature metallization, internal wire bonds, external lead bonds, and a SiC diode chip die-attachment. Each test loop, which was composed of thick-film printed wire, wire bond, and lead bond was subjected to a 50-mA direct current for 250 hours at 500 C.
Ion Applications Inc., of West Palm Beach, Florida, partnered with Ames Research Center through Small Business Innovation Research (SBIR) agreements to develop a miniature version ion mobility spectrometer (IMS). While NASA was interested in the instrument for detecting chemicals during exploration of distant planets, moons, and comets, the company has incorporated the technology into a commercial hand-held IMS device for use by the military and other public safety organizations. Capable of detecting and identifying molecules with part-per-billion sensitivity, the technology now provides soldiers with portable explosives and chemical warfare agent detection. The device is also being adapted for detecting drugs and is employed in industrial processes such as semiconductor manufacturing.
The Titan-CW Ti:sapphire (titanium-doped sapphire) tunable laser is an innovation in solid-state laser technology jointly developed by the Research and Solid State Laser Divisions of Schwartz Electro-optics, Inc. (SEO). SEO is producing the laser for the commercial market, an outgrowth of a program sponsored by Langley Research Center to develop Ti:sapphire technology for space use. SEO's Titan-CW series of Ti:sapphire tunable lasers have applicability in analytical equipment designed for qualitative analysis of carbohydrates and proteins, structural analysis of water, starch/sugar analyses, and measurements of salt in meat. Further applications are expected in semiconductor manufacture, in medicine for diagnosis and therapy, and in biochemistry.
The current state-of-the-art flip chip packages for space applications are the class-Y non-hermetic ceramic packages, whereas for commercial applications, organic packages have been the mainstream technology for about two decades. The high reliability of the class-Y parts suggests that the hermeticity is not critical for the reliability of flip chip devices and that organic flip chip packages could be reliable enough for space applications. The current report summarizes the result of collaboration between JPL and Cobham semiconductor space solutions to study the reliability of the organic flip chip packages.
The status of emerging silicon carbide (SiC) widebandgap semiconductor electronics technology is briefly surveyed. SiC-based electronic devices and circuits are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot function. Projected performance benefits of SiC electronics are briefly illustrated for several applications. However, most of these operational benefits of SiC have yet to be realized in actual systems, primarily owing to the fact that the growth techniques of SiC crystals are relatively immature and device fabrication technologies are not yet sufficiently developed to the degree required for widespread, reliable commercial use. Key crystal growth and device fabrication issues that limit the performance and capability of high-temperature and/or high-power SiC electronics are identified. The electrical and material quality differences between emerging SiC and mature silicon electronics technology are highlighted.
Gen3, Embedded Cooling, promises to revolutionize thermal management of advanced microelectronic systems by eliminating the sequential conductive and interfacial thermal resistances which dominate the present 'remote cooling' paradigm. Single-phase interchip microfluidic flow with high thermal conductivity chips and substrates has been used successfully to cool single transistors dissipating more than 40kW/sq cm, but efficient heat removal from transistor arrays, larger chips, and chip stacks operating at these prodigious heat fluxes would require the use of high vapor fraction (quality), two-phase cooling in intra- and inter-chip microgap channels. The motivation, as well as the challenges and opportunities associated with evaporative embedded cooling in realistic form factors, is the focus of this paper. The paper will begin with a brief review of the history of thermal packaging, reflecting the 70-year 'inward migration' of cooling technology from the computer-room, to the rack, and then to the single chip and multichip module with 'remote' or attached air- and liquid-cooled coldplates. Discussion of the limitations of this approach and recent results from single-phase embedded cooling will follow. This will set the stage for discussion of the development challenges associated with application of this Gen3 thermal management paradigm to commercial semiconductor hardware, including dealing with the effects of channel length, orientation, and manifold-driven centrifugal acceleration on the governing behavior.