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Feedback system employing a digital logic comparator to detect and correct amplifier drift provides stable gain characteristics for nanosecond amplifiers used in counting applications. Additional anticoincidence logic enables application of the regulation circuit to the amplifier and discriminator while they are mounted in an operable circuit.
I will present an overview (in French) of the AIST Program with a particular emphasis on Earth system Digital Twins (ESDT) and on the collaborative work the AIST Program is currently conducting with CNES.
Digital ranging system measures slant range /from 500 feet to 200 nautical miles/ and provides digital range readout during range tracking between any two airborne vehicles.
This report describes a modeling and simulation approach for disturbance patterns representative of the environment experienced by a digital system in an electromagnetic reverberation chamber. The disturbance is modeled by a multi-variate statistical distribution based on empirical observations. Extended versions of the Rejection Samping and Inverse Transform Sampling techniques are developed to generate multi-variate random samples of the disturbance. The results show that Inverse Transform Sampling returns samples with higher fidelity relative to the empirical distribution. This work is part of an ongoing effort to develop a resilience assessment methodology for complex safety-critical distributed systems.
Digital filter suppresses the effects of nonstatistical noise bursts on data averaged over multichannel scaler. Interposed between the sampled channels and the digital averaging system, it uses binary logic circuitry to compare the number of counts per channel with the average number of counts per channel.
Power gain in spacecraft power supply obtained by switching off digital computer system
Digital network reliability with redundancy to mask logic modules failure for asymmetric failure modes
Langley Research Center (LaRC) has for years been a leader in field acoustic array measurement technique. Two field-deployable digital measurement systems have been developed to support acoustic research programs at LaRC. For several years, LaRC has used the Digital Acoustic Measurement System (DAMS) for measuring the acoustic noise levels from rotorcraft and tiltrotor aircraft. Recently, a second system called Remote Acquisition and Storage System (RASS) was developed and deployed for the first time in the field along with DAMS system for the Community Noise Flight Test using the NASA LaRC-757 aircraft during April, 2000. The test was performed at Airborne Airport in Wilmington, OH to validate predicted noise reduction benefits from alternative operational procedures. The test matrix was composed of various combinations of altitude, cutback power, and aircraft weight. The DAMS digitizes the acoustic inputs at the microphone site and can be located up to 2000 feet from the van which houses the acquisition, storage and analysis equipment. Digitized data from up to 10 microphones is recorded on a Jaz disk and is analyzed post-test by microcomputer system. The RASS digitizes and stores acoustic inputs at the microphone site that can be located up to three miles from the base station and can compose a 3 mile by 3 mile array of microphones. 16-bit digitized data from the microphones is stored on removable Jaz disk and is transferred through a high speed array to a very large high speed permanent storage device. Up to 30 microphones can be utilized in the array. System control and monitoring is accomplished via Radio Frequency (RF) link. This paper will present a detailed description of both systems, along with acoustic data analysis from both systems.
A new 16-bit 6-MHz compact, lightweight waveform digitizer module has been tested using actual 300-nm lidar atmospheric returns. The noise level of this digitizer was tested and found to be substantially below the ozone number density to be measured. The digitizer is inexpensive and compact enough to be deployed in UAV aircraft and spacecraft environments. With 16-bit digitizers a resolution of 0.046 mV/step can be achieved, substantially improving resolution over 12-bit systems. This digitizer will find widespread use in future DIAL receiver systems.
Digital phase lock loop system is designed by smoothing the proportional control with a low pass filter. This method does not significantly affect the loop dynamics when the smoothing filter bandwidth is wide compared to loop bandwidth.
On September 18, 2023, NASA Earth Science Technology Office (ESTO) Advanced Information Systems Technology (AIST) Program conducted a mini-workshop that brought together seven experts to survey and discuss "Standards for Interoperable Digital Twins". Since three years, the AIST Program has been developing technologies and prototypes for Earth System Digital Twins (ESDT). During those developments and after the ESDT Workshop held in October 2022, it became clear that standard for ESDT interoperability were needed and should be defined as soon as possible. To address this challenge, the AIST program will survey ongoing development for Digital Twins standards in various domains and the September 18, 2023 Workshop represented the first step towards this understanding. Speakers during this event included: Michael Grieves (Digital Twin Institute), Siri Jodha Singh Khalsa (IEEE GRSS Standards), Trent Tinker (OGC), Ryan Berkheimer (NOAA), John Stone (NVIDIA), Thomas Geenen (ECMWF-DestinE) and Arne Berre (SINTEF-Iliad DTO and EDITO). This presentation regroups all the speakers' presentations.
Unified theory for design of optimum coherent digital communication systems
Digital circuit accurately regulates electromechanical drive mechanism velocity. The gain and phase characteristics of digital circuits are relatively unimportant. Control accuracy depends only on the stability of the input signal frequency.
Redundant-channel system automatically corrects any single error in a set of three binary signal channels. This system is especially applicable to digital computers where data is transmitted in parallel channels.
This report summarizes and describes the results of a study of current or emerging multiplex data buses as applicable to digital flight systems, particularly with regard to civil aircraft. Technology for pre-1995 and post-1995 timeframes has been delineated and critiqued relative to the requirements envisioned for those periods. The primary emphasis has been an assured airworthiness of the more prevalent type buses, with attention to attributes such as fault tolerance, environmental susceptibility, and problems under continuing investigation. Additionally, the capacity to certify systems relying on such buses has been addressed.
A maximum likelihood parameter estimation procedure and program were developed for the extraction of the stability and control derivatives of aircraft from flight test data. Nonlinear six-degree-of-freedom equations describing aircraft dynamics were used to derive sensitivity equations for quasilinearization. The maximum likelihood function with quasilinearization was used to derive the parameter change equations, the covariance matrices for the parameters and measurement noise, and the performance index function. The maximum likelihood estimator was mechanized into an iterative estimation procedure utilizing a real time digital computer and graphic display system. This program was developed for 8 measured state variables and 40 parameters. Test cases were conducted with simulated data for validation of the estimation procedure and program. The program was applied to a V/STOL tilt wing aircraft, a military fighter airplane, and a light single engine airplane. The particular nonlinear equations of motion, derivation of the sensitivity equations, addition of accelerations into the algorithm, operational features of the real time digital system, and test cases are described.
This paper describes a digital processing algorithm and its associated system design for producing images from Synthetic Aperture Radar (SAR) data. The proposed system uses the Fast Fourier Transform (FFT) approach to perform the two-dimensional correlation process. The range migration problem, which is often a major obstacle to efficient processing, can be alleviated by approximating the locus of echoes from a point target by several linear segments. SAR data corresponding to each segment is correlated separately, and the results are coherently summed to produce full-resolution images. This processing approach exhibits greatly improved computation efficiency relative to conventional digital processing methods.
A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks. To design digital hardware systems from their high level VHDL (Very High Speed Integrated Circuit Hardware Description Language) representation to their finished form, a special data representation is required. This data representation as well as the functioning of the overall system is described.