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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Regrowth and Selective Area Growth of GaN for Vertical Power Electronics

Gallium Nitride (GaN) has a great potential in high-power and high-frequency applications due to its wide energy gap and good transport property. So far all commercial GaN optoelectronic and electronic devices have planar junctions and heterostructures prepared by epitaxial growth. To take the advantage of the merits of GaN material properties, more sophisticated device configurations such as current-aperture vertical electron transistors (CAVETs), junction field-effect transistors (JFETs), and super-junction (SJ) devices require the ability to form in-plane, lateral junctions by selective area doping (SAD). In this project, we explored a novel approach of realizing SAD through selective-area etching (SAE) followed by selective-area growth (SAG).

36 MATERIALS SCIENCE↗
DOE OSTI2022

ARPA-E PNDIODES "PN Junctions by Ion Implantation" Project (Final Report)

Electricity accounts for nearly 40% of the energy generated in the United States, of which 65% is lost to electrical system inefficiency before reaching end-use sectors. Power electronics will play a growing role in this distribution and end-use, with up to 80% of electricity estimated to pass through power electronics from generation to consumption by 2030. This gives technical improvements in power electronics enormous potential to drive efficiency gains throughout the U.S. economy. Current Si-based power architectures including MOSFETs and IGBTs are limited by high losses, low switching frequency, and poor high-temperature performance. Given the material properties of GaN, devices can exhibit a given turn-on resistance and breakdown voltage with a minute fraction of the area of a Si device—all with higher switching speeds. While n-type doping of III-nitrides has reached a high level of maturity and integration into commercialized products, p-type doping presents distinct challenges that requires continued research. The success of the next generation of GaN-based power devices depends in large part on the ability to form selective-area p-type regions, which can be accomplished by ion implantation of the prevailing acceptor dopant, Mg. This approach is relatively inexpensive and is a fab-ready processing step for creation of current-generation power electronic devices including BJTs, IGBTs, and diode rectifiers. However, ion implantation induces lattice damage and creates point defects within the material, which negatively impacts dopant activation annealing. These forms of damage may be removed by high-temperature annealing, however short annealing time and higher pressures are required to prevent decomposition of the material. We approach this challenge through an innovative combination of approaches toward obtaining high-conductivity p-type GaN. By the novel employment of a gyrotron, a microwave source that can be shaped into a highly localized beam to dissipate very high power in a semiconductor target, a wafer of GaN can be annealed in short (<2 s) ‘pulses’ at temperatures of 1450 °C (2640 °F) to achieve p-type activation without appreciable surface degradation. The p-type activation of Mg-implanted GaN can be further aided by co-implantation with N, believed to enhance the removal of point defects that compensate the acceptors dopant. Elevation to such high temperatures for even a short time induces degradation of GaN-to overcome, we have implemented additional measures to retain high-quality crystalline GaN while removing implant damage and activating Mg dopant. A bilayer cap of AlN is deposited by a combination of chemical and physical vapor deposition to protect the GaN surface. To prevent decomposition of GaN loss of N during annealing, a custom vessel—to contain pressurized N while allowing injection of microwave energy—is employed. By detailed study of the interaction of various measures that are implemented to protect the sample surface (GaN), activate the implanted dopants, and mitigate damage of the lattice heating damage during annealing, we are able to achieve p-type GaN and observe recovery of the crystal and removal of substantial density of defects created during the implantation process.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2022

Distributed polarization-doped GaN p–n diodes with near-unity ideality factor and avalanche breakdown voltage of 1.25 kV

Polarization-induced (Pi) distributed or bulk doping in GaN, with a zero dopant ionization energy, can reduce temperature or frequency dispersions in impurity-doped p–n junctions caused by the deep-acceptor-nature of Mg, thus offering GaN power devices promising prospects. Before comprehensively assessing the benefits of Pi-doping, ideal junction behaviors and high-voltage capabilities should be confirmed. In this work, we demonstrate near-ideal forward and reverse I–V characteristics in Pi-doped GaN power p–n diodes, which incorporates linearly graded, coherently strained AlGaN layers. Hall measurements show a net increase in the hole concentration of 8.9 × 1016 cm−3 in the p-layer as a result of the polarization charge. In the Pi-doped n-layer, a record-low electron concentration of 2.5 × 1016 cm−3 is realized due to the gradual grading of Al0-0.72GaN over 1 μm. The Pi-doped p–n diodes have an ideality factor as low as 1.1 and a 0.10 V higher turn-on voltage than the impurity-doped p–n diodes due to the increase in the bandgap at the junction edge. A differential specific on-resistance of 0.1 mΩ cm2 is extracted from the Pi-doped p–n diodes, similar with the impurity-doped counterpart. The Pi-doped diodes show an avalanche breakdown voltage of ∼1.25 kV, indicating a high reverse blocking capability even without an ideal edge-termination. This work confirms that distributed Pi-doping can be incorporated in high-voltage GaN power devices to increase hole concentrations while maintaining excellent junction properties.

Nomoto, Kazuki↗
DOE OSTI2020

Quantifying Dynamic On-State Resistance of GaN HEMTs for Power Converter Design via a Survey of Low and High Voltage Devices

Designing and optimizing high switching frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistances, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) switches was plagued by detrimental dynamic on-state resistance effects. This complex phenomenon for GaN devices is characterized by deviations in on-state resistance from dc operating characteristics based on design choices such as the magnitude and duration of both voltage and current stress, switching mode, and junction temperature. While device manufacturers have made improvements compared to early generation devices, experimental evidence from a survey of commercial GaN transistors highlight measurable change in on-state resistance still exists due to variations in voltage stress during hard-switching operation. After sharing insights for obtaining low noise measurements, an analysis method along with two metrics are proposed to characterize dynamic on-state resistance measurements for power electronics designers. Furthermore, quantifying the performance of GaN devices with standardized metrics facilitates a fair comparison between different GaN device technologies during converter development, enables manufacturing qualification for GaN switches, and provides a benchmark to catalyze improvement for the next generation of GaN device development.

14 SOLAR ENERGY↗
DOE OSTI2024

Dynamics of carrier injection through V-defects in long wavelength GaN LEDs

The efficiency of high-power operation of multiple quantum well (QW) light emitting diodes (LEDs) to a large degree depends on the realization of uniform hole distribution between the QWs. In long wavelength InGaN/GaN QW LEDs, the thermionic interwell hole transport is hindered by high GaN barriers. However, in polar LED structures, these barriers may be circumvented by the lateral hole injection via semipolar {$10\bar{1}1$} QWs that form on the facets of V-defects. The efficiency of such carrier transfer depends on the transport time since transport in the semipolar QWs is competed by recombination. In this work, we study the carrier transfer from the semipolar to polar QWs by time-resolved photoluminescence in long wavelength (green to red) LEDs. We find that the carrier transfer through the semipolar QWs is fast, a few tens of picoseconds with the estimated room temperature ambipolar diffusion coefficient of ∼5.5 cm 2 /s. With diffusion much faster than recombination, the hole transport from the p-side of the structure to the polar QWs should proceed without a substantial loss, contributing to the high efficiency of long wavelength GaN LEDs.

Crystallographic defects↗
DOE OSTI2020

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

42 ENGINEERING↗
DOE OSTI2026

Uranium Doped Gallium Nitride Epitaxial Thin Films

Gallium nitride (GaN) is near ubiquitous in modern day technologies, forming the backbone of solid-state lighting and high-power electronics. Engineering the physical properties of GaN has been investigated to some degree by the incorporation or doping of most of the elements of the periodic table, but the actinides remain unexplored. Molecular beam epitaxy is used to demonstrate uranium doping of GaN single crystals. High structural quality of the host matrix is maintained despite partial elemental segregation of the uranium dopant into 1D structures at the levels presented here. Electronic transport measurements reveal relatively high conductivity, which persists down to cryogenic temperature and is characterized by the formation of narrow gaps in the electronic band structures very close to the Fermi level. Photoluminescence measurements reveal that the U-doped GaN exhibits optical behavior similar to that of the GaN substrate. The addition of actinide materials to a non-centrosymmetric, optically active, radiation-hard, and electronically tunable host matrix opens a world of possibilities for investigating and leveraging elements with high electron correlations in the pursuit of novel devices.

36 - MATERIALS SCIENCE↗
DOE OSTI2024

Reduced trap state density in AlGaN/GaN HEMTs with low-temperature CVD-grown BN gate dielectric

In this Letter, low-temperature (400 °C) chemical vapor deposition-grown boron nitride (BN) was investigated as the gate dielectric for AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on a Si substrate. Comprehensive characterizations using x-ray photoelectron spectroscopy, reflection electron energy loss spectroscopy, atomic force microscope, high-resolution transmission electron microscopy, and time-of-flight secondary ion mass spectrometry were conducted to analyze the deposited BN dielectric. Compared with conventional Schottky-gate HEMTs, the MISHEMTs exhibited significantly enhanced performance with 3 orders of magnitude lower reverse gate leakage current, a lower off-state current of 1 × 10−7 mA/mm, a higher on/off current ratio of 108, and lower on-resistance of 5.40 Ω mm. The frequency-dependent conductance measurement was performed to analyze the BN/HEMT interface, unveiling a low interface trap state density (Dit) on the order of 5 × 1011–6 × 1011 cm−2 eV−1. This work shows the effectiveness of low-temperature BN dielectrics and their potential for advancing GaN MISHEMTs toward high-performance power and RF electronics applications.

Physics↗
DOE OSTI2021

Record-Low Thermal Boundary Resistance between Diamond and GaN-on-SiC for Enabling Radiofrequency Device Cooling

The implementation of 5G-and-beyond networks requires faster, high-performance, and power-efficient semiconductor devices, which are only possible with materials that can support higher frequencies. Gallium nitride (GaN) power amplifiers are essential for 5G-and-beyond technologies since they provide the desired combination of high frequency and high power. These applications along with terrestrial hub and backhaul communications at high power output can present severe heat removal challenges. The cooling of GaN devices with diamond as the heat spreader has gained significant momentum since device self-heating limits GaN’s performance. However, one of the significant challenges in integrating polycrystalline diamond on GaN devices is maintaining the device performance while achieving a low diamond/GaN channel thermal boundary resistance. In this study, we achieved a record-low thermal boundary resistance of around 3.1 ± 0.7 m 2 K/GW at the diamond/Si 3 N 4 /GaN interface, which is the closest to theoretical prediction to date. The diamond was integrated within ~1 nm of the GaN channel layer without degrading the channel’s electrical behavior. Furthermore, we successfully minimized the residual stress in the diamond layer, enabling more isotropic polycrystalline diamond growth on GaN with thicknesses >2 μm and a ~1.9 μm lateral grain size. More isotropic grains can spread the heat in both vertical and lateral directions efficiently. Using transient thermoreflectance, the thermal conductivity of the grains was measured to be 638 ± 48 W/m K, which when combined with the record-low thermal boundary resistance makes it a leading-edge achievement.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2020

GaN‐based split phase transformer‐less PV inverter with auxiliary ZVT circuit

This paper explores performance enhancement of the common ground dynamic dc‐link (CGDL) inverter for single phase photovoltaic (PV) applications by a combination of gallium nitride (GaN) devices, split phase topology, coupled inductors, and zero voltage transition (ZVT) scheme. The CGDL inverter has the inherent advantage of minimised dc‐link capacitance and negligible leakage current due to the common ground configuration, but its reported efficiency was usually lower because of the higher dc‐link voltage used for the reduction of decoupling capacitance to a great extent. To solve the efficiency problem, in this study, a soft switching circuit is proposed for the first stage, while a coupled inductor integrated magnetics is incorporated in the second stage to reduce inductor loss, volume, and cost. Both of these topological improvements combined with the use of GaN devices facilitate in achieving high efficiency without compromising converter power density. Extensive experimental results are provided from a GaN based 1 kVA hardware prototype to demonstrate the superior performance of the CGDL inverter attaining a peak efficiency of 98.7% and a California Energy Commission efficiency of 98.5% at 75/50 kHz switching frequency.

Xia, Yinglai↗
DOE OSTI2021

SiC and GaN Devices With Cryogenic Cooling

This article presents the cryogenically cooled application for wide bandgap (WBG) semiconductor devices. Characteristics of silicon carbide (SiC) and gallium nitride (GaN) at cryogenic temperatures are illustrated. SiC MOSFETs exhibit increased on-state resistance and slower switching speed at cryogenic temperatures. However, cryogenic cooling provides low ambient temperature environment and thus enables the SiC converter to operate at lower junction temperature to achieve higher efficiency compared to room temperature cooling. A cryogenically cooled MW-level SiC inverter prototype is developed and demonstrated the feasibility of operating high-power SiC converter with cryogenic cooling. GaN HEMTs exhibit more than five times on-state resistance reduction and faster switching speed at cryogenic temperatures which makes GaN HEMTs an excellent candidate for cryogenic power electronics applications. The significantly reduced on-state resistance of GaN devices provides the possibility to operate them at a current level much higher than rated current at cryogenic temperatures. A GaN double pulse test (DPT) circuit is constructed and demonstrated that GaN HEMTs can operate at nearly four times of rated current at cryogenic temperatures. Challenges of utilizing WBG device with cryogenic cooling are discussed and summarized.

42 ENGINEERING↗
DOE OSTI2025

High-Voltage Pulsed Power Generator for Beam Injection Systems

Beam injection systems in hadron colliders require kickers generating ±50 kV peak voltages into a 50 Ω impedance, with peak currents of 1000 A and sub-10 ns rise and fall times. This paper presents a novel high-voltage pulse power generator utilizing a distributed pulser architecture. It combines gallium nitride (GaN) transistors in a Marx topology with an inductive adder, achieving nanosecond-scale switching speeds and high-power efficiency. Compared to other solutions such as based on MOSFETs or fast ionization dynistors, our development offers superior peak and average power performance, reduced system complexity, and enhanced reliability, marking a significant step forward in high-voltage pulse generation for accelerator applications.

Smirnov, Alexander (ORCID:0000000280631691)↗
DOE OSTI2020

Tri-gate GaN junction HEMT

This work presents a tri-gate GaN junction high-electron-mobility transistor (JHEMT) concept in which the p–n junction wraps around the AlGaN/GaN fins in the gate region. This tri-gate JHEMT differs from all existing GaN FinFETs and tri-gate HEMTs, as they employ a Schottky or a metal-insulator-semiconductor (MIS) gate stack. A tri-gate GaN JHEMT is fabricated using p-type NiO with the gate metal forming an Ohmic contact to NiO. The device shows minimal hysteresis and a subthreshold slope of 63 ± 2 mV/decade with an on-off current ratio of 10 8 . Compared to the tri-gate MISHEMTs fabricated on the same wafer, the tri-gate JHEMTs exhibit higher threshold voltage (V TH ) and achieve positive V TH without the need for additional AlGaN recess. In addition, this tri-gate JHEMT with a fin width of 60 nm achieves a breakdown voltage (BV) > 1500 V (defined at the drain current of 1 μA/mm at zero gate bias) and maintains the high BV with the fin length scaled down to 200 nm. In comparison, the tri-gate MISHEMTs with narrower and longer fins show punch-through at high voltages. Moreover, when compared to planar enhancement mode HEMTs, tri-gate JHEMTs show significantly lower channel sheet resistance in the gate region. Finally, these results illustrate a stronger channel depletion and electrostatic control in the junction tri-gate compared to the MIS tri-gate and suggest great promise of the tri-gate GaN JHEMTs for both high-voltage power and low-voltage power/digital applications.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Origin of Soft-Switching Output Capacitance Loss in Cascode GaN HEMTs at High Frequencies

Output capacitance (C OSS ) loss (E DISS ) is produced when the C OSS of a power device is charged and discharged, which ideally should be a lossless process. This loss was recently revealed to be a crucial concern for GaN high electron mobility transistors (HEMTs) in high-frequency soft-switching applications. Among various GaN devices, the composite-type, cascode GaN HEMT was reported to show the largest E DISS with a voltage dependence distinct from discrete GaN HEMTs. However, the physical origins of the EDISS in cascode GaN HEMTs remain unclear. This work fills this gap by identifying three loss components and, for the first time, experimentally quantifying them in the multi-MHz resonant switching. These loss components include a) the avalanche loss of Si MOSFET, b) the intrinsic E DISS of GaN HEMT, and c) the Si avalanche-induced GaN turn-ON loss. The last component was found to dominate E DISS at high voltage. By eliminating the Si avalanche and the associated loss components (a) and (c), the E DISS of cascode GaN HEMTs can be reduced by up to 75% at the price of an increase in output charge and switching transition time. Furthermore, these results provide new physical insights and practical guidelines to trim the soft-switching loss of cascode GaN HEMTs in high-frequency applications.

42 ENGINEERING↗