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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2019

Methane detection of chirped laser dispersion spectroscopy using DSB-SC modulation

This paper discusses the use of double-sideband suppressed-carrier (DSB-SC) modulation and radio frequency mixer as phase detector to extract phase information for methane detection in chirped laser dispersion spectroscopy (CLaDS). The 1.66 μm light from narrow-linewidth laser was modulated by electro-optic modulator (EOM) working on DSB-SC mode. These two sidebands passed through gas chamber and formed interference on photodetector. The phase change from gas absorption in beating signal can be extracted by using passive RF mixer with another input as reference signal which is achieved by doubling RF drive signal of EOM. In RF mixer, two inputs with identical frequency but various phase shift corresponds to DC bias voltage variation of output. The phase change is proportional to refractive index change and can be referred to gas concentration by using Kramers-Kronig relations. The advantage of phase sensitive CLaDS is wide dynamic range for gas detection. It compensates the deficiency of wavelength modulation spectroscopy (WMS) on high concentration circumstances. And the passive scheme pushes the system requirement to the lowest level.

Peng, Zhaoqiang↗
NASA NTRS1986

Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device

The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop. Although the loop is entirely digital from an implementation standpoint, it operates at two extremely different sampling rates. In particular, the combination of a phase detector and an integrate-and-dump circuit operates at a very high rate whereas the loop update rate is very slow by comparison. Because of this dichotomy, the loop can be analyzed by hybrid analog/digital (s/z domain) techniques. The loop is modeled in such a general fashion that previous analyses of the Real-Time Combiner (RTC), Subcarrier Demodulator Assembly (SDA), and Symbol Synchronization Assembly (SSA) fall out as special cases.

Simon, M.↗
NASA NTRS1975

Symbol synchronizer assembly instability study, part 2

Data processing to develop a third-order phase model and to translate all such processed data to the frequency realm for further analysis was described. The frequency study yields a long frequency modulation (FM) drift sinusoid (1600-sec period), an impressed secondary drift wave with a period of about 116 sec, and a set of even harmonics of twice the ramp period-the latter arising from, and used to modify, the phase detector model. The result is applied secondarily to estimate the strong-signal SSA phase detector response "out-of-lock." Finally, the main drift components are verified against all available data, and the result is used to estimate minimum lock conditions and the SSA drift effect under normal operating modes. The instability problem appears marginally resolvable if the acquisition technique is modified.

Bunce, R. C.↗
DOE OSTI2019

FELIX-Based Readout of the Single-Phase ProtoDUNE Detector

Large liquid argon (LAr) time projection chambers (TPCs) have been adopted for the Deep Underground Neutrino Experiment (DUNE) experiment's far detector, which will be composed of four 17-kton detectors situated 1.5 km underground at the Sanford Underground Research Facility. This represents a large increase in scale compared to existing experiments. Both single- and dual-phase technologies will be validated at CERN, in cryostats capable of accommodating full-size detector modules, and exposed to low-energy charged particle beams. This program, called ProtoDUNE, also allows for extensive tests of data acquisition strategies. The Front-End LInk eXchange (FELIX) readout system was initially developed within the ATLAS collaboration and is based on custom field-programmable gate array (FPGA)-based Peripheral Component Interconnect Express input/output cards, connected through point-to-point links to the detector front end and hosted in commodity servers. FELIX will be used in the single-phase ProtoDUNE setup to read the data coming from 2560 anode wires organized in a single anode plane assembly (APS) structure. With a continuous readout at a sampling rate of 2 MHz, the system must deal with an input rate of 96 Gb/s. An external trigger will preselect time windows of 5 ms with interesting activity expected inside the detector. Event building will occur for triggered events, at a target rate of 25 Hz; the readout system will form fragments from the data samples matching the time window, carry out lossless compression, and forward the data to event building nodes over 10-Gb/s Ethernet. This paper discusses the design and implementation of this readout system as well as the first operational experience.

47 OTHER INSTRUMENTATION↗
NASA NTRS1984

Three-phase power factor controller with induced EMF sensing

A power factor controller for an ac induction motor is provided which is of the type comprising thyristor switches connected in series with the motor, phase detectors for sensing the motor current and voltage and providing an output proportional to the phase difference between the motor voltage and current, and a control circuit, responsive to the output of the phase detector and to a power factor command signal, for controlling switching of the thyristor. The invention involves sensing the induced emf produced by the motor during the time interval when the thyristor is off and for producing a corresponding feedback signal for controlling switching of the thyristor. The sensed emf is also used to enhance soft starting of the motor.

Nola, F. J.↗
NASA NTRS2011

Remote Sensing and Quantization of Analog Sensors

This method enables sensing and quantization of analog strain gauges. By manufacturing a piezoelectric sensor stack in parallel (physical) with a piezoelectric actuator stack, the capacitance of the sensor stack varies in exact proportion to the exertion applied by the actuator stack. This, in turn, varies the output frequency of the local sensor oscillator. The output, F(sub out), is fed to a phase detector, which is driven by a stable reference, F(sub ref). The output of the phase detector is a square waveform, D(sub out), whose duty cycle, t(sub W), varies in exact proportion according to whether F(sub out) is higher or lower than F(sub ref). In this design, should F(sub out) be precisely equal to F(sub ref), then the waveform has an exact 50/50 duty cycle. The waveform, D(sub out), is of generally very low frequency suitable for safe transmission over long distances without corruption. The active portion of the waveform, t(sub W), gates a remotely located counter, which is driven by a stable oscillator (source) of such frequency as to give sufficient digitization of t(sub W) to the resolution required by the application. The advantage to this scheme is that it negates the most-common, present method of sending either very low level signals (viz. direct output from the sensors) across great distances (anything over one-half meter) or the need to transmit widely varying higher frequencies over significant distances thereby eliminating interference [both in terms of beat frequency generation and in-situ EMI (electromagnetic interference)] caused by ineffective shielding. It also results in a significant reduction in shielding mass.

Strauss, Karl F.↗
DOE OSTI2023

Delay-locked-loop timing error mitigation

Systems, methods, and circuits provide delay-locked loop (DLL) timing error mitigation. A DLL false-lock detection system can include DLL circuitry configured to receive a reference clock signal having a time period. The system can include shift register circuitry and latched comparison circuitry which can determine a time period of a locked condition of the DLL delay line with respect to the reference clock signal time period. The system can determine whether the system is correctly locked to the base time period or incorrectly locked to a multiple of the base time period. A further system can operate to cause a phase detector circuitry in a DLL to ignore the first edge of a reference clock signal presented to the phase detector circuitry and thereby avoid stuck-lock conditions.

Filippini, Leo↗
NASA NTRS1977

Tracking a phase-shift-keyed signal

In detector, phase shifter is used to generate negative phase shift opposing detected phase angle. This produces converted series sideband and component carrier, with residual carrier signal and converted series sideband and component carrier added together to produce tracking signal.

Villarreal, S.↗
NASA NTRS1985

Maser cavity servo-tuning system

Two collocated, weakly coupled probes, one loop and one dipole, detect the magnetic and electric fields inside a maser cavity. Signals from the probes are compared in phase, and the signal output from the phase detector is applied to a varactor, the reactance of which is coupled into the cavity by a microwave coupler. Alternatively, the varactor may be placed inside the cavity. Any deviation of phase from 90 deg as detected by the phase detector will then produce an error signal that will change the reactance coupled into the resonant cavity to change its reactance, and thus correct its resonance frequency. An alternative to using two probes is to use a single disk probe oriented to detect both the magnetic and electric fields, and thus provide the error signal directly.

Sydnor, R. L.↗
NASA NTRS1987

Fixed lag smoothers for carrier phase and frequency tracking

The application of fixed lag smoothing algorithms are presented for the problem of estimation of the phase and frequency of a sinusoidal carrier received in the presence of process noise and additive observation noise. A suboptimal structure consists of a phase-locked loop (PLL) followed by a post loop correction to the phase and frequency estimates. When the PLL is operating under a high signal-to-noise ratio, the phase detector is approximately linear, and the smoother equations then correspond to the optimal linear equations for an equivalent linear signal model. The performance of such a smoother can be predicted by the linear filtering theory. However, if the PLL is operating near the threshold region of the signal to noise ratio, the phase detector cannot be assumed to be linear. Then the actual performance of the smoother can significantly differ from that predicted by linear filtering theory. Both the theoretical and simulated performance of such smoothers derived on the basis of various models for the phase of frequency processes are presented.

Kumar, R.↗
NASA NTRS1987

Optimum filters and smoothers design for carrier phase and frequency tracking

The report presents the application of fixed lag smoothing algorithms to the problem of estimation of the phase and frequency of a sinusoidal carrier received in the presence of process noise and additive observation noise. A suboptimal structure consists of a phase-locked loop (PLL) followed by post-loop correction to the phase and frequency estimates. When the PLL is operating under high signal-to-noise ratio, the phase detector is approximately linear, and the smoother equations then correspond to the optimal linear equations for an equivalent linear signal model. The performance of such a smoother can be predicted by linear filtering theory. However, if the PLL is operating near the threshold region of the signal-to-noise ratio, the phase detector cannot be assumed to be linear. Then the actual performance of the smoother can significantly differ from that predicted by linear theory. In this report we present both the theoretical and simulated performance of such smoothers derived on the basis of various models for the phase and frequency processes.

Kumar, Rajendra↗
DOE OSTI2019

Simulation Studies Of Photon Signal Reconstruction In The DUNE Single Phase Far Detector With Xe Doping

Xenon when doped to argon has the potential to increase the effectiveness of scintillation systems in liquid argon time projection chambers (LArTPC). To test the potential improvements, a simulation study was conducted. A simulation of light going through liquid Argon and Xenon photon libraries (photon libraries are used to reduce the amount of computational power needed for interactions that produce a large amount of photons), comparing differences in their properties. The study found more light being emitted in a shorter time by Xe than by Ar with less attenuation present. Preliminary results show lower efficiency of Ar at closer distances. It's unclear whether this is due to inherit properties of the Xe or a result of selection cuts not being optimized. These potential improvements are being looked into for future neutrino experiments such as the Deep Underground Neutrino Experiment (DUNE).

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
NASA NTRS1974

Low distortion automatic phase control circuit

A voltage controlled phase shifter is rendered substantially harmonic distortion free over a large dynamic input range by employing two oppositely poled, equally biased varactor diodes as the voltage controlled elements which adjust the phase shift. Control voltages which affect the bias of both diodes equally are used to adjust the phase shift without increasing distortion. A feedback stabilized phase shifter is rendered substantially frequency independent by employing a phase detector to control the phase shift of the voltage controlled phase shifter.

Hauge, G.↗
NASA NTRS1981

Fiber optic transmission line stabilization apparatus and method

A reference signal of RF frequency modulates a 0.85 micrometer wavelength optical transmitter. The output of which passes through a first optical filter and a voltage-controller phase shifter. The output of the phase shifter is provided to the fiber optic transmission line. At the receiving end of the transmission line, the signal is demodulated and used to modulate a 1.06 micrometer optical transmitter. The signal from the transmitter is provided to the fiber optic transmission line and passes through the voltage-controlled phase shifter to a phase error detector. The phase of the modulation of the 1.06 micrometer wavelength signal is compared to the phase of the reference signal by the phase error detector. A phase control signal related to the phase difference is provided to the voltage controlled phase shifter which alters the phase of both optical signals until a predetermined phase relationship between modulation on the 1.06 micrometer signal and the reference signal is obtained.

Lutes, G. F., Jr.↗
NASA NTRS1988

Development of a coded 16-ary CPFSK coherent demodulator

Theory and hardware are described for a proof-of-concept 16-ary continuous phase frequency shift keying (16-CPFSK) digital modem. The 16 frequencies are spaced every 1/16th baud rate for 2 bits/sec/Hz operation. Overall rate 3/4 convolutional coding is incorporated. The demodulator differs significantly from typical quadrature phase detector approaches in that phase is coherently measured by processing the baseband output of a frequency discriminator. Baud rate phase samples from the baseband processor are decoded to yield the original data stream. The method of encoding onto the 16-ary phase nodes, together with convolutional coding gain, results in near quad PSK (QPSK) performance. The modulated signal is of constant envelope; thus the power amplifier can be saturated for peak performance. The spectrum is inherently bandlimited and requires no RF filter.

Clarke, Ken↗
NASA NTRS1992

Coded 16-CPFSK for downlink applications

A bandwidth-efficient constant-envelope Proof-of-Concept (POC) modem is described. The modem was developed on an Advanced Modulation Techniques Development contract for the NASA/Lewis Research Center. The POC modem employs 16-ary Continuous Phase Frequency Shift Keying (16-CPFSK) modulation. The 16 frequencies are spaced every 1/16th baud rate which produces a compact spectrum allowing 2 bits/sec/Hz operation. The modem is designed for 200 mb/s Time Division Multiple Access (TDMA) application with 100 MHz adjacent channel spacing. Overall rate 3.4 convolutional coding is incorporated. The demodulator differs significantly from typical quadrature phase detector approaches in that phase is coherently measured by processing the baseband output of a frequency discriminator. Baud rate phase samples for the baseband processor are subsequently decoded to yield the original data stream. The method of encoding onto the 16-ary symbol-ending phase nodes, together with convolutional coding gain, results in near Quadrature Phase Shift Keying (QPSK) theoretical performance. The modulated signal is of constant envelope; thus the power amplifier can be saturated for peak performance. The spectrum is inherently bandlimited and requires no RF filter for sidelobe containment. Two novel theoretical techniques are used in this 16-CPFSK modem: (1) coherent phase measurements are obtained by processing an FM discriminator baseband output; and (2) modulation is accomplished via a closed-loop-linearized voltage controlled oscillator (VCO).

Davis, Robert↗
NASA NTRS1994

A study of a multi-pinned phase CCD detector for use as a star tracker

This grant has supported studies of the use of charge coupled devices (CCD's) in star trackers in a number of different areas. Among the tasks we have pursued are the following: (1) radiation modeling and the increase in noise equivalent angle as a result of exposure to protons and bremsstrahlung gamma rays; (2) the development of pattern matching software to identify field locations from a CCD image and a pre-existing map of the local area; (3) observations of various stellar fields from the 24 inch telescope at the Offit Observatory at JHU, primarily to test the pattern matching software (these included crowded fields as well as moving objects, like comets); and (4) tracking of very faint objects to determine the faint limit of the CCD system.

Friedman, Scott D.↗