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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1998

Self-Calibrating and Remote Programmable Signal Conditioning Amplifier System and Method

A self-calibrating, remote programmable signal conditioning amplifier system employs information read from a memory attached to a measurement transducer for automatic calibration. The signal conditioning amplifier is self-calibrated on a continuous basis through use of a dual input path arrangement, with each path containing a multiplexer and a programmable amplifier. A digital signal processor controls operation of the system such that a transducer signal is applied to one of the input paths, while one or more calibration signals are applied to the second input path. Once the second path is calibrated, the digital signal processor switches the transducer signal to the second path. and then calibrates the first path. This process is continually repeated so that each path is calibrated on an essentially continuous basis. Dual output paths are also employed which are calibrated in the same manner. The digital signal processor also allows the implementation of a variety of digital filters which are either programmed into the system or downloaded by an operator, and performs up to eighth order linearization.

Medelius, Pedro J.↗
NASA NTRS1998

Programmable Logic Application Notes

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter's column will include some announcements and some recent radiation test results and evaluations of interest. Specifically, the following topics will be covered: the Military and Aerospace Applications of Programmable Devices and Technologies Conference to be held at GSFC in September, 1998, proton test results, heavy ion test results, and some total dose results.

Katz, Richard↗
NASA NTRS1998

Programmable Logic Application Notes

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter's column will include some announcements and some recent radiation test results and evaluations of interest. Specifically, the following topics will be covered: the Military and Aerospace Applications of Programmable Devices and Technologies Conference to be held at GSFC in September, 1998, proton test results, and some total dose results.

Katz, Richard↗
NASA NTRS2001

Adaptive Instrument Module: Space Instrument Controller "Brain" through Programmable Logic Devices

The Adaptive Instrument Module (AIM) will be the first true demonstration of reconfigurable computing with field-programmable gate arrays (FPGAs) in space, enabling the 'brain' of the system to evolve or adapt to changing requirements. In partnership with NASA Goddard Space Flight Center and the Australian Cooperative Research Centre for Satellite Systems (CRC-SS), APL has built the flight version to be flown on the Australian university-class satellite FEDSAT. The AIM provides satellites the flexibility to adapt to changing mission requirements by reconfiguring standardized processing hardware rather than incurring the large costs associated with new builds. This ability to reconfigure the processing in response to changing mission needs leads to true evolveable computing, wherein the instrument 'brain' can learn from new science data in order to perform state-of-the-art data processing. The development of the AIM is significant in its enormous potential to reduce total life-cycle costs for future space exploration missions. The advent of RAM-based FPGAs whose configuration can be changed at any time has enabled the development of the AIM for processing tasks that could not be performed in software. The use of the AIM enables reconfiguration of the FPGA circuitry while the spacecraft is in flight, with many accompanying advantages. The AIM demonstrates the practicalities of using reconfigurable computing hardware devices by conducting a series of designed experiments. These include the demonstration of implementing data compression, data filtering, and communication message processing and inter-experiment data computation. The second generation is the Adaptive Processing Template (ADAPT) which is further described in this paper. The next step forward is to make the hardware itself adaptable and the ADAPT pursues this challenge by developing a reconfigurable module that will be capable of functioning efficiently in various applications. ADAPT will take advantage of radiation tolerant RAM-based field programmable gate array (FPGA) technology to develop a reconfigurable processor that combines the flexibility of a general purpose processor running software with the performance of application specific processing hardware for a variety of high performance computing applications.

Darrin, Ann Garrison↗
NASA NTRS1980

Programmable Pacemaker

St. Jude Medical's Cardiac Rhythm Management Division, formerly known as Pacesetter Systems, Inc., incorporated Apollo technology into the development of the programmable pacemaker system. This consists of the implantable pacemaker together with a physician's console containing the programmer and a data printer. Physician can communicate with patient's pacemaker by means of wireless telemetry signals transmitted through the communicating head held over the patient's chest. Where earlier pacemakers deliver a fixed type of stimulus once implanted, Programalith enables surgery free "fine tuning" of device to best suit the patient's changing needs.

Source record↗
NASA NTRS2004

Paramedir: A Tool for Programmable Performance Analysis

Performance analysis of parallel scientific applications is time consuming and requires great expertise in areas such as programming paradigms, system software, and computer hardware architectures. In this paper we describe a tool that facilitates the programmability of performance metric calculations thereby allowing the automation of the analysis and reducing the application development time. We demonstrate how the system can be used to capture knowledge and intuition acquired by advanced parallel programmers in order to be transferred to novice users.

Jost, Gabriele↗
NASA NTRS2000

Programmable Logic Application Notes

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.

Katz, Richard↗
NASA NTRS2009

Electrically Variable or Programmable Nonvolatile Capacitors

Electrically variable or programmable capacitors based on the unique properties of thin perovskite films are undergoing development. These capacitors show promise of overcoming two important deficiencies of prior electrically programmable capacitors: Unlike in the case of varactors, it is not necessary to supply power continuously to make these capacitors retain their capacitance values. Hence, these capacitors may prove useful as components of nonvolatile analog and digital electronic memories. Unlike in the case of ferroelectric capacitors, it is possible to measure the capacitance values of these capacitors without changing the values. In other words, whereas readout of ferroelectric capacitors is destructive, readout of these capacitors can be nondestructive. A capacitor of this type is a simple two terminal device. It includes a thin film of a suitable perovskite as the dielectric layer, sandwiched between two metal or metal oxide electrodes (for example, see Figure 1). The utility of this device as a variable capacitor is based on a phenomenon, known as electrical-pulse-induced capacitance (EPIC), that is observed in thin perovskite films and especially in those thin perovskite films that exhibit the colossal magnetoresistive (CMR) effect. In EPIC, the application of one or more electrical pulses that exceed a threshold magnitude (typically somewhat less than 1 V) gives rise to a nonvolatile change in capacitance. The change in capacitance depends on the magnitude duration, polarity, and number of pulses. It is not necessary to apply a magnetic field or to cool the device below (or heat it above) room temperature to obtain EPIC. Examples of suitable CMR perovskites include Pr(1-x)Ca(x)MnO3, La(1-x)S-r(x)MnO3,and Nb(1-x)Ca(x)MnO3. Figure 2 is a block diagram showing an EPIC capacitor connected to a circuit that can vary the capacitance, measure the capacitance, and/or measure the resistance of the capacitor.

Shangqing, Liu↗
NASA NTRS2007

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis↗
NASA NTRS2011

Programmable Oscillator

A programmable oscillator is a frequency synthesizer with an output phase that tracks an arbitrary function. An offset, phase-locked loop circuit is used in combination with an error control feedback loop to precisely control the output phase of the oscillator. To down-convert the received signal, several stages of mixing may be employed with the compensation for the time-base distortion of the carrier occurring at any one of those stages. In the Goldstone Solar System Radar (GSSR), the compensation occurs in the mixing from an intermediate frequency (IF), whose value is dependent on the station and band, to a common IF used in the final stage of down-conversion to baseband. The programmable oscillator (PO) is used in the final stage of down-conversion to generate the IF, along with a time-varying phase component that matches the time-base distortion of the carrier, thus removing it from the final down-converted signal.

Quirk, Kevin J.↗
NASA NTRS2015

Programmable Ultra-Lightweight System Adaptable Radio

The programmable ultra-lightweight system adaptable radio (PULSAR) is a NASA Marshall Space Flight Center transceiver designed for the CubeSat market, but has the potential for other markets. The PULSAR project aims to reduce size, weight, and power while increasing telemetry data rate. The current version of the PULSAR has a mass of 2.2 kg and a footprint of 10.8 cm2. The height depends on the specific configuration. The PULSAR S-Band Communications Subsystem is an S- and X-band transponder system comprised of a receiver/detector (receiver) element, a transmitter element(s), and related power distribution, command, control, and telemetry element for operation and information interfaces. It is capable of receiving commands, encoding and transmitting telemetry, as well as providing tracking data in a manner compatible with Earthbased ground stations, near Earth network, and deep space network station resources. The software-defined radio's (SDR's) data format characteristics can be defined and reconfigured during spaceflight or prior to launch. The PULSAR team continues to evolve the SDR to improve the performance and form factor to meet the requirements that the CubeSat market space requires. One of the unique features is that the actual radio design can change (somewhat), but not require any hardware modifications due to the use of field programmable gate arrays.

Werkheiser, Arthur↗
NASA NTRS2016

The XXL Survey I. Scientific Motivations - Xmm-Newton Observing Plan - Follow-up Observations and Simulation Programme

The quest for the cosmological parameters that describe our universe continues to motivate the scientific community to undertake very large survey initiatives across the electromagnetic spectrum. Over the past two decades, the Chandra and XMM-Newton observatories have supported numerous studies of X-ray-selected clusters of galaxies, active galactic nuclei (AGNs), and the X-ray background. The present paper is the first in a series reporting results of the XXL-XMM survey; it comes at a time when the Planck mission results are being finalized. Aims. We present the XXL Survey, the largest XMM programme totaling some 6.9 Ms to date and involving an international consortium of roughly 100 members. The XXL Survey covers two extragalactic areas of 25 deg2 each at a point-source sensitivity of approx. 5 x 10(exp 15) erg/s/sq cm in the [0.5-2] keV band (completeness limit). The surveys main goals are to provide constraints on the dark energy equation of state from the space-time-distribution of clusters of galaxies and to serve as a pathfinder for future, wide-area X-ray missions. We review science objectives, including cluster studies, AGN evolution, and large-scale structure, that are being conducted with the support of approximately 30 follow-up programs. Methods. We describe the 542 XMM observations along with the associated multi- and numerical simulation programmes. We give a detailed account of the X-ray processing steps and describe innovative tools being developed for the cosmological analysis. Results. The paper provides a thorough evaluation of the X-ray data, including quality controls, photon statistics, exposure and background maps, and sky coverage. Source catalogue construction and multi-associations are briefly described. This material will be the basis for the calculation of the cluster and AGN selection functions, critical elements of the cosmological and science analyses. Conclusions. The XXL multi- data set will have a unique lasting legacy value for cosmological and extragalactic studies and will serve asa calibration resource for future dark energy studies with clusters and other X-ray selected sources. With the present article, we release the XMM XXL photon and smoothed images along with the corresponding exposure maps.

X-rays: general – large-scale structure of Unive↗
NASA NTRS1966

Programmable solar array simulator.

Operational and circuit features of laboratory device built to simulate dynamic electrical output characteristics of programmable solar array in orbital flight

ANALOG COMPUTER↗
NASA NTRS2002

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗
NASA NTRS2005

Qualification Strategies of Field Programmable Gate Arrays (FPGAs) for Space Application

This viewgraph document reviews the issue of using Field Programmable Gate Arrays (FPGAs) in Space Application, and the some of the strategies for qualifying the FPGA. Qualification and risk management of such complex systems requires new approaches. The paper presents a matrix approach to qualification has been presented that: - Complements historical specifications - Highlights the importance of device physics as a cornerstone to qualification. - Provides levels of risk management that expressly document trade offs. - Stresses the role of the FPGA vendor as team member in the development of modern spacecraft.

Mil Standard 883↗