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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Compact Ferroelectric Programmable Majority Gate for Compute-in-Memory Applications

In this study, a compact and novel ferroelectric (FE) programmable majority gate is proposed and its novel application in Binary Neural Network (BNNs) is investigated. We demonstrate: i) by integrating N metal-ferroelectric-metal (MFM) capacitors on the gate of a transistor (1T-N-MFM structure), a nonvolatile and programmable majority (MAJ) gate that performs MAJ of AND between the gate input and polarization is realized; ii) validation the functionality of our 3-input MAJ of AND gate through comprehensive theoretical and experimental investigations; iii) a compact implementation of 3-input MAJ of XNOR gate that leverages only five of our 3-input MAJ of AND gates connected in parallel; iv) application of MAJ of XNOR gates to replace the XNOR gates and the first layer of the adder tree in the BNNs for up to 21x area saving on top of eliminating the energy-hungry memory accesses due to the compute-in-memory nature.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Online Convex Optimization of Programmable Quantum Computers to Simulate Time-Varying Quantum Channels

Simulating quantum channels is a fundamental primitive in quantum computing, since quantum channels define general (trace-preserving) quantum operations. An arbitrary quantum channel cannot be exactly simulated using a finite-dimensional programmable quantum processor, making it important to develop optimal approximate simulation techniques. In this paper, we study the challenging setting in which the channel to be simulated varies adversarially with time. We propose the use of matrix exponentiated gradient descent (MEGD), an online convex optimization method, and analytically show that it achieves a sublinear regret in time. Through experiments, we validate the main results for time-varying dephasing channels using a programmable generalized teleportation processor.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

Tweezer-programmable 2D quantum walks in a Hubbard-regime lattice

Quantum walks provide a framework for designing quantum algorithms that is both intuitive and universal. To leverage the computational power of these walks, it is important to be able to programmably modify the graph a walker traverses while maintaining coherence. We do this by combining the fast, programmable control provided by optical tweezers with the scalable, homogeneous environment of an optical lattice. With these tools we study continuous-time quantum walks of single atoms on a square lattice and perform proof-of-principle demonstrations of spatial search with these walks. When scaled to more particles, the capabilities demonstrated can be extended to study a variety of problems in quantum information science, including performing more effective versions of spatial search using a larger graph with increased connectivity.

Science & Technology - Other Topics↗
DOE OSTI2018

UPC++ Programmer’s Guide, v1.0-2018.3.0

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2018

Tank Farm Safety Programmable System Software Management Plan

This Software Management Plan (SMP) applies to the configurable programmable logic controller (PLC) software configured as the Tank Farms Safety Programmable System (TFSPS). The TFSPS is identified as a safety-significant (SS) system to prevent loss of the safety function of SS structures, systems, and components (SSC). The TFSPS software is classified as grade level A configurable safety software. The TFSPS consists of safety instrumented systems (SIS) and safety instrumented alarm (SIA) systems.The purpose of this management plan is to describe how Washington River Protection Solutions (WRPS) will configure and manage the TFSPS software and the associated software life cycle (SLC). TFSPS software shall be configured by Process and Control Systems Engineering (P&CSE) as grade level A safety software for use by Production Operations as the primary stakeholders.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

UPC++ Programmer’s Guide (v1.0-2019.3.0)

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

UPC++ v1.0 Programmer’s Guide (Revision 2019.9.0)

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

UPC++ v1.0 Programmer’s Guide, Revision 2020.10.0

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

UPC++ v1.0 Programmer’s Guide, Revision 2021.9.0

UPC++ is a C++ library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. PGAS additionally provides one-sided Remote Memory Access (RMA) to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. In UPC++, all communication operations are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all communication operations are asynchronous by default, to enable programmers to write code that scales well even on hundreds of thousands of cores.

96 KNOWLEDGE MANAGEMENT AND PRESERVATION↗
DOE OSTI2024

Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors

Dynamically field-programmable qubit arrays (DPQA) have recently emerged as a promising platform for quantum information processing. In DPQA, atomic qubits are selectively loaded into arrays of optical traps that can be reconfigured during the computation itself. Leveraging qubit transport and parallel, entangling quantum operations, different pairs of qubits, even those initially far away, can be entangled at different stages of the quantum program execution. Such reconfigurability and non-local connectivity present new challenges for compilation, especially in the layout synthesis step which places and routes the qubits and schedules the gates. In this paper, we consider a DPQA architecture that contains multiple arrays and supports 2D array movements, representing cutting-edge experimental platforms. Within this architecture, we discretize the state space and formulate layout synthesis as a satisfiability modulo theories problem, which can be solved by existing solvers optimally in terms of circuit depth. For a set of benchmark circuits generated by random graphs with complex connectivities, our compiler OLSQ-DPQA reduces the number of two-qubit entangling gates on small problem instances by 1.7x compared to optimal compilation results on a fixed planar architecture. To further improve scalability and practicality of the method, we introduce a greedy heuristic inspired by the iterative peeling approach in classical integrated circuit routing. Using a hybrid approach that combined the greedy and optimal methods, we demonstrate that our DPQA-based compiled circuits feature reduced scaling overhead compared to a grid fixed architecture, resulting in 5.1X less two-qubit gates for 90 qubit quantum circuits. These methods enable programmable, complex quantum circuits with neutral atom quantum computers, as well as informing both future compilers and future hardware choices.

Physics↗
DOE OSTI2018

UPC++ Programmer’s Guide, v1.0-2018.9.0

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

UPC++ v1.0 Programmer’s Guide, Revision 2020.3.0

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

High Field Magnet Programme -- European Strategy Input

In this submission, we describe research goals, implementation, and timelines of the High Field Magnet Programme, hosted by CERN. The programme pursues accelerator-magnet R&D with low-temperature- and high-temperature superconductor technology with a main focus on the FCC-hh. Following a long tradition of magnet R&D for high-energy particle colliders, HFM R&D fosters important societal impact through synergies with other fields.

43 PARTICLE ACCELERATORS↗
DOE OSTI2024

Field Programmable Gate Array Data Capture for Control Systems

Some Industrial Control Systems (ICS) networks are based on protocols such as Serial and Industrial Ethernet. These protocols currently have no existing cybersecurity monitoring tools, leaving a large gap in the cyber defense of critical infrastructure. In order to analyze such ICS traffic, it is first necessary to implement methods of capturing the ICS data. Whereas traditional methods of analyzing data would use microprocessors, the nature of high-speed analog data can be difficult to implement on such a versatile processor, as they are rather inefficient for doing a single task. Whereas Field Programmable Gate Arrays (FPGAs) provide an adequate tool in analyzing high speed data, as despite the lack of program versatility, Programmable Logic can implement a solution with minimal clock cycles, allowing time for each new packet of data to be captured before a new data sample is taken.

42 ENGINEERING↗
DOE OSTI2025

Embedded 3D printing of isotropically enhanced lattice structure with programmable elasticity via three-dimensional fiber alignment

Engineered composites with fiber orientation in a complete three-dimensional (3D) context are highly desired for maximizing structural performance as they mimic the well-organized fiber arrangement in natural composites. However, most fabrication techniques lack the capability for through-plane (z-axis) alignment, limiting the possibility for structural design and performance optimization. In this study, we present an embedded 3D printing approach that enables complete 3D fiber alignment, including region-specific alignment control along the through-plane direction. Our method utilizes the extrusion and suspension of composite inks within a supporting matrix. By regionally adjusting the ink extrusion rate and nozzle translation rate, we locally manipulated the fiber arrangement within the composite 3D architecture. Here, we demonstrate that the 3D alignment of carbon fibers in a structural composite significantly enhances both mechanical properties and thermal conductivity in the in-plane and through-plane directions. Furthermore, by strategically arranging regional fiber orientations within micro-architected materials, we fabricated metamaterial engineered composites with programmable anisotropy ratio and directional moduli.

36 MATERIALS SCIENCE↗
DOE OSTI2019

Detecting control system misbehavior by fingerprinting programmable logic controller functionality

In recent years, attacks such as the Stuxnet malware have demonstrated that cyberattacks against control systems cause extensive damage. These attacks can result in physical damage to the networked systems under their control. In this paper, we discuss our approach for detecting such attacks by distinguishing between programs running on a programmable logic controller (PLC) without having to monitor communications. Using power signatures generated by an attached, high-frequency power measurement device, we can identify what a PLC is doing and when an attack may have altered what the PLC should be doing. To accomplish this, we generated labeled data for testing our methods and applied feature engineering techniques and machine learning models. The results of this research demonstrate that Random Forests and Convolutional Neural Networks classify programs with up to 98% accuracy for major program differences and 84% accuracy for minor differences. Our results can be used for both online and offline applications.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Catalytic resonance theory: Circumfluence of programmable catalytic loops

Chemical reactions on heterogeneous catalyst surfaces exhibit complex networks of elementary reactions with multiple pathways to fluid phase products, sometimes leading to surface reaction loops consisting of a closed cycle reaction pathway. While conventional catalysts at steady state exhibit zero net flux in either direction around a catalytic loop, the loop turnover frequency of three-species surface loops was evaluated in this work via microkinetic modeling to assess the reaction loop behavior resulting from a catalytic surface oscillating between two or more surface energy states. For dynamic heterogeneous catalysts undergoing applied oscillations of surface energy (i.e., programs), surface reaction loops of three species were shown to exhibit non-zero net flow of molecules around the loop, with the extent of loop turnover frequency varying with the applied frequency and amplitude of a sinusoidal or square wave oscillation. Alternatively, some dynamic surface reactions exhibited oscillations only between two surface species or resulted in surfaces covered by a single species at all times. Here, more complex behavior was observed for dynamic surface programs of three distinct electronic states, with the temporal order of applied states controlling the direction of flow of molecules within a three-molecule surface loop. Catalytic loops have the potential to limit overall catalytic reaction rates and use energy in programmable catalysts, while some applications could purposely impose non-zero loop turnover frequency for improved surface reaction control.

Catalysis↗
DOE OSTI2023

Writing the Programs of Programmable Catalysis

It has long been known that non-steady state and periodic catalytic reactor operation in terms of temperature, pressure, and composition can lead to higher overall productivity and/or product selectivity than the best steady operation. Recently, the emergence of catalysts whose intrinsic properties can be made to oscillate with time, introduces advanced forcing capabilities that can be “programmed” into the catalysts to broaden the scope and applicability of periodic operation to surface chemistry. In this work, an algorithmic approach is implemented to significantly accelerate the discovery and optimization of periodic steady states of catalytic reactors. Decomposition of complex dynamics into fundamental mechanistic fast–slow steps is seen to improve conceptual understanding of the relationship between binding energy oscillation protocols and overall catalytic rates. Finding structured forcing protocols, optimally tailored to the multiple time scales of a given individual mechanism, requires an efficient search of high-dimensional parameter spaces. Here, this is enabled here through active learning (Bayesian optimization, enhanced by our proposed Bayesian continuation). Implementation of these methods is shown to accelerate the evaluation of catalyst programs by up to several orders of magnitude. Faster screening of programmable catalysts to discover periodic steady states enables the optimization of catalytic operating protocols and thus opens the possibility for catalyst engineering based on optimal forcing programs to control rate and product selectivity, even for complex multistep catalytic mechanisms.

catalysis↗