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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1972

Trends in solid state electronics, part 2

Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

Gassaway, J. D.↗
NASA NTRS1998

Advanced thermoelectric materials with enhanced crystal lattice structure and methods of preparation

New skutterudite phases including Ru.sub.0.5 Pd.sub.0.5 Sb.sub.3, RuSb.sub.2 Te, and FeSb.sub.2 Te, have been prepared having desirable thermoelectric properties. In addition, a novel thermoelectric device has been prepared using skutterudite phase Fe.sub.0.5 Ni.sub.0.5 Sb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using powder metallurgy techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities and good Seebeck coefficients. These materials have low thermal conductivity and relatively low electrical resistivity, and are good candidates for low temperature thermoelectric applications.

Fleurial, Jean-Pierre↗
NASA NTRS1998

Semiconductor apparatus utilizing gradient freeze and liquid-solid techniques

Transition metals of Group VIII (Co, Rh and Ir) have been prepared as semiconductor compounds with the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freezing techniques and/or liquid phase sintering techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 1200 cm.sup.2.V.sup.-1.s.sup.-1) and good Seebeck coefficients (up to 150 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a substantial increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Fleurial, Jean-Pierre↗
NASA NTRS1997

High performance thermoelectric materials and methods of preparation

Transition metals (T) of Group VIII (Co, Rh and Ir) have been prepared as semiconductor alloys with Sb having the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor alloys and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor alloys having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freeze techniques, liquid-solid phase sintering techniques, low temperature powder sintering and/or hot-pressing. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 8000 cm.sup.2.V.sup.-1.s.sup.-1), good Seebeck coefficients (up to 400 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.), and low thermal conductivities (as low as 15 mW/cmK). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a two fold increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Fleurial, Jean-Pierre↗
NASA NTRS2009

Alternative Packaging for Back-Illuminated Imagers

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

Pain, Bedabrata↗
NASA NTRS1975

Development of a monolithic GaAs integrated optical transmitter

The paper discusses a program designed for the development of a GaAs IOC transmitter consisting of a monolithic surface laser whose output is coupled into patterned channel waveguides. Modulation and switching of the radiation occur in the waveguide circuit and are controlled separately. These structures are to be fabricated monolithically on a single semiconductor chip with each device amenable to integrated low-cost manufacture. The waveguide outputs of the IOC transmitter will be coupled to single mode optical fibers which form a transmission cable. The properties of the semiconductors (Ga,Al)As and (Ga,In)As permit performance of each of the basic functions included in the device considered. The concept of monolithic nondiscrete GaAs diode lasers is examined along with optical stripline channel waveguides and electro-optic channel waveguide modulators and switches.

Blum, F. A.↗
NASA NTRS1985

Upgrading Metallurgical-Grade Silicon

Closed-loop process produces semiconductor-grade silicon. Metallurgical-grade silicon converted to ultrapure silicon by reacting with hydrogen and silicon tetrahalide to form trihalosilane, purifying this intermediate and again decomposing to high purity silicon in third stage. Heterogeneously and homogeneously nucleated polycrystalline silicon used in semiconductor device applications and in silicon photovoltaic solar cell fabrication.

Woerner, L. M.↗
NASA NTRS2000

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Burns, Michael J.↗
NASA NTRS2000

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Burns, Michael J.↗
NASA NTRS2012

Fabrication of Superconducting Detectors for Studying the Universe

Superconducting detectors offer unparalleled means of making astronomical/cosmological observations. Fabrication of these detectors is somewhat unconventional; however, a lot of novel condensed matter physics/materials scientific discoveries and semiconductor fabrication processes can be generated in making these devices.

Brown, Ari-David↗
NASA NTRS1993

Radiation hardened microprocessor for small payloads

The RH-3000 program is developing a rad-hard space qualified 32-bit MIPS R-3000 RISC processor under the Naval Research Lab sponsorship. In addition, under IR&D Harris is developing RHC-3000 for embedded control applications where low cost and radiation tolerance are primary concerns. The development program leverages heavily from commercial development of the MIPS R-3000. The commercial R-3000 has a large installed user base and several foundry partners are currently producing a wide variety of R-3000 derivative products. One of the MIPS derivative products, the LR33000 from LSI Logic, was used as the basis for the design of the RH-3000 chipset. The RH-3000 chipset consists of three core chips and two support chips. The core chips include the CPU, which is the R-3000 integer unit and the FPA/MD chip pair, which performs the R-3010 floating point functions. The two support whips contain all the support functions required for fault tolerance support, real-time support, memory management, timers, and other functions. The Harris development effort had first passed silicon success in June, 1992 with the first rad-hard 32-bit RH-3000 CPU chip. The CPU device is 30 kgates, has a 508 mil by 503 mil die size and is fabricated at Harris Semiconductor on the rad-hard CMOS Silicon on Sapphire (SOS) process. The CPU device successfully passed tesing against 600,000 test vectors derived directly on the LSI/MIPS test suite and has been operational as a single board computer running C code for the past year. In addition, the RH-3000 program has developed the methodology for converting commercially developed designs utilizing logic synthesis techniques based on a combination of VHDK and schematic data bases.

Shah, Ravi↗
NASA NTRS2004

Inter-Valence-Subband/Conduction-Band-Transport IR Detectors

Infrared (IR) detectors characterized by a combination of (1) high-quantum-efficiency photoexcitation of inter-valence-subband transitions of charge carriers and (2) high-mobility conduction- band transport of the thus-excited charge carriers have been proposed in an effort to develop focal-plane arrays of such devices for infrared imaging. Like many prior quantum-well infrared photodetectors (QWIPs), the proposed devices would be made from semiconductor heterostructures. In order to obtain the combination of characteristics mentioned above, the proposed devices would be designed and fabricated in novel InAs/GaSb superlattice configurations that would exploit a phenomenon known in the semiconductor art as type-II broken-gap band offset.

Ting, David↗
NASA NTRS2017

Solid-State Neutron Detector Device

The structure and methods of fabricating a high efficiency compact solid state neutron detector based on III-Nitride semiconductor structures deposited on a substrate. The operation of the device is based on absorption of neutrons, which results in generation of free carriers.

Bensaoula, Abdelhak↗
NASA NTRS1994

Metal-Film Hall-Effect Devices

Large positive and negative Hall coefficients achievable. Family of Hall-effect devices made from multilayer metal films instead of semiconductor materials. Metal films easier to fabricate; formed by deposition on variety of substrates, and leads readily attached to them. Fabricated with larger areas, potentially more reliable, and less affected by impurities. Also used to measure magnetic fields. Devices especially useful at low temperatures.

Peters, Palmer N.↗
NASA NTRS1989

Gallium arsenide processing for gate array logic

The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

Cole, Eric D.↗
NASA NTRS1991

Heavy-ion induced single-event upset in integrated circuits

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Zoutendyk, J. A.↗
NASA NTRS2004

Fabrication of Channels for Nanobiotechnological Devices

A method, now undergoing development, of forming nanochannels in planar substrates is intended to enable the fabrication of advanced fluidic devices that could be integrated with complementary metal oxide semiconductor (CMOS) electronic circuits. Such integral combinations of fluidic and electronic components ("laboratory-on-a-chip" devices) could be used, for example, to detect individual molecules of deoxyribonucleic acid (DNA) and proteins. The width of a channel in such a device would be chosen so that molecules of the species of interest would move along the channel in single file. In this method, the fabrication of channels includes the use of such CMOS-compatible processes as chemical-mechanical polishing and oxide deposition. The layout of the channels in the substrate plane is determined by a single photolithographic process, but it is not a nanoscale lithographic process, and this process is not relied upon to define the thickness and width of the channels. Stating it from a slightly different perspective, unlike in the prior fabrication of electronic and fluidic devices involving the use of lithography to define microscale features, this process does not include the use of lithography to define nanoscale features. It is this aspect of the method that enables simplification of the process and, hence, a decrease in cost.

Lee, Choonsup↗
NASA NTRS1996

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality, and 4-A turn-on and 150-V rectification. The high operating current was achieved despite severe device size limitations imposed by present-day SiC wafer defect densities. Further substantial increases in device performance can be expected when SiC wafer defect densities decrease as SiC wafer production technology matures.

Source record↗