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At least 73 records · Page 4

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DOE OSTI2020

Layer-Dependent Bit Error Variation in 3-D NAND Flash Under Ionizing Radiation

In this paper, we studied the total ionization dose (TID) effects on the multilevel-cell (MLC) 3-D NAND flash memory using Co-60 gamma radiation. We found a significant page-to-page bit error variation within a physical memory block of the irradiated memory chip. Our analysis showed that the origin of the bit error variation is the unique vertical layer-dependent TID response of the 3-D NAND. We found that the memory pages located at the upper and lower layers of the 3-D stack show higher fails compared to the middle-layer pages of a given memory block. We confirmed our findings by comparing radiation response of four different chips of the same specification. In addition, we compared the TID response of the MLC 3-D NAND with that of the 2-D NAND chip, which showed less page-to-page variation in bit error within a given memory block. We discuss the possible application of our findings for the radiation-tolerant smart memory controller design.

3-D NAND flash↗

NASA NTRS2019

Bit Error Rate Performance of a Free Space Optical Link Using Double Clad Fibers

Mobile and embedded applications are emerging in the growing field of free space optical links (FSOL). Some mobile applications for FSOL include spacecraft, aircraft, and automotive. These applications by nature require low size weight and power (SWaP) solutions. The main challenge with any FSOL system is the strict pointing requirements. Common solutions to pointing and alignment of FSOL include gimbals, fast steering mirrors, and adaptive optics. All of which provide viable solutions at the cost of increased SWaP. Previously, we presented the use of both large core fibers and double clad fibers (DCF) to interface FSOL transmit and receive optics with small form factor pluggable optical transceivers (SFP). Double clad fibers have been shown to enable a common optical path by transmitting through a single mode core and receiving through a large inner cladding. This enables a single set of symmetric transmit and receive optics, which decreases the SWaP. In addition, using DCF increases the received power stability of the link relative to a multi-mode fiber (MMF) transmitting. To determine the viability of the system, bit error rate performance needs to be investigated. The results of this paper show that at a bit rate of 10 Gbps, double clad fibers offer similar bit error rate performance to single mode fibers when transmitting and multi-mode fibers when receiving enabling a symmetric duplex FSOL reducing SWaP.

Small Form-Factor Pluggable Optical Transceiver↗

NASA NTRS2019

Bit Error Rate Performance of a Free Space Optical Link Using Double Clad Fibers

Double Clad Fiber↗

DOE OSTI2018

Bit threads in higher-curvature gravity

We generalize holographic bit threads to bulk theories with a gravitational action containing higher-curvature terms. Bit threads are a reformulation of holographic entanglement entropy, where the entropy is given by the maximum number of threads emanating from a boundary region into the bulk. We show that the addition of higher-curvature terms adds corrections to the bit thread thickness that depend on the local geometry and thread orientation. Two different methods are given: determination of the density bound by requiring the maximum number of threads through a given surface to reproduce the entanglement entropy functional on that surface, and application of Lagrange dualization. The results of the two methods are applied to Gauss-Bonnet gravity as the simplest non-trivial example.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2024

Nonequilibrium formulation of varying-temperature bit erasure

Landauer's principle states that erasing a bit of information at fixed temperature T costs at least $k$ B $T$ ln 2 units of work. Here we investigate erasure at varying temperature, to which Landauer's result does not apply. Here we formulate bit erasure as a stochastic nonequilibrium process involving a compression of configuration space, with physical and logical states associated in a symmetric way. Erasure starts and ends at temperature T, but temperature can otherwise vary with time in an arbitrary way. Defined in this way, erasure is governed by a set of nonequilibrium fluctuation relations that show that varying-temperature erasure can done with less work than $k$ B $T$ ln 2. As a result, erasure and the complementary process of bit randomization can be combined to form a work-producing engine cycle.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2023

Quantum bit threads

We give a bit thread prescription that is equivalent to the quantum extremal surface prescription for holographic entanglement entropy. Our proposal is inspired by considerations of bit threads in doubly holographic models, and equivalence is established by proving a generalisation of the Riemannian max-flow min-cut theorem. We explore our proposal’s properties and discuss ways in which islands and spacetime are emergent phenomena from the quantum bit thread perspective.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

NASA NTRS1969

PCM bit detection with correction for intersymbol interference

For pulse code modulation bits, received signals are filtered by integrate and dump filter from which samples are directed to end of PCM bit. Threshold decision circuit determines level of sample voltage. Effects of interference of known past bit can be corrected by raising or lowering threshold voltage value.

Thumim, A. I.↗

NASA NTRS1970

Core drill's bit is replaceable without withdrawal of drill stem - A concept

Drill bit is divided into several sectors. When collapsed, the outside diameter is forced down the drill stem, when it reaches bottom the sectors are forced outward and form a cutting bit. A dulled bit is retracted by reversal of this procedure.

Rushing, F. C.↗

NASA NTRS1972

Inexpensive programmable clock for a 12-bit computer

An inexpensive programmable clock was built for a digital PDP-12 computer. The instruction list includes skip on flag; clear the flag, clear the clock, and stop the clock; and preset the counter with the contents of the accumulator and start the clock. The clock counts at a rate determined by an external oscillator and causes an interrupt and sets a flag when a 12-bit overflow occurs. An overflow can occur after 1 to 4096 counts. The clock can be built for a total parts cost of less than $100 including power supply and I/O connector. Slight modification can be made to permit its use on larger machines (16 bit, 24 bit, etc.) and logic level shifting can be made to make it compatible with any computer.

Vrancik, J. E.↗

NASA NTRS1972

Conceptual design and feasibility evaluation model of a 10 to the 8th power bit oligatomic mass memory. Volume 1: Conceptual design

The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.

Recksiedler, A. L.↗

NASA NTRS1974

Carrier tracking, bit synchronization, and coding for S-band communications links

This paper presents the results of a study of the performance of Viterbi-decoded convolutional codes in the presence of nonideal carrier tracking and bit synchronization. A constraint length 7, rate 1/3 convolutional code and parameters suitable for the space shuttle coded communications links are used. Mathematical models are developed and theoretical and simulation results are obtained to determine the tracking and acquisition performance of the system. It is shown that the combined energy-to-noise degradation due to nonideal carrier tracking and bit synchronization over that required for the ideal tracking case can be held to less than 1.5 dB and that combined carrier tracking and bit timing can be acquired in only a few seconds for the parameters and operating ranges of the space shuttle coded communications links.

Odenwalder, J. P.↗

NASA NTRS1979

Digital PSK to BiO-L demodulator for 2 sup nx(bit rate) carrier

A phase shift key (PSK) to BiO-L demodulator which uses standard digital integrated circuits is discussed. The demodulator produces NRZ-L, bit clock, and BiO-L outputs from digital PSK input signals for which the carrier is a 2 to the Nth multiple of the bit rate. Various bit and carrier rates which are accommodated by changing various component values within the demodulator are described. The use of the unit for sinusoidal inputs as well as digital inputs is discussed.

Shull, T. A.↗

NASA NTRS1979

The 10 to the 8th power bit solid state spacecraft data recorder

The results are summarized of a program to demonstrate the feasibility of Bubble Domain Memory Technology as a mass memory medium for spacecraft applications. The design, fabrication and test of a partially populated 10 to the 8th power Bit Data Recorder using 100 Kbit serial bubble memory chips is described. Design tradeoffs, design approach and performance are discussed. This effort resulted in a 10 to the 8th power bit recorder with a volume of 858.6 cu in and a weight of 47.2 pounds. The recorder is plug reconfigurable, having the capability of operating as one, two or four independent serial channel recorders or as a single sixteen bit byte parallel input recorder. Data rates up to 1.2 Mb/s in a serial mode and 2.4 Mb/s in a parallel mode may be supported. Fabrication and test of the recorder demonstrated the basic feasibility of Bubble Domain Memory technology for such applications. Test results indicate the need for improvement in memory element operating temperature range and detector performance.

Murray, G. W.↗

NASA NTRS1981

A bit transition density encoder for the Space Shuttle 2 MHz data channel

As a result of several unique factors, the 2 MHz data channel which carries science data from the various experiments aboard the Space Shuttle through the Tracking and Data Relay Satellite System (TDRSS) lacks sufficient bit transition density to satisfy the bit synchronizer requirements at the ground station. It is noted that six encoding techniques were examined, and all but one, a PN cover sequence (Reset Bit Scrambler) were dismissed because of incompatibility with system constraints. The rationale behind the particular PN sequence chosen, the way it was truncated, and the new sequence properties are presented. The properties of the raw data stream are analyzed, as are the encoded sequence properties, including transition density. Diagrams of the encoder and decoder are included.

Schoggen, W. O.↗

NASA NTRS1981

A study of high density bit transition requirements versus the effects on BCH error correcting coding

Several methods for increasing bit transition densities in a data stream are summarized, discussed in detail, and compared against constraints imposed by the 2 MHz data link of the space shuttle high rate multiplexer unit. These methods include use of alternate pulse code modulation waveforms, data stream modification by insertion, alternate bit inversion, differential encoding, error encoding, and use of bit scramblers. The psuedo-random cover sequence generator was chosen for application to the 2 MHz data link of the space shuttle high rate multiplexer unit. This method is fully analyzed and a design implementation proposed.

Ingels, F.↗

NASA NTRS1981

Bit error rate performance of Image Processing Facility high density tape recorders

The Image Processing Facility at the NASA/Goddard Space Flight Center uses High Density Tape Recorders (HDTR's) to transfer high volume image data and ancillary information from one system to another. For ancillary information, it is required that very low bit error rates (BER's) accompany the transfers. The facility processes about 10 to the 11th bits of image data per day from many sensors, involving 15 independent processing systems requiring the use of HDTR's. When acquired, the 16 HDTR's offered state-of-the-art performance of 1 x 10 to the -6th BER as specified. The BER requirement was later upgraded in two steps: (1) incorporating data randomizing circuitry to yield a BER of 2 x 10 to the -7th and (2) further modifying to include a bit error correction capability to attain a BER of 2 x 10 to the -9th. The total improvement factor was 500 to 1. Attention is given here to the background, technical approach, and final results of these modifications. Also discussed are the format of the data recorded by the HDTR, the magnetic tape format, the magnetic tape dropout characteristics as experienced in the Image Processing Facility, the head life history, and the reliability of the HDTR's.

Heffner, P.↗

NASA NTRS1989

Using Bit Errors To Diagnose Fiber-Optic Links

Technique for diagnosis of fiber-optic digital communication link in local-area network of computers based on measurement of bit-error rates. Variable optical attenuator inserted in optical fiber to vary power of received signal. Bit-error rate depends on ratio of peak signal power to root-mean-square noise in receiver. For optimum measurements, one selects bit-error rate between 10 to negative 8th power and 10 to negative 4th power. Greater rates result in low accuracy in determination of signal-to-noise ratios, while lesser rates require impractically long measurement times.

Bergman, L. A.↗

NASA NTRS1988

Efficient use of bit planes in the generation of motion stimuli

The production of animated motion sequences on computer-controlled display systems presents a technical problem because large images cannot be transferred from disk storage to image memory at conventional frame rates. A technique is described in which a single base image can be used to generate a broad class of motion stimuli without the need for such memory transfers. This technique was applied to the generation of drifting sine-wave gratings (and by extension, sine wave plaids). For each drifting grating, sine and cosine spatial phase components are first reduced to 1 bit/pixel using a digital halftoning technique. The resulting pairs of 1-bit images are then loaded into pairs of bit planes of the display memory. To animate the patterns, the display hardware's color lookup table is modified on a frame-by-frame basis; for each frame the lookup table is set to display a weighted sum of the spatial sine and cosine phase components. Because the contrasts and temporal frequencies of the various components are mutually independent in each frame, the sine and cosine components can be counterphase modulated in temporal quadrature, yielding a single drifting grating. Using additional bit planes, multiple drifting gratings can be combined to form sine-wave plaid patterns. A large number of resultant plaid motions can be produced from a single image file because the temporal frequencies of all the components can be varied independently. For a graphics device having 8 bits/pixel, up to four drifting gratings may be combined, each having independently variable contrast and speed.

Mulligan, Jeffrey B.↗