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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS2015

Towards a Generic and Adaptive System-On-Chip Controller for Space Exploration Instrumentation

This paper introduces one of the first efforts conducted at NASA’s Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9 dual-core processor on a single chip. The Zynq implements a generic and customizable on-chip infrastructure that can be reused with a variety of instruments, and it has been coupled with a set of off-chip components that are necessary to deal with the different instruments. We have taken JPL’s Compositional InfraRed Imaging Spectrometer (CIRIS), which is proposed for NASA icy moons missions, as a use-case scenario to demonstrate that the entire data processing, control and interface of an instrument can be implemented on a single device using the on-chip infrastructure described in this paper. We show that the performance results achieved in this preliminary version of the instrumentation controller are sufficient to fulfill the science requirements demanded to the CIRIS instrument in future NASA missions, such as Europa.

embedded system↗
NASA NTRS1995

Associative Pattern Recognition In Analog VLSI Circuits

Winner-take-all circuit selects best-match stored pattern. Prototype cascadable very-large-scale integrated (VLSI) circuit chips built and tested to demonstrate concept of electronic associative pattern recognition. Based on low-power, sub-threshold analog complementary oxide/semiconductor (CMOS) VLSI circuitry, each chip can store 128 sets (vectors) of 16 analog values (vector components), vectors representing known patterns as diverse as spectra, histograms, graphs, or brightnesses of pixels in images. Chips exploit parallel nature of vector quantization architecture to implement highly parallel processing in relatively simple computational cells. Through collective action, cells classify input pattern in fraction of microsecond while consuming power of few microwatts.

Tawel, Raoul↗
NASA NTRS2001

Compilation Techniques for Core Plus FPGA Systems

The overall system architecture targeted in this study is a core-plus-fpga design, which is composed of a core VLIW DSP with on-chip memory and a set of special-purpose functional units implemented using FPGAs. A figure is given which shows the overall organization of the core-plus-fpga system. It is important to note that this architecture is relatively simple in concept and can be built from off-the-shelf commercial components, such as one of the Texas Instruments 320C6x family of DSPs for the core processor.

Conte, Tom↗
NASA NTRS1997

Room and Low Temperature Performance of High-Speed Neural Network Circuits

We have described a challenging neural-network hardware implementation that would mate a 64x64-pixel infrared sensor directly on to a 3-dimensionally packaged set of neural processing chips with parallel input for high speed image processing. Non linearity effects and range compression are also discussed.

high-speed neural network circuits neural network ↗
DOE OSTI2022

A combined experimental and numerical approach that eliminates the non-uniqueness associated with the Johnson-Cook parameters obtained using inverse methods

Abstract Johnson-Cook constitutive model is a commonly used material model for machining simulations. The model includes five parameters that capture the initial yield stress, strain-hardening, strain-rate hardening, and thermal softening behavior of the material. These parameters are difficult to determine using experiments since the conditions observed during machining (such as high strain-rates of the order of $$10^5$$ 10 5 /sec - $$10^6$$ 10 6 /sec) are challenging to recreate in the laboratory. To address this problem, several researchers have recently proposed inverse approaches where a combination of experiments and analytical models are used to predict the Johnson-Cook parameters. The errors between the measured cutting forces, chip thicknesses and temperatures and those predicted by analytical models are minimized and the parameters are determined. In this work, it is shown that only two of the five Johnson-Cook parameters can be determined uniquely using inverse approaches. Two different algorithms, namely, Adaptive Memory Programming for Global Optimization (AMPGO) and Particle Swarm Optimization (PSO), are used for this purpose. The extended Oxley’s model is used as the analytical tool for optimization. For determining a parameter’s value, a large range for each parameter is provided as an input to the algorithms. The algorithms converge to several different sets of values for the five Johnson-Cook parameters when all the five parameters are considered as unknown in the optimization algorithm. All of these sets, however, yield the same chip shape and cutting forces in FEM simulations. Further analyses show that only the strain-rate and thermal softening parameters can be determined uniquely and the three parameters present in the strain-hardening term of the Johnson-Cook model cannot be determined uniquely using the inverse method. A combined experimental and numerical approach is proposed to eliminate this determine all parameters uniquely.

42 ENGINEERING↗
DOE OSTI2023

On-chip parallel processing of quantum frequency comb

Abstract The frequency degree of freedom of optical photons has been recently explored for efficient quantum information processing. Significant reduction in hardware resources and enhancement of quantum functions can be expected by leveraging the large number of frequency modes. Here, we develope an integrated photonic platform for the generation and parallel processing of quantum frequency combs (QFCs). Cavity-enhanced parametric down-conversion with Sagnac configuration is implemented to generate QFCs with identical spectral distributions. On-chip quantum interference of different frequency modes is simultaneously realized with the same photonic circuit. High interference visibility is maintained across all frequency modes with the identical circuit setting. This enables the on-chip reconfiguration of QFCs. By deterministically separating QFCs without spectral filtering, we further demonstrate high-dimensional Hong-Ou-Mandel effect. Our work provides the critical step for the efficient implementation of quantum information processing with integrated photonics using the frequency degree of freedom.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS2001

Optimization of an oligonucleotide microchip for microbial identification studies: a non-equilibrium dissociation approach

The utility of a high-density oligonucleotide microarray (microchip) for identifying strains of five closely related bacilli (Bacillus anthracis, Bacillus cereus, Bacillus mycoides, Bacillus medusa and Bacillus subtilis) was demonstrated using an approach that compares the non-equilibrium dissociation rates ('melting curves') of all probe-target duplexes simultaneously. For this study, a hierarchical set of 30 oligonucleotide probes targeting the 16S ribosomal RNA of these bacilli at multiple levels of specificity (approximate taxonomic ranks of domain, kingdom, order, genus and species) was designed and immobilized in a high-density matrix of gel pads on a glass slide. Reproducible melting curves for probes with different levels of specificity were obtained using an optimized salt concentration. Clear discrimination between perfect match (PM) and mismatch (MM) duplexes was achieved. By normalizing the signals to an internal standard (a universal probe), a more than twofold discrimination (> 2.4x) was achieved between PM and 1-MM duplexes at the dissociation temperature at which 50% of the probe-target duplexes remained intact. This provided excellent differentiation among representatives of different Bacillus species, both individually and in mixtures of two or three. The overall pattern of hybridization derived from this hierarchical probe set also provided a clear 'chip fingerprint' for each of these closely related Bacillus species.

Non-NASA Center↗
DOE OSTI2025

PSEC5 Physical Verification

Ultra-Fast timing detectors, having a time resolution of 10pSec or less, are becoming increasingly important for many scientific disciplines, including High Energy Physics, Nuclear Physics, Medical Imaging and more. When developing ultra-fast detectors such as MCPs, LAPPDs, LGADs, SNSPDs, it is necessary to have access to a readout system that is low power, can support many channels and is cost effective. The PSEC5 chip was an application specific integrated circuit (ASIC) developed by the pioneering group of Prof. Henry Frisch at University of Chicago and micro electronic engineers at Fermi National Accelerator Laboratory. Three boards were designed, two to implement the readout system for an LAPPD and one to only characterize the PSEC1 chip. The main goal of the project shifted to setting up a testing environment to focus on the characterization of the chip. My student and I tested and characterized this ASIC using the third chip-on-board printed circuit board. Results show the successful fabrication and operation of some of the key building blocks and lead to the suggestions on modification for the second iteration of the chip.

Rico Aniles, H. D. [Unlisted]↗
NASA NTRS1996

Radiation Behavior of Analog Neural Network Chip

A neural network experiment conducted for the Space Technology Research Vehicle (STRV-1) 1-b launched in June 1994. Identical sets of analog feed-forward neural network chips was used to study and compare the effects of space and ground radiation on the chips. Three failure mechanisms are noted.

neural networks radiation hardening graceful degra↗
NASA NTRS1991

Performance of defect-tolerant set-associative cache memories

The increased use of on-chip cache memories has led researchers to investigate their performance in the presence of manufacturing defects. Several techniques for yield improvement are discussed and results are presented which indicate that set-associativity may be used to provide defect tolerance as well as improve the cache performance. Tradeoffs between several cache organizations and replacement strategies are investigated and it is shown that token-based replacement may be a suitable alternative to the widely-used LRU strategy.

Frenzel, J. F.↗
DOE OSTI2020

Measurements of Single Event Upset in ATLAS IBL

Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent pixels. Quantitative data analysis and simulations indicate that SET dominate over SEU on the load line of the memory. Operational issues and mitigation techniques are presented.

47 OTHER INSTRUMENTATION↗
NASA NTRS1996

Development of Collaborative Research Initiatives to Advance the Aerospace Sciences-via the Communications, Electronics, Information Systems Focus Group

The primary goal of the Adaptive Vision Laboratory Research project was to develop advanced computer vision systems for automatic target recognition. The approach used in this effort combined several machine learning paradigms including evolutionary learning algorithms, neural networks, and adaptive clustering techniques to develop the E-MOR.PH system. This system is capable of generating pattern recognition systems to solve a wide variety of complex recognition tasks. A series of simulation experiments were conducted using E-MORPH to solve problems in OCR, military target recognition, industrial inspection, and medical image analysis. The bulk of the funds provided through this grant were used to purchase computer hardware and software to support these computationally intensive simulations. The payoff from this effort is the reduced need for human involvement in the design and implementation of recognition systems. We have shown that the techniques used in E-MORPH are generic and readily transition to other problem domains. Specifically, E-MORPH is multi-phase evolutionary leaming system that evolves cooperative sets of features detectors and combines their response using an adaptive classifier to form a complete pattern recognition system. The system can operate on binary or grayscale images. In our most recent experiments, we used multi-resolution images that are formed by applying a Gabor wavelet transform to a set of grayscale input images. To begin the leaming process, candidate chips are extracted from the multi-resolution images to form a training set and a test set. A population of detector sets is randomly initialized to start the evolutionary process. Using a combination of evolutionary programming and genetic algorithms, the feature detectors are enhanced to solve a recognition problem. The design of E-MORPH and recognition results for a complex problem in medical image analysis are described at the end of this report. The specific task involves the identification of vertebrae in x-ray images of human spinal columns. This problem is extremely challenging because the individual vertebra exhibit variation in shape, scale, orientation, and contrast. E-MORPH generated several accurate recognition systems to solve this task. This dual use of this ATR technology clearly demonstrates the flexibility and power of our approach.

Knasel, T. Michael↗
DOE OSTI2021

Iterative self-organizing SCEne-LEvel sampling (ISOSCELES) for large-scale building extraction

Convolutional neural networks (CNN) provide state-of-the-art performance in many computer vision tasks, including those related to remote-sensing image analysis. Successfully training a CNN to generalize well to unseen data, however, requires training on samples that represent the full distribution of variation of both the target classes and their surrounding contexts. With remote sensing data, acquiring a sufficiently representative training set is a challenge due to both the inherent multi-modal variability of satellite or aerial imagery and the general high cost of labeling data. To address this challenge, we have developed ISOSCELES, an Iterative Self-Organizing SCEne LEvel Sampling method for hierarchical sampling of large image sets. Using affinity propagation, ISOSCELES automates the selection of highly representative training images. Compared to random sampling or using available reference data, the distribution of the training is principally data driven, reducing the chance of oversampling uninformative areas or undersampling informative ones. In comparison to manual sample selection by an analyst, ISOSCELES exploits descriptive features, spectral and/or textural, and eliminates human bias in sample selection. Using a hierarchical sampling approach, ISOSCELES can obtain a training set that reflects both between-scene variability, such as in viewing angle and time of day, and within-scene variability at the level of individual training samples. We verify the method by demonstrating its superiority to stratified random sampling in the challenging task of adapting a pre-trained model to a new image and spatial domain for country-scale building extraction. Using a pair of hand-labeled training sets comprising 1,987 sample image chips, a total of 496,000,000 individually labeled pixels, we show, across three distinct model architectures, an increase in accuracy, as measured by F1-score, of 2.2–4.2%.

42 ENGINEERING↗
NASA NTRS1989

Comparisons between Intel 386 and i486 microprecessors

A quick and preliminary comparison is made between the Intel 386 and i486 microprocessors. The following topics are discussed: the i486 key elements, comparison of instruction set architecture, the i486 on-chip cache characteristics, the i486 multiprocessor support, comparison of performance, comparison of power consumption, comparison of radiation hardening potential, and recommendations for the Space Station Freedom (SSF) Data Management System (DMS).

Liu, Yuan-Kwei↗
NASA NTRSDate not supplied

Evaluation of Automotive Grade Resistors for Space Flight

Over the past decade, electronic, electrical, and electromechanical (EEE) parts for space applications have undergone significant changes, largely driven by CubeSat and commercial space developers pushing the boundaries on the utilization of commercial parts in space. Global product shortages and shipping delays are still impacting space flight project deadlines. Many projects have turned to automotive grade resistors as an alternate to their MIL-SPEC counterparts to fulfill requirements. In addition, automotive grade resistors may offer designers a wider range of parts to consider. A recent NASA study recommended the use of high-volume manufactured commercial components for space applications provided these components show evidence of stringent fabrication controls and thorough reliability monitoring practices [1]. Automotive grade components have stringent qualification requirements per the Automotive Electronic Council (AEC). However, the end user usually does not have insight into the practices the manufacturer may use to reduce/eliminate infant mortality nor for compliance to all datasheet specifications. Screening, Life and Accelerated Life testing on a set of standard automotive-grade chip resistors is proposed to evaluate the reliability of these components. Requirements from both the AEC-Q (Automotive Electronic Council Qualification) and EEE-INST-002 (Instructions for EEE Parts Selection, Screening, Qualification, and Derating) for resistors is compared and discussed. The resistors have been tested by using a modified methodology from EEE-INST-002 to evaluate their reliability for space flight projects. The findings of this study indicate that the underlying degradation mechanisms at rated temperature and power are best represented by power law models with a fitted exponent between 0 and 1. A linear model is more conservative which compensates for potential model uncertainty given the wide range of design and materials used in automotive resistors, while still providing useful long-term resistance drift estimates. No electrical anomalies or failures were observed throughout the 1,000-hour Life Tests other than small in tolerance resistance drift aging. Degradation models were utilized to quantify and extrapolate the long-term resistance drift under operating conditions for the components. The models demonstrated that some automotive-grade resistors are likely to operate 10 years at nominal usage conditions while others might fail earlier.

Zainab Abdullahi↗
NASA NTRSDate not supplied

Evaluation of Automotive Grade Resistors for Space Flight

Over the past decade, electronic, electrical, and electromechanical (EEE) parts for space applications have undergone significant changes, largely driven by CubeSat and commercial space developers pushing the boundaries on the utilization of commercial parts in space. Global product shortages and shipping delays are still impacting space flight project deadlines. Many projects have turned to automotive grade resistors as an alternate to their MILSPEC counterparts to fulfill requirements. In addition, automotive grade resistors may offer designers a wider range of parts to consider. A recent NASA study recommended the use of high-volume manufactured commercial components for space applications provided these components show evidence of stringent fabrication controls and thorough reliability monitoring practices. Automotive grade components have stringent qualification requirements per the Automotive Electronic Council (AEC). However, the end user usually does not have insight into the practices the manufacturer may use to reduce/eliminate infant mortality nor for compliance to all datasheet specifications. Screening, Life and Accelerated Life testing on a set of standard automotive-grade chip resistors is proposed to evaluate the reliability of these components. Requirements from both the AEC-Q (Automotive Electronic Council Qualification) and EEE-INST-002 (Instructions for EEE Parts Selection, Screening, Qualification, and Derating) for resistors is compared and discussed. The resistors have been tested by using a modified methodology from EEEINST-002 to evaluate their reliability for space flight projects. The findings of this study indicate that the underlying degradation mechanisms at rated temperature and power are best represented by power law models with a fitted exponent between 0 and 1. A linear model is more conservative which compensates for potential model uncertainty given the wide range of design and materials used in automotive resistors, while still providing useful long-term resistance drift estimates. No electrical anomalies or failures were observed throughout the 1000-hour Life Tests other than small in tolerance resistance drift aging. Degradation models were utilized to quantify and extrapolate the long-term resistance drift under operating conditions for the components. The models demonstrated that some automotive-grade resistors are likely to operate 10 years at nominal usage conditions while others might fail earlier.

Zainab Abdullahi↗
NASA NTRS1982

Differential imaging using charge-coupled device (CCD) imagers with on-chip charge storage

A CCD technique is described which allows long integration periods between readouts together with moderate chopping rates. During each phase of a differential chopping cycle, one set of charge images is shifted to the center of the chip, which is light sensitive. At the same time, the other set of charge images is shifted under one of two masked areas which serve as charge-storage sites. Since the vertical shifting between phases can be accomplished in much less time than the typical exposure per phase, there is negligible image smearing. For a given light level and chopping rate the performance of this technique is limited primarily by the readout noise and the vertical charge transfer inefficiency. If many transfer cycles are required between readouts, the charge transfer inefficiency will diffuse the accumulated charge images along the vertical columns. Laboratory and astronomical data obtained with this technique using a CCD camera and the 2.3 m telescope on Kitt Peak are presented.

Stockman, H. S.↗
NASA NTRS2009

Engagement of Metal Debris into a Gear Mesh

A series of bench top experiments was conducted to determine the effects of metallic debris being dragged through meshing gear teeth. A test rig that is typically used to conduct contact fatigue experiments was used for these tests. Several sizes of drill material, shim stock, and pieces of gear teeth were introduced and then driven through the meshing region. The level of torque required to drive the "chip" through the gear mesh was measured. From the data gathered, chip size sufficient to jam the mechanism can be determined. INTRODUCTION In some space mechanisms the loading can be so high that there is some possibility that a gear chip might be liberated while in operation of the mechanism [1-5]. Also, due to the closely packed nature of some space mechanisms and the fact that a space grease is used for lubrication, chips that are released can then be introduced to other gear meshes within this mechanism. In this instance, it is desirable to know the consequences of a gear chip entering in between meshing gear teeth. To help provide some understanding, a series of bench-top experiments was conducted to engage chips of simulated and gear material fragments into a meshing gear pair. One purpose of the experiments was to determine the relationship of chip size to the torque required to rotate the gear set through the mesh cycle. The second purpose was to determine the condition of the gear chip material after engagement by the meshing gears, primarily to determine if the chip would break into pieces and to observe the motion of the chip as the engagement was completed. This document also presents preliminary testing done with metal debris other than chips from gears, namely steel shim stock and drill bits of various sizes and diameters.

Handschuh, Robert F.↗