Search NASA⌕ Search

SEARCH · Search NASA

Results for “embedded processor”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1997

A Low-Power High-Speed Smart Sensor Design for Space Exploration Missions

A low-power high-speed smart sensor system based on a large format active pixel sensor (APS) integrated with a programmable neural processor for space exploration missions is presented. The concept of building an advanced smart sensing system is demonstrated by a system-level microchip design that is composed with an APS sensor, a programmable neural processor, and an embedded microprocessor in a SOI CMOS technology. This ultra-fast smart sensor system-on-a-chip design mimics what is inherent in biological vision systems. Moreover, it is programmable and capable of performing ultra-fast machine vision processing in all levels such as image acquisition, image fusion, image analysis, scene interpretation, and control functions. The system provides about one tera-operation-per-second computing power which is a two order-of-magnitude increase over that of state-of-the-art microcomputers. Its high performance is due to massively parallel computing structures, high data throughput rates, fast learning capabilities, and advanced VLSI system-on-a-chip implementation.

Fang, Wai-Chi↗
NASA NTRS1999

Computer implemented method, and apparatus for controlling a hand-held tool

The invention described here in is a computer-implemented method and apparatus for controlling a hand-held tool. In particular, the control of a hand held tool is for the purpose of controlling the speed of a fastener interface mechanism and the torque applied to fasteners by the fastener interface mechanism of the hand-held tool and monitoring the operating parameters of the tool. The control is embodied in intool software embedded on a processor within the tool which also communicates with remote software. An operator can run the tool, or through the interaction of both software, operate the tool from a remote location, analyze data from a performance history recorded by the tool, and select various torque and speed parameters for each fastener.

Wagner, Kenneth William↗
NASA NTRS1994

ATAMM enhancement and multiprocessing performance evaluation

The algorithm to architecture mapping model (ATAAM) is a Petri net based model which provides a strategy for periodic execution of a class of real-time algorithms on multicomputer dataflow architecture. The execution of large-grained, decision-free algorithms on homogeneous processing elements is studied. The ATAAM provides an analytical basis for calculating performance bounds on throughput characteristics. Extension of the ATAMM as a strategy for cyclo-static scheduling provides for a truly distributed ATAMM multicomputer operating system. An ATAAM testbed consisting of a centralized graph manager and three processors is described using embedded firmware on 68HC11 microcontrollers.

Stoughton, John W.↗
NASA NTRS2003

The Inertial Stellar Compass (ISC): A Multifunction, Low Power, Attitude Determination Technology Breakthrough

The Inertial Stellar Compass (ISC) is a miniature, low power, stellar inertial attitude determination system with an accuracy of better than 0.1 degree (1 sigma) in three axes. The ISC consumes only 3.5 Watts of power and is contained in a 2.5 kg package. With its embedded on-board processor, the ISC provides attitude quaternion information and has Lost-in-Space (LIS) initialization capability. The attitude accuracy and LIS capability are provided by combining a wide field of view Active Pixel Sensor (APS) star camera and Micro- ElectroMechanical System (MEMS) inertial sensor information in an integrated sensor system. The performance and small form factor make the ISC a useful sensor for a wide range of missions. In particular, the ISC represents an enabling, fully integrated, micro-satellite attitude determination system. Other applications include using the ISC as a single sensor solution for attitude determination on medium performance spacecraft and as a bolt on independent safe-hold sensor or coarse acquisition sensor for many other spacecraft. NASA's New Millennium Program (NMP) has selected the ISC technology for a Space Technology 6 (ST6) flight validation experiment scheduled for 2004. NMP missions, such a s ST6, are intended to validate advanced technologies that have not flown in space in order to reduce the risk associated with their infusion into future NASA missions. This paper describes the design, operation, and performance of the ISC and outlines the technology validation plan. A number of mission applications for the ISC technology are highlighted, both for the baseline ST6 ISC configuration and more ambitious applications where ISC hardware and software modifications would be required. These applications demonstrate the wide range of Space and Earth Science missions that would benefit from infusion of the ISC technology.

Bauer, Frank H.↗
NASA NTRS2001

Implementation of a General Real-Time Visual Anomaly Detection System Via Soft Computing

The intelligent visual system detects anomalies or defects in real time under normal lighting operating conditions. The application is basically a learning machine that integrates fuzzy logic (FL), artificial neural network (ANN), and generic algorithm (GA) schemes to process the image, run the learning process, and finally detect the anomalies or defects. The system acquires the image, performs segmentation to separate the object being tested from the background, preprocesses the image using fuzzy reasoning, performs the final segmentation using fuzzy reasoning techniques to retrieve regions with potential anomalies or defects, and finally retrieves them using a learning model built via ANN and GA techniques. FL provides a powerful framework for knowledge representation and overcomes uncertainty and vagueness typically found in image analysis. ANN provides learning capabilities, and GA leads to robust learning results. An application prototype currently runs on a regular PC under Windows NT, and preliminary work has been performed to build an embedded version with multiple image processors. The application prototype is being tested at the Kennedy Space Center (KSC), Florida, to visually detect anomalies along slide basket cables utilized by the astronauts to evacuate the NASA Shuttle launch pad in an emergency. The potential applications of this anomaly detection system in an open environment are quite wide. Another current, potentially viable application at NASA is in detecting anomalies of the NASA Space Shuttle Orbiter's radiator panels.

Dominguez, Jesus A.↗
NASA NTRS1975

Structural response of a fiber composite compressor fan blade airfoil

A theoretical investigation was performed to determine the structural response of a fiber composite airfoil typical of those encountered in high-tip speed compressor fan blades when subjected to load conditions anticipated in such applications. The analysis method consisted of composite mechanics embedded in pre- and post-processors coupled with NASTRAN. The load conditions examined include thermal due to aerodynamic heating, pressure due to aerodynamic forces, and centrifugal. Root reactions due to various load conditions, average composite and ply stresses, ply delaminations, and the fundamental modes and the corresponding reactions were investigated. The results show that the thermal and pressure stresses are negligible compared to those caused by the centrifugal forces. The core-shell concept for composite blades is an inefficient design and is sensitive to interply delaminations. The results are presented in graphical and tabular forms to illustrate the types and amount of data required for the analysis, and to provide quantitative data associated with the various responses which can be helpful in designing composite blades.

Chamis, C. C.↗
NASA NTRS1975

Structural response of fiber composite fan blades

A fiber composite airfoil, typical for high-tip speed compressor applications, is subjected to load conditions anticipated to be encountered in such applications, and its structural response is theoretically investigated. The analysis method used consists of composite mechanics embedded in pre- and post-processors and coupled with NASTRAN. The load conditions examined include thermal due to aerodynamic heating, pressure due to aerodynamic forces, centrifugal, and combinations of these. The various responses investigated include root reactions due to various load conditions, average composite and ply stresses, ply delaminations, and the fundamental modes and the corresponding reactions. The results show that the thermal and pressure stresses are negligible compared to those caused by the centrifugal forces. Also, the core-shell concept for composite blades is an inefficient design (core plies not highly stressed) and appears to be sensitive to interply delaminations. The results are presented in graphical and tabular forms to illustrate the types and amount of data required for such an analysis, and to provide quantitative data of the various responses which can be helpful in designing such composite blades.

Chamis, C. C.↗
NASA NTRS1998

The Software Design for the Wide-Field Infrared Explorer Attitude Control System

The Wide-Field Infrared Explorer (WIRE), currently scheduled for launch in September 1998, is the fifth of five spacecraft in the NASA/Goddard Small Explorer (SMEX) series. This paper presents the design of WIRE's Attitude Control System flight software (ACS FSW). WIRE is a momentum-biased, three-axis stabilized stellar pointer which provides high-accuracy pointing and autonomous acquisition for eight to ten stellar targets per orbit. WIRE's short mission life and limited cryogen supply motivate requirements for Sun and Earth avoidance constraints which are designed to prevent catastrophic instrument damage and to minimize the heat load on the cryostat. The FSW implements autonomous fault detection and handling (FDH) to enforce these instrument constraints and to perform several other checks which insure the safety of the spacecraft. The ACS FSW implements modules for sensor data processing, attitude determination, attitude control, guide star acquisition, actuator command generation, command/telemetry processing, and FDH. These software components are integrated with a hierarchical control mode managing module that dictates which software components are currently active. The lowest mode in the hierarchy is the 'safest' one, in the sense that it utilizes a minimal complement of sensors and actuators to keep the spacecraft in a stable configuration (power and pointing constraints are maintained). As higher modes in the hierarchy are achieved, the various software functions are activated by the mode manager, and an increasing level of attitude control accuracy is provided. If FDH detects a constraint violation or other anomaly, it triggers a safing transition to a lower control mode. The WIRE ACS FSW satisfies all target acquisition and pointing accuracy requirements, enforces all pointing constraints, provides the ground with a simple means for reconfiguring the system via table load, and meets all the demands of its real-time embedded environment (16 MHz Intel 80386 processor with 80387 coprocessor running under the VRTX operating system). The mode manager organizes and controls all the software modules used to accomplish these goals, and in particular, the FDH module is tightly coupled with the mode manager.

Anderson, Mark O.↗
NASA NTRS1997

Fast Context Switching in Real-Time Propositional Reasoning

The trend to increasingly capable and affordable control processors has generated an explosion of embedded real-time gadgets that serve almost every function imaginable. The daunting task of programming these gadgets is greatly alleviated with real-time deductive engines that perform all execution and monitoring functions from a single core model, Fast response times are achieved using an incremental propositional deductive database (an LTMS). Ideally the cost of an LTMS's incremental update should be linear in the number of labels that change between successive contexts. Unfortunately an LTMS can expend a significant percentage of its time working on labels that remain constant between contexts. This is caused by the LTMS's conservative approach: a context switch first removes all consequences of deleted clauses, whether or not those consequences hold in the new context. This paper presents a more aggressive incremental TMS, called the ITMS, that avoids processing a significant number of these consequences that are unchanged. Our empirical evaluation for spacecraft control shows that the overhead of processing unchanged consequences can be reduced by a factor of seven.

Nayak, P. Pandurang↗
NASA NTRS2002

Tightly Coupled Inertial Navigation System/Global Positioning System (TCMIG)

Many NASA applications planned for execution later this decade are seeking high performance, miniaturized, low power Inertial Management Units (IMU). Much research has gone into Micro-Electro-Mechanical System (MEMS) over the past decade as a solution to these needs. While MEMS devices have proven to provide high accuracy acceleration measurements, they have not yet proven to have the accuracy required by many NASA missions in rotational measurements. Therefore, a new solution has been formulated integrating the best of all IMU technologies to address these mid-term needs in the form of a Tightly Coupled Micro Inertial Navigation System (INS)/Global Positioning System (GPS) (TCMIG). The TCMIG consists of an INS and a GPS tightly coupled by a Kalman filter executing on an embedded Field Programmable Gate Array (FPGA) processor. The INS consists of a highly integrated Interferometric Fiber Optic Gyroscope (IFOG) and a MEMS accelerometer. The IFOG utilizes a tightly wound fiber coil to reduce volume and the high level of integration and advanced optical components to reduce power. The MEMS accelerometer utilizes a newly developed deep etch process to increase the proof mass and yield a highly accurate accelerometer. The GPS receiver consists of a low power miniaturized version of the Blackjack receiver. Such an IMU configuration is ideal to meet the mid-term needs of the NASA Science Enterprises and the new launch vehicles being developed for the Space Launch Initiative (SLI).

Watson, Michael D.↗
NASA NTRS2010

Smart Power Supply for Battery-Powered Systems

A power supply for battery-powered systems has been designed with an embedded controller that is capable of monitoring and maintaining batteries, charging hardware, while maintaining output power. The power supply is primarily designed for rovers and other remote science and engineering vehicles, but it can be used in any battery alone, or battery and charging source applications. The supply can function autonomously, or can be connected to a host processor through a serial communications link. It can be programmed a priori or on the fly to return current and voltage readings to a host. It has two output power busses: a constant 24-V direct current nominal bus, and a programmable bus for output from approximately 24 up to approximately 50 V. The programmable bus voltage level, and its output power limit, can be changed on the fly as well. The power supply also offers options to reduce the programmable bus to 24 V when the set power limit is reached, limiting output power in the case of a system fault detected in the system. The smart power supply is based on an embedded 8051-type single-chip microcontroller. This choice was made in that a credible progression to flight (radiation hard, high reliability) can be assumed as many 8051 processors or gate arrays capable of accepting 8051-type core presently exist and will continue to do so for some time. To solve the problem of centralized control, this innovation moves an embedded microcontroller to the power supply and assigns it the task of overseeing the operation and charging of the power supply assets. This embedded processor is connected to the application central processor via a serial data link such that the central processor can request updates of various parameters within the supply, such as battery current, bus voltage, remaining power in battery estimations, etc. This supply has a direct connection to the battery bus for common (quiescent) power application. Because components from multiple vendors may have differing power needs, this supply also has a secondary power bus, which can be programmed a priori or on-the-fly to boost the primary battery voltage level from 24 to 50 V to accommodate various loads as they are brought on line. Through voltage and current monitoring, the device can also shield the charging source from overloads, keep it within safe operating modes, and can meter available power to the application and maintain safe operations.

Krasowski, Michael J.↗
NASA NTRS2010

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗
NASA NTRS2011

Enabling Future Robotic Missions with Multicore Processors

Recent commercial developments in multicore processors (e.g. Tilera, Clearspeed, HyperX) have provided an option for high performance embedded computing that rivals the performance attainable with FPGA-based reconfigurable computing architectures. Furthermore, these processors offer more straightforward and streamlined application development by allowing the use of conventional programming languages and software tools in lieu of hardware design languages such as VHDL and Verilog. With these advantages, multicore processors can significantly enhance the capabilities of future robotic space missions. This paper will discuss these benefits, along with onboard processing applications where multicore processing can offer advantages over existing or competing approaches. This paper will also discuss the key artchitecural features of current commercial multicore processors. In comparison to the current art, the features and advancements necessary for spaceflight multicore processors will be identified. These include power reduction, radiation hardening, inherent fault tolerance, and support for common spacecraft bus interfaces. Lastly, this paper will explore how multicore processors might evolve with advances in electronics technology and how avionics architectures might evolve once multicore processors are inserted into NASA robotic spacecraft.

multi-core processor↗
NASA NTRS1992

Distributed and parallel Ada and the Ada 9X recommendations

Recently, the DoD has sponsored work towards a new version of Ada, intended to support the construction of distributed systems. The revised version, often called Ada 9X, will become the new standard sometimes in the 1990s. It is intended that Ada 9X should provide language features giving limited support for distributed system construction. The requirements for such features are given. Many of the most advanced computer applications involve embedded systems that are comprised of parallel processors or networks of distributed computers. If Ada is to become the widely adopted language envisioned by many, it is essential that suitable compilers and tools be available to facilitate the creation of distributed and parallel Ada programs for these applications. The major languages issues impacting distributed and parallel programming are reviewed, and some principles upon which distributed/parallel language systems should be built are suggested. Based upon these, alternative language concepts for distributed/parallel programming are analyzed.

Volz, Richard A.↗
NASA NTRS2014

CSP: A Multifaceted Hybrid Architecture for Space Computing

Research on the CHREC Space Processor (CSP) takes a multifaceted hybrid approach to embedded space computing. Working closely with the NASA Goddard SpaceCube team, researchers at the National Science Foundation (NSF) Center for High-Performance Reconfigurable Computing (CHREC) at the University of Florida and Brigham Young University are developing hybrid space computers that feature an innovative combination of three technologies: commercial-off-the-shelf (COTS) devices, radiation-hardened (RadHard) devices, and fault-tolerant computing. Modern COTS processors provide the utmost in performance and energy-efficiency but are susceptible to ionizing radiation in space, whereas RadHard processors are virtually immune to this radiation but are more expensive, larger, less energy-efficient, and generations behind in speed and functionality. By featuring COTS devices to perform the critical data processing, supported by simpler RadHard devices that monitor and manage the COTS devices, and augmented with novel uses of fault-tolerant hardware, software, information, and networking within and between COTS devices, the resulting system can maximize performance and reliability while minimizing energy consumption and cost. NASA Goddard has adopted the CSP concept and technology with plans underway to feature flight-ready CSP boards on two upcoming space missions.

Reconfigurable↗
NASA NTRS1987

A computational code for two-dimensional unsteady magnetohydrodynamics by the method of characteristics

A computational code for solving two-dimensional, time-dependent MHD equations by the method of characteristics is presented. Its capabilities are demonstrated by solving two very different problems for which analytical solutions exist: linearized, standing MHD wave motions in a magnetized cylindrical plasma, and nonlinear self-similar expansion of a magnetized plasma ball. The nonlinear development of standing MHD wave solutions in a cylindrical plasma is also studied. The method can be naturally embedded in the computational architecture of massively parallel processors.

Lou, Y. Q.↗
NASA NTRS1988

Advanced flight computers for planetary exploration

Research concerning flight computers for use on interplanetary probes is reviewed. The history of these computers from the Viking mission to the present is outlined. The differences between ground commercial computers and computers for planetary exploration are listed. The development of a computer for the Mariner Mark II comet rendezvous asteroid flyby mission is described. Various aspects of recently developed computer systems are examined, including the Max real time, embedded computer, a hypercube distributed supercomputer, a SAR data processor, a processor for the High Resolution IR Imaging Spectrometer, and a robotic vision multiresolution pyramid machine for processsing images obtained by a Mars Rover.

Stephenson, R. Rhoads↗
NASA NTRS2010

SSME Engine Controller Development and Evolution

The SSME engine controller is a redundant, micro-processor based control unit. The controller along with its embedded software provides closed loop control of the engine s thrust and mixture ratio during flight as well as configuring the engine state and operations during non-flight activities such as checkouts, and pre-start engine conditioning. It processes orbiter commands into engine actions and provides engine state and health information to the orbiter for immediate action, telemetry and recording. In addition the controller includes functions which continually monitor and manage engine health, and can activate a variety of fault mitigation actions to insure safe engine operation. The objective of this paper is to provide a description of the SSME engine controller as well as its developmental history and lessons learned

Abrams, Russ↗