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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4

Low-Jitter Clock Receivers for Fast Timing Applications

Precision timing is a key requirement for emerging 4D particle tracking, Positron Emission Tomography (PET), beam and fusion plasma diagnostics, and other systems. Time-to-Digital Converters (TDCs) are commonly used to provide digital estimates of the relative timing between events, but the jitter performance of a TDC can be no better than the performance of the circuits that acquire the pulses and deliver them to the TDC. Several clock receiver and distribution circuits were evaluated, and a differential amplifier with resistive loads driving a pseudo-differential clock distribution network, developed using design guidelines for radiation tolerance and cryogenic compatibility, was fabricated as part of three prototypes: an analog front-end testbed chip for high-precision timing pixel readout, a dedicated TDC evaluation chip, and a Low-Gain Avalanche Detector (LGAD) readout circuit. Based on TDC measurements of the prototypes, we infer that the jitter added by the clock receiver and distribution circuits is less than 2.25 ps-rms. This performance meets the requirements of many future precision timing systems. The clock receiver and on-chip pseudo-differential driver were fabricated in commercial 28-nm CMOS technology and occupy 2288 µm 2 .

47 OTHER INSTRUMENTATION↗

Identification and mitigation of memory block timing issue in ITk ABCStar during ASIC production

The ABCStar is a mixed-signal front-end readout ASIC for the strips sensor portion of the ATLAS ITk detector being developed as part of the High-Luminosity LHC upgrade. In pre-production testing, a subtle design flaw was uncovered in the ABCStar that was reducing wafer yields in some manufactured lots from the expected 90% to as low as 2%. The root cause was determined to be a timing issue in the logic synthesized to control previously silicon proven memory blocks re-used for this ASIC. The solutions proposed included manufacturing process changes by the wafer foundry, changes to the operating parameters for the ABCStar in the detector, and the possibility that a redesign might be required. The two mitigation efforts were undertaken in parallel, with the process modification route a less desirable solution since already manufactured wafers would need to be scrapped in favour of the new ones. Based on a knowledge of the existing process, and testing done on the worst performing wafers, it was proposed that raising the core operating voltage of the ABCStar from 1.20V to 1.25V could address the timing issue by sufficiently speeding up its transistors. An extensive testing program that included the effects of temperature and radiation expected over the lifetime of the ITk detector was conducted to validate that approach. Those tests and studies proved that even the worst performing wafers would have yields over 80% with the 1.25V core voltage, and neither the modified process nor redesign would be required for ensuring reliable operation of the ITk. Based on testing, a further timing mitigation was implemented to provide an additional margin of reliability by increasing the duty cycle of the clock to the ABCStar. Testing of all ABCStar wafers has been completed and the production of the detector modules using these ASICs is now well underway as a result of the efforts detailed herein.

FOS: Physical sciences↗

Guideline for Characterizing and Evaluating a Candidate Project Site for Solar Thermal Applications

This document presents a structured procedure for characterizing and evaluating candidate project sites for concentrating solar power (CSP) and solar heat for industrial processes (SHIP) applications. The objective is to provide project developers, researchers, and other stakeholders with a consistent, technology-agnostic framework for early-stage site assessment, enabling informed decision-making prior to significant investment in project development. Site selection is a critical factor in project success or failure for both CSP and SHIP projects. Key factors such as solar resource availability, land characteristics, environmental and regulatory constraints, infrastructure availability, and community context are determined by the choice of project site and can materially impact project performance, cost, schedule, and overall viability. This procedure is designed to systematically evaluate these factors, identify potential fatal flaws, and prioritize the most favorable candidate sites for further development. The process begins with rapid screening-level evaluation, using publicly available data to assess solar resource, land availability and suitability, zoning and land-use compatibility, and exclusion zones such as protected lands or sensitive habitats. Sites that meet the minimum screening criteria advance to a more detailed characterization. Subsequent sections of this report provide guidance for a next-level assessment of the most important technical and environmental parameters, including: 1) Solar resource quality, variability, and uncertainty using multiyear datasets and, where appropriate, on-site measurement campaigns; 2) Meteorological conditions such as wind, temperature, extreme weather events, and soiling impacts; 3) Land characteristics including slope, shading, and geotechnical conditions; and 4) Environmental and regulatory considerations, including permitting processes, endangered species, cultural resources, and visual impacts. The procedure also addresses infrastructure and integration considerations, including: 1) Grid interconnection requirements for CSP power generation projects; 2) Electrical and operational integration for SHIP facilities; 3) Water availability, quality, and permitting constraints, which are particularly critical for CSP in arid regions; and 4) Site access, construction logistics, and availability of workforce and supporting services. Recognizing the importance of social and economic context, the procedure includes evaluation of community engagement factors, such as stakeholder sentiment, proximity to sensitive visual receptors, workforce development opportunities, and local economic incentives. The outputs of these assessments are synthesized in a cost and risk evaluation, translating site characteristics into expected impacts on capital cost, operating cost, schedule, and technical risk. This is complemented by screening-level performance modeling, including 8760 simulations and long-term projections, to quantify expected energy or thermal output, assess variability thereof, and support comparison between candidate sites. Finally, the procedure provides high-level guidance on a structured go/no-go decision framework, categorizing sites based on identified risks and constraints, and outlining a clear path forward to feasibility studies and front-end engineering design for viable projects. By standardizing the site characterization process across both CSP and SHIP applications, this guideline aims to: 1) Improve consistency and transparency in early-stage project evaluation; 2) Reduce development risk and avoid investment in nonviable project sites; 3) Support collaboration between developers, researchers, and public agencies; and 4) Accelerate successful deployment of concentrating solar technologies for both power generation and industrial process heat.

14 SOLAR ENERGY↗

The Hyperspectral Microwave Photonic Instrument (HyMPI) and its NEDT Performance

This work presents an overview of a hyperspectral microwave-photonic spectrometer and demonstrates the system end-to-end noise equivalent delta temperature (NEDT) performance. The system aims at augmenting the remote sensing capability from space, with a focus on the Earth’s planetary boundary layer (PBL) thermal microwave (MW) spectral region (0-200 GHz). Combining a Photonic Integrated Circuit (PIC) channelizer and an application-specific integrated circuit (ASIC) spectrometer, the PIC & ASIC (PICASIC) module is capable of processing 40 GHz spectra at hyperspectral (4 MHz) resolution. The photonic technology is agnostic to the spectral region and multiple photonic modules can cover the entire 200 GHz spectrum. Measured results of the end-to-end system NEDT agree with predicted values confirming that the NEDT is primarily dominated by the noise figure of the MW front-end, with the optical link adding no significant noise. The data also demonstrate that a single module enables simultaneous super- and hyper-spectral resolution channel analysis across a 40 GHz range.

spectrometer↗

NE-COST plug-in: Expanding ACCERT's Capabilities for Life-Cycle Cost Modeling

The Algorithm for the Capital Cost Estimation of Reactor Technologies (ACCERT) is a structured methodology and software tool designed to simplify and standardize cost estimation for nuclear reactor technologies [1]. By utilizing a relational database structure and modular cost estimation algorithms, ACCERT delivers a robust, flexible, and scalable framework for evaluating costs across various reactor types and configurations [2]. The recent integration of the NE-COST plugin further expands ACCERT’s scope by introducing detailed life-cycle cost modeling and probabilistic analysis of uncertainties. This addition enables users to evaluate costs across front-end processes such as uranium enrichment and fabrication, as well as back-end activities including waste disposal and geologic storage. Through Monte Carlo statistical cost simulations, the plugin provides probabilistic insights into cost ranges, offering critical decision-making support for stakeholders including reactor developers, policymakers, and researchers.

Zhou, Jia↗

Direct Air Capture and Utilization System (DACUS): FEED Study of CarbonCapture Inc. DAC and CarbonCure Utilization Technologies Using United States Steel’s Gary Works Plant Waste Heat

The effects of climate change are drastically perceived through the alarming rates of severe events such as flooding, hurricanes, wildfires, global temperature rise, sea-level rise, and ocean acidification etc., which has prompted the nations across the globe to control & reduce greenhouse gas (GHG) emissions, by massive adoption of electric vehicles, switching to renewal energy sources and promoting sustainable green products. However, recent climate studies have shown that such efforts will not be enough to keep the global temperature rising under 1.5° Celsius by the year 2050, which lead to the development of multiple Direct Air Capture (DAC) technologies. A DAC system extracts CO2 directly from the atmosphere, which is either stored underground for long term or utilized in other processes. The DACUS proposed at U.S. Steel Corporation’s Gary Works Plant in Gary, Indiana, will include an innovative DAC technology from CarbonCapture Inc. (CCI), which will be collocated and powered by waste heat from the steel plant to capture CO2 from ambient air, and CarbonCure CO2 utilization technology- which is a commercial technology that is already installed and in use by early adopters in more than 150 concrete mixing plants across North America and Asia. The University of Illinois at Urbana Champaign spearheaded this Front-End Engineering Design (FEED) study project, which was funded by US Department of Energy (DOE), aimed at designing a state-of-the art DACU system that can remove minimum of 5,000 tonne/year net CO2 from air (based on cradle-to-gate LCA) and converting the captured CO2 into low carbon intensity products. The off takers of the low Carbon product produced by the DACUS have also been identified near the steel plant in the Indiana, Illinois & Wisconsin Region. This creates a full CO2 value chain and provides a means to assess the impact of this holistic approach on job creation, regional economic impact, and environmental justice. DACUS is a promising new technology for reducing greenhouse gas in the atmosphere. Operation costs are minimized by locating CCI’s innovative DAC collector at United States Steel's Gary Works site where waste heat is utilized. Carbon emissions are minimized in CO2 transportation. The captured CO2 will be permanently sequestered in concrete used as construction material. This DOE funded FEED study demonstrates a full CO2 value chain for a DACU system, supported by an industrial facility. If this project were constructed, it would have a very positive and lasting impact on both the environment and the community.

42 ENGINEERING↗

LLRF System Analysis for the Fermilab PIP-II Superconducting LINAC

PIP-II is a superconducting linac that is in the initial acceleration chain for the Fermilab accelerator complex. The RF system consists of a warm front-end with an RFQ and buncher cavities along with 25 superconducting cryo-modules comprised of cavities with five different acceleration \(β\). The LLRF system for the linac has to provide field and resonance control for a total of 125 RF cavities. Various components of the LLRF system have been tested with and without beam at the PIP-II test stands. The LLRF system design is derived from the LCLS-II project with its self-excited loop architecture used in the majority of the cryo-modules. The PIP-II beam loading at 2 mA is much higher than the LCLS-II linac. The control system architecture is analyzed and evaluated for the operational limits of feedback gains and their ability to meet the project regulation requirements for cavity field amplitude and phase regulation.

Varghese, P. [Fermilab] (ORCID:0009000925131983)↗

Optimization and Performance Characterization of the Second Generation Fermilab Constant Fraction Discriminator Readout ASIC

We present the optimization and performance characterization of the second-generation Fermilab Constant Fraction Discriminator ASIC (FCFD), designed for the readout of AC-coupled low-gain avalanche detector (LGAD) strip-sensors. The FCFD is explicitly engineered to be insensitive to signal-amplitude variations, thereby removing the need for time-walk correction that is required in other LGAD time-stamping readout ASICs. This updated version, referred to as FCFD1.1, incorporates several enhancements over the first iteration to address key challenges in AC-coupled LGAD front-end design. We outline the primary readout-ASIC design considerations for these applications, describe the methodology used to evaluate critical sensor and system parameters, and summarize the additionally implemented features. Performance measurements using injected charge signals and minimum-ionizing particles in test-beams demonstrate a time resolution of approximately 40 ps and a position resolution of roughly \SI{15}{\micro\meter} when tested with beam particles uniformly over the active area of the sensor.

Apresyan, Artur [Fermilab] (ORCID:0000000261860130↗

On-chip probabilistic inference for charged-particle tracking at the sensor edge

Modern scientific instruments operate under increasingly extreme constraints on bandwidth, latency, and power. Inference at the sensor edge determines experimental data collection efficiency by deciding which information to save for further analysis. Particle tracking detectors at the Large Hadron Collider exemplify this challenge: pixelated silicon sensors generate rich spatiotemporal ionization patterns, yet most of this information is discarded due to data-rate limitations. Concurrently, advancements in co-design tools provide rapid turn-around for incorporating machine learning into application-specific integrated circuits, motivating designs for particle detectors with new integrated technologies. We demonstrate that neural networks embedded in the front-end electronics can infer charged-particle kinematic parameters from a single silicon layer. We regress hit positions and incident angles with calibrated uncertainties, while satisfying stringent constraints on numerical precision, latency, and silicon area. Our results establish a path toward probabilistic inference directly at the edge, opening new opportunities for intelligent sensing in high-rate scientific instruments.

Das, Arghya Ranjan [Purdue U.] (ORCID:000000018451↗

Design and Testing of the Endcap Concentrator ASICs for the CMS High-Granularity Calorimeter Upgrade

A major upgrade of the High-Granularity Calorimeter (HGCAL) in the CMS detector is planned for Long-Shutdown 3 (LS3), currently expected to start in 2026. This upgrade will contain over 6 million channels and the electronics will be required to be low power and to withstand a radiation environment with a High-Energy Hadron flux of 3x10**6 particles per square centimeter per second. The solution to this significant challenge is the two Endcap Concentrator (ECON) ASICs, ECON-T and ECON-D, working in tandem with the HGCROC front-end ASIC. The two ECON ASICs provide critical on-detector data reduction for both the 40 MHz trigger path (ECON-T) and 750 kHz data acquisition path (ECON-D) of the HGCAL. The ASICs are fabricated in 65nm CMOS. They are rad-tolerant to 600 Mrad with low power consumption (<2.5 mW/channel). This presentation will be a comprehensive description of each ECON design, including the infrastructure that they share as well as the elements that make each unique. The presentation will also include functionality and radiation tests for both ASICs, and the first high statistics characterization results from the full production of 75k ECON-D and ECON-T ASICs.

Hoff, James R. [Fermilab] (ORCID:0000000163514592)↗

First evaluation of the tracking performance of the ARCADIA Fully Depleted MAPS with 120 GeV proton beam

This work presents test beam characterization of the ARCADIA Main Demonstrator 3, a 200 $μ$m thick Fully Depleted MAPS developed using a custom LFoundry 110 nm CIS process on a high-resistivity substrate. Measurements using a 120 GeV proton beam demonstrate a detection efficiency exceeding 99% and a spatial resolution down to 3.8 $μ$m. The study evaluates cluster size, spatial resolution, and efficiency as a function of the threshold, front-end currents, and backside bias voltage.

Rignanese, M. [Padua U.; INFN, Padua]↗

Lifetime study of the ColdADC for the Deep Underground Neutrino Experiment

ColdADC is a custom ASIC digitizer implemented in 65 nm CMOS technology using specialized techniques for long-term reliability in cryogenic environments. ColdADC was developed for use in the DUNE Far Detector complex, which will consist of four liquid argon time projection chambers. Each contains 17 kilotons liquid argon as the target material in order to measure neutrino oscillations. Approximately 40,000 ColdADC ASICs will be installed for DUNE in the first two large detectors and will be operated at cryogenic temperatures during the experiment without replacement. The lifetime of the ColdADC is a critical parameter affecting the data quality and physics sensitivity of the experiment. A measurement of the lifetime of the ColdADC was carried out, and the results shown in this paper assure orders of magnitude longer lifetime of the ColdADC than the planned operation time of the detectors.

Front-end electronics for detector readout↗

Design and commissioning of readout electronics for a $K$$^{0}_{L}$ and $μ$ detector at the Belle II experiment

The K-long and muon detector (KLM) constitutes the outer-most volume of the Belle II spectrometer at the interaction region of the SuperKEKB collider in Tsukuba, Japan. The KLM detector was partially upgraded since the Belle experiment by replacing many of its resistive-plate chambers with scintillators containing wavelength-shifting fibers and instrumenting it with silicon photomultipliers. Here, we describe the readout electronics, firmware, and software created to control and acquire data from the scintillators and resistive-plate chambers.

Belle II↗

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

47 OTHER INSTRUMENTATION↗

Rad-hard readout system for Timepix3 Hybrid Pixel Detectors

The Beam Gas Ionisation (BGI) profile monitor, located in the Proton Synchrotron (PS) and Super Proton Synchrotron (SPS) at CERN, requires a radiation-tolerant readout system to transfer data from the challenging accelerator surroundings to the back-end for processing. The system needs to control and acquire data from four Timepix3 Hybrid Pixel Detectors (HPDs) located directly inside the beam pipe, a highly radioactive environment. It must ensure reliability given limited hardware access and preserve signal integrity for the high-speed data (32 channels at 320 MHz). However, due to the unavailability of a suitable rad-hard Timepix3 readout, the Beam Instrumentation PiXeL (BIPXL) readout system was designed to meet these requirements. This system employs radiation-hardened components such as the GBTx and the FEASTMP, both developed at CERN. It will be compatible with forthcoming hybrid pixel detector initiatives in similarly harsh radiation conditions.

47 OTHER INSTRUMENTATION↗

Performance of an X-γ ray detection system based on a thick silicon LGAD

We present the performance of a X-γ ray detection systems based on a 300 µm thick silicon low-gain avalanche diode (LGAD) and of an equivalent Diode structure without the gain layer, read-out by a custom-made low-noise charge amplifier. For the LGAD structure, the multiplication gains M s from 10.2 to 19.3 are measured, and the Equivalent Noise Charge (ENC) components have been studied in detail. As expected, a significant reduction of the white and 1/f voltage series and dielectric ENC components is observed with increasing gain, shortening the optimum peaking time to τ = 0.4÷8 μs depending on the gain value, with respect to the standard diode, while the parallel ENC component increases proportionally to the gain up to M s = 15. Setting the gain M s = 12.7, a minimum ENC = 34.5 electrons r.m.s. (298 eV FWHM) at τ = 1 μs is found. However, the electronic noise, evaluated on the pulser FWHM, is found to only marginally contribute to the width of the spectral lines of a radioactive source, which are dominated instead by the statistical noise of the charge multiplication within the LGAD structure. The spectral lines' excess width is found to be proportional to the signal multiplication gain M s and increases with the energy of the photons. A minimum line width of 850 eV FWHM at 13.9 keV is measured at room temperature, τ = 2 μs and a gain M s = 10.2.

47 OTHER INSTRUMENTATION↗

The AMACStar ASIC for the HL-LHC ATLAS ITk Strip detector: design, verification, testing, and quality assurance

For the high-luminosity upgrade to the LHC (HL-LHC), the ATLAS detector at CERN requires an all-new inner detector, the Inner Tracker (ITk). The ITk Strip subdetector is made up of silicon modules, which include three types of radiation-hard ASICs. One of these is the Autonomous Monitor and Control (AMAC). The AMAC is manufactured by Global Foundries using 130 nm CMOS8RF DM technology and is approximately 3 by 5 mm in size. This ASIC autonomously monitors the temperatures, voltages, and currents in the module components while controlling critical values in order to prevent these quantities from reaching dangerous levels. The final design, AMACStar, was verified, tested, and ensured to perform all necessary functions. A quality control procedure using an in-house probe station set-up was developed in order to ensure that every individual chip on each wafer of AMACStars required by the ITk Strip project met performance requirements. The average per wafer yield of usable AMACStars is 92.33%, exceeding the design-specific 90% yield estimated for project costing. This estimate was based on actual yields for similar designs in this process.

Analogue electronic circuits↗

Readout electronics for low occupancy High-Pressure Gas TPCs

High-Pressure Gas Time Projection Chambers (HPgTPCs) have benefits such as low energy thresholds, magnetisability, and 4π acceptance, making them ideal for neutrino experiments such as DUNE. We present the design of an FPGA-based solution optimised for Gaseous Argon Near Detector (ND-GAr), which is part of the Phase-II more capable near detector for DUNE. These electronics reduce the cost significantly compared to using collider readout electronics, which are typically designed for much higher occupancy and therefore, for example, need much larger numbers of FPGAs and power per channel. We demonstrate the performance of our electronics with the Teststand for an Overpressurised Argon Detector (TOAD) at Fermilab in the US at a range of pressures and gas mixtures up to 4.5 barA, reading out ∼10 000 channels from a Multi-Wire Proportional Chamber (MWPC). The operation took place between April and July of 2024. We measure the noise characteristics of the system to be sufficiently low, and we identify sources of noise that can be further mitigated in the next iteration. We also note that the cooling scheme used in the test requires improvement before full-scale deployment. Despite these necessary improvements, we show that the system can fulfil the needs of a HPgTPC for a fraction of the price of collider readout electronics.

Data acquisition concepts↗